Lines Matching refs:ResultReg
89 unsigned &ResultReg, unsigned Alignment = 1);
98 unsigned &ResultReg);
349 MachineMemOperand *MMO, unsigned &ResultReg, in X86FastEmitLoad() argument
488 ResultReg = createResultReg(RC); in X86FastEmitLoad()
490 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), ResultReg); in X86FastEmitLoad()
697 unsigned &ResultReg) { in X86FastEmitExtend() argument
703 ResultReg = RR; in X86FastEmitExtend()
1319 unsigned ResultReg = 0; in X86SelectLoad() local
1320 if (!X86FastEmitLoad(VT, AM, createMachineMemOperandFor(LI), ResultReg, in X86SelectLoad()
1324 updateValueMap(I, ResultReg); in X86SelectLoad()
1420 unsigned ResultReg = 0; in X86SelectCmp() local
1424 ResultReg = createResultReg(&X86::GR32RegClass); in X86SelectCmp()
1426 ResultReg); in X86SelectCmp()
1427 ResultReg = fastEmitInst_extractsubreg(MVT::i8, ResultReg, /*Kill=*/true, in X86SelectCmp()
1429 if (!ResultReg) in X86SelectCmp()
1434 ResultReg = createResultReg(&X86::GR8RegClass); in X86SelectCmp()
1436 ResultReg).addImm(1); in X86SelectCmp()
1441 if (ResultReg) { in X86SelectCmp()
1442 updateValueMap(I, ResultReg); in X86SelectCmp()
1470 ResultReg = createResultReg(&X86::GR8RegClass); in X86SelectCmp()
1482 ResultReg).addReg(FlagReg1).addReg(FlagReg2); in X86SelectCmp()
1483 updateValueMap(I, ResultReg); in X86SelectCmp()
1500 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), ResultReg); in X86SelectCmp()
1501 updateValueMap(I, ResultReg); in X86SelectCmp()
1510 unsigned ResultReg = getRegForValue(I->getOperand(0)); in X86SelectZExt() local
1511 if (ResultReg == 0) in X86SelectZExt()
1518 ResultReg = fastEmitZExtFromI1(MVT::i8, ResultReg, /*TODO: Kill=*/false); in X86SelectZExt()
1521 if (ResultReg == 0) in X86SelectZExt()
1538 .addReg(ResultReg); in X86SelectZExt()
1540 ResultReg = createResultReg(&X86::GR64RegClass); in X86SelectZExt()
1542 ResultReg) in X86SelectZExt()
1545 ResultReg = fastEmit_r(MVT::i8, DstVT.getSimpleVT(), ISD::ZERO_EXTEND, in X86SelectZExt()
1546 ResultReg, /*Kill=*/true); in X86SelectZExt()
1547 if (ResultReg == 0) in X86SelectZExt()
1551 updateValueMap(I, ResultReg); in X86SelectZExt()
1763 unsigned ResultReg = createResultReg(RC); in X86SelectShift() local
1764 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(OpReg), ResultReg) in X86SelectShift()
1766 updateValueMap(I, ResultReg); in X86SelectShift()
1906 unsigned ResultReg = 0; in X86SelectDivRem() local
1920 ResultReg = fastEmitInst_extractsubreg(MVT::i8, ResultSuperReg, in X86SelectDivRem()
1924 if (!ResultReg) { in X86SelectDivRem()
1925 ResultReg = createResultReg(TypeEntry.RC); in X86SelectDivRem()
1926 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Copy), ResultReg) in X86SelectDivRem()
1929 updateValueMap(I, ResultReg); in X86SelectDivRem()
2045 unsigned ResultReg = fastEmitInst_rr(Opc, RC, RHSReg, RHSIsKill, in X86FastEmitCMoveSelect() local
2047 updateValueMap(I, ResultReg); in X86FastEmitCMoveSelect()
2123 unsigned ResultReg; in X86FastEmitSSESelect() local
2143 ResultReg = createResultReg(RC); in X86FastEmitSSESelect()
2145 TII.get(TargetOpcode::COPY), ResultReg).addReg(VBlendReg); in X86FastEmitSSESelect()
2153 ResultReg = fastEmitInst_rr(Opc[3], RC, AndNReg, /*IsKill=*/true, in X86FastEmitSSESelect()
2156 updateValueMap(I, ResultReg); in X86FastEmitSSESelect()
2218 unsigned ResultReg = in X86FastEmitPseudoSelect() local
2220 updateValueMap(I, ResultReg); in X86FastEmitPseudoSelect()
2245 unsigned ResultReg = createResultReg(RC); in X86SelectSelect() local
2247 TII.get(TargetOpcode::COPY), ResultReg) in X86SelectSelect()
2249 updateValueMap(I, ResultReg); in X86SelectSelect()
2302 unsigned ResultReg = in X86SelectSIToFP() local
2304 updateValueMap(I, ResultReg); in X86SelectSIToFP()
2320 unsigned ResultReg = createResultReg(RC); in X86SelectFPExtOrFPTrunc() local
2323 ResultReg); in X86SelectFPExtOrFPTrunc()
2327 updateValueMap(I, ResultReg); in X86SelectFPExtOrFPTrunc()
2388 unsigned ResultReg = fastEmitInst_extractsubreg(MVT::i8, in X86SelectTrunc() local
2391 if (!ResultReg) in X86SelectTrunc()
2394 updateValueMap(I, ResultReg); in X86SelectTrunc()
2461 unsigned ResultReg = 0; in fastLowerIntrinsicCall() local
2474 ResultReg = createResultReg(&X86::GR32RegClass); in fastLowerIntrinsicCall()
2476 TII.get(X86::VMOVPDI2DIrr), ResultReg) in fastLowerIntrinsicCall()
2481 ResultReg = fastEmitInst_extractsubreg(MVT::i16, ResultReg, true, RegIdx); in fastLowerIntrinsicCall()
2496 ResultReg = createResultReg(&X86::FR32RegClass); in fastLowerIntrinsicCall()
2498 TII.get(TargetOpcode::COPY), ResultReg) in fastLowerIntrinsicCall()
2502 updateValueMap(II, ResultReg); in fastLowerIntrinsicCall()
2679 unsigned ResultReg = createResultReg(RC); in fastLowerIntrinsicCall() local
2682 ResultReg); in fastLowerIntrinsicCall()
2689 updateValueMap(II, ResultReg); in fastLowerIntrinsicCall()
2750 unsigned ResultReg = 0; in fastLowerIntrinsicCall() local
2759 ResultReg = createResultReg(TLI.getRegClassFor(VT)); in fastLowerIntrinsicCall()
2762 TII.get(Opc[IsDec][VT.SimpleTy-MVT::i8]), ResultReg) in fastLowerIntrinsicCall()
2765 ResultReg = fastEmit_ri(VT, VT, BaseOpc, LHSReg, LHSIsKill, in fastLowerIntrinsicCall()
2771 if (!ResultReg) { in fastLowerIntrinsicCall()
2776 ResultReg = fastEmit_rr(VT, VT, BaseOpc, LHSReg, LHSIsKill, RHSReg, in fastLowerIntrinsicCall()
2782 if (BaseOpc == X86ISD::UMUL && !ResultReg) { in fastLowerIntrinsicCall()
2791 ResultReg = fastEmitInst_r(MULOpc[VT.SimpleTy-MVT::i8], in fastLowerIntrinsicCall()
2793 } else if (BaseOpc == X86ISD::SMUL && !ResultReg) { in fastLowerIntrinsicCall()
2802 ResultReg = fastEmitInst_r(MULOpc[0], TLI.getRegClassFor(VT), RHSReg, in fastLowerIntrinsicCall()
2805 ResultReg = fastEmitInst_rr(MULOpc[VT.SimpleTy-MVT::i8], in fastLowerIntrinsicCall()
2810 if (!ResultReg) in fastLowerIntrinsicCall()
2814 assert((ResultReg+1) == ResultReg2 && "Nonconsecutive result registers."); in fastLowerIntrinsicCall()
2818 updateValueMap(II, ResultReg, 2); in fastLowerIntrinsicCall()
2880 unsigned ResultReg = createResultReg(TLI.getRegClassFor(VT)); in fastLowerIntrinsicCall() local
2881 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), ResultReg) in fastLowerIntrinsicCall()
2884 updateValueMap(II, ResultReg); in fastLowerIntrinsicCall()
2978 unsigned ResultReg = createResultReg(RC); in fastLowerArguments() local
2980 TII.get(TargetOpcode::COPY), ResultReg) in fastLowerArguments()
2982 updateValueMap(&Arg, ResultReg); in fastLowerArguments()
3080 unsigned ResultReg; in fastLowerCall() local
3085 ResultReg = getRegForValue(PrevVal); in fastLowerCall()
3087 if (!ResultReg) in fastLowerCall()
3093 ResultReg = in fastLowerCall()
3094 fastEmit_ri(VT, VT, ISD::AND, ResultReg, hasTrivialKill(PrevVal), 1); in fastLowerCall()
3098 ResultReg = getRegForValue(Val); in fastLowerCall()
3101 if (!ResultReg) in fastLowerCall()
3104 ArgRegs.push_back(ResultReg); in fastLowerCall()
3352 unsigned ResultReg = FuncInfo.CreateRegs(CLI.RetTy); in fastLowerCall() local
3356 unsigned CopyReg = ResultReg + i; in fastLowerCall()
3390 TII.get(Opc), ResultReg + i), FI); in fastLowerCall()
3394 CLI.ResultReg = ResultReg; in fastLowerCall()
3498 unsigned ResultReg = createResultReg(&X86::GR64RegClass); in X86MaterializeInt() local
3500 TII.get(TargetOpcode::SUBREG_TO_REG), ResultReg) in X86MaterializeInt()
3502 return ResultReg; in X86MaterializeInt()
3526 unsigned ResultReg = createResultReg(&X86::GR64RegClass); in X86MaterializeInt() local
3528 TII.get(TargetOpcode::SUBREG_TO_REG), ResultReg) in X86MaterializeInt()
3530 return ResultReg; in X86MaterializeInt()
3591 unsigned ResultReg = createResultReg(RC); in X86MaterializeFP() local
3599 TII.get(Opc), ResultReg); in X86MaterializeFP()
3605 return ResultReg; in X86MaterializeFP()
3609 TII.get(Opc), ResultReg), in X86MaterializeFP()
3611 return ResultReg; in X86MaterializeFP()
3628 unsigned ResultReg = createResultReg(TLI.getRegClassFor(VT)); in X86MaterializeGV() local
3634 ResultReg) in X86MaterializeGV()
3642 TII.get(Opc), ResultReg), AM); in X86MaterializeGV()
3644 return ResultReg; in X86MaterializeGV()
3687 unsigned ResultReg = createResultReg(RC); in fastMaterializeAlloca() local
3689 TII.get(Opc), ResultReg), AM); in fastMaterializeAlloca()
3690 return ResultReg; in fastMaterializeAlloca()
3726 unsigned ResultReg = createResultReg(RC); in fastMaterializeFloatZero() local
3727 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), ResultReg); in fastMaterializeFloatZero()
3728 return ResultReg; in fastMaterializeFloatZero()