Lines Matching refs:VSRLI
4616 Vec = ShiftRight ? DAG.getNode(X86ISD::VSRLI, dl, WideOpVT, Vec, in insert1BitVector()
4625 Vec = DAG.getNode(X86ISD::VSRLI, dl, WideOpVT, Vec, ShiftBits); in insert1BitVector()
4643 Vec = DAG.getNode(X86ISD::VSRLI, dl, WideOpVT, Vec, ShiftBits); in insert1BitVector()
7879 : (ByteShift ? X86ISD::VSRLDQ : X86ISD::VSRLI); in lowerVectorShuffleAsShift()
12414 Vec = DAG.getNode(X86ISD::VSRLI, dl, VecVT, Vec, in ExtractBitFromMaskVector()
17053 assert((Opc == X86ISD::VSHLI || Opc == X86ISD::VSRLI || Opc == X86ISD::VSRAI) in getTargetVShiftByConstNode()
17078 case X86ISD::VSRLI: in getTargetVShiftByConstNode()
17128 case X86ISD::VSRLI: Opc = X86ISD::VSRL; break; in getTargetVShiftNode()
19418 SDValue Ahi = getTargetVShiftByConstNode(X86ISD::VSRLI, dl, VT, A, 32, DAG); in LowerMUL()
19419 SDValue Bhi = getTargetVShiftByConstNode(X86ISD::VSRLI, dl, VT, B, 32, DAG); in LowerMUL()
19762 (Op.getOpcode() == ISD::SRL) ? X86ISD::VSRLI : X86ISD::VSRAI; in LowerScalarImmediateShift()
19785 getTargetVShiftByConstNode(X86ISD::VSRLI, dl, VT, R, ShiftAmt, DAG); in LowerScalarImmediateShift()
19845 SDValue SRL = getTargetVShiftByConstNode(X86ISD::VSRLI, dl, ShiftVT, in LowerScalarImmediateShift()
19932 (Op.getOpcode() == ISD::SRL) ? X86ISD::VSRLI : X86ISD::VSRAI; in LowerScalarVariableShift()
22191 case X86ISD::VSRLI: return "X86ISD::VSRLI"; in getTargetNodeName()
28232 SDValue Shift = DAG.getNode(X86ISD::VSRLI, DL, VT0, Op0, ShAmt); in combinePCMPAnd1()