Lines Matching refs:VEX_4V
536 VEX_4V, VEX_LIG;
1134 itin>, VEX_4V;
1358 VEX_4V, Sched<[WriteFShuffle]>;
1365 VEX_4V, Sched<[WriteFShuffle]>;
1520 XS, VEX_4V, VEX_LIG;
1522 XS, VEX_4V, VEX_W, VEX_LIG;
1524 XD, VEX_4V, VEX_LIG;
1526 XD, VEX_4V, VEX_W, VEX_LIG;
1655 SSE_CVT_Scalar, 0>, XS, VEX_4V;
1658 SSE_CVT_Scalar, 0>, XS, VEX_4V,
1662 SSE_CVT_Scalar, 0>, XD, VEX_4V;
1666 VEX_4V, VEX_W;
1790 IIC_SSE_CVT_Scalar_RR>, VEX_4V, VEX_LIG,
1797 XD, Requires<[HasAVX, OptForSize]>, VEX_4V, VEX_LIG,
1821 IIC_SSE_CVT_Scalar_RR>, XD, VEX_4V, Requires<[HasAVX]>,
1828 IIC_SSE_CVT_Scalar_RM>, XD, VEX_4V, Requires<[HasAVX]>,
1856 XS, Requires<[HasAVX]>, VEX_4V, VEX_LIG,
1863 XS, VEX_4V, VEX_LIG, Requires<[HasAVX, OptForSize]>,
1906 IIC_SSE_CVT_Scalar_RR>, XS, VEX_4V, Requires<[HasAVX]>,
1913 IIC_SSE_CVT_Scalar_RM>, XS, VEX_4V, Requires<[HasAVX]>,
2321 SSE_ALU_F32S, i8immZExt5>, XS, VEX_4V, VEX_LIG;
2326 XD, VEX_4V, VEX_LIG;
2361 XS, VEX_4V;
2365 XD, VEX_4V;
2476 SSEPackedSingle, i8immZExt5, loadv4f32>, PS, VEX_4V;
2480 SSEPackedDouble, i8immZExt5, loadv2f64>, PD, VEX_4V;
2484 SSEPackedSingle, i8immZExt5, loadv8f32>, PS, VEX_4V, VEX_L;
2488 SSEPackedDouble, i8immZExt5, loadv4f64>, PD, VEX_4V, VEX_L;
2557 loadv4f32, SSEPackedSingle>, PS, VEX_4V;
2560 loadv8f32, SSEPackedSingle>, PS, VEX_4V, VEX_L;
2563 loadv2f64, SSEPackedDouble>, PD, VEX_4V;
2566 loadv4f64, SSEPackedDouble>, PD, VEX_4V, VEX_L;
2647 SSEPackedSingle>, PS, VEX_4V;
2650 SSEPackedDouble>, PD, VEX_4V;
2653 SSEPackedSingle>, PS, VEX_4V;
2656 SSEPackedDouble>, PD, VEX_4V;
2660 SSEPackedSingle>, PS, VEX_4V, VEX_L;
2663 SSEPackedDouble>, PD, VEX_4V, VEX_L;
2666 SSEPackedSingle>, PS, VEX_4V, VEX_L;
2669 SSEPackedDouble>, PD, VEX_4V, VEX_L;
2771 VR128, loadv2i64, i128mem, itins, IsCommutable, 0>, VEX_4V;
2780 IsCommutable, 0>, VEX_4V, VEX_L;
2803 PS, VEX_4V;
2807 PD, VEX_4V;
2837 PS, VEX_4V;
2841 PD, VEX_4V;
2845 PS, VEX_4V, VEX_L;
2849 PD, VEX_4V, VEX_L;
2885 (loadv4i64 addr:$src2)))], 0>, PS, VEX_4V, VEX_L;
2893 PD, VEX_4V, VEX_L;
2902 (loadv2i64 addr:$src2)))], 0>, PS, VEX_4V;
2910 PD, VEX_4V;
2970 SSEPackedSingle, itins.s, 0>, PS, VEX_4V;
2973 SSEPackedDouble, itins.d, 0>, PD, VEX_4V;
2977 SSEPackedSingle, itins.s, 0>, PS, VEX_4V, VEX_L;
2980 SSEPackedDouble, itins.d, 0>, PD, VEX_4V, VEX_L;
2997 XS, VEX_4V, VEX_LIG;
3000 XD, VEX_4V, VEX_LIG;
3016 SSEPackedSingle, itins.s, 0>, XS, VEX_4V, VEX_LIG;
3019 SSEPackedDouble, itins.d, 0>, XD, VEX_4V, VEX_LIG;
3469 SSEPackedSingle, itins, "SS">, XS, VEX_4V, VEX_LIG;
3482 XD, VEX_4V, VEX_LIG;
3891 IsCommutable, 0>, VEX_4V;
3900 IsCommutable, 0>, VEX_4V, VEX_L;
4017 VEX_4V;
4021 VEX_4V, VEX_L;
4029 VEX_4V;
4033 SSE_INTMUL_ITINS_P, 1, 0>, VEX_4V, VEX_L;
4045 SSE_INTSHIFT_ITINS_P, 0>, VEX_4V;
4048 SSE_INTSHIFT_ITINS_P, 0>, VEX_4V;
4052 SSE_INTSHIFT_ITINS_P, 0>, VEX_4V;
4055 SSE_INTSHIFT_ITINS_P, 0>, VEX_4V;
4059 SSE_INTSHIFT_ITINS_P, 0>, VEX_4V;
4065 SSE_INTSHIFT_ITINS_P, 0>, VEX_4V;
4068 SSE_INTSHIFT_ITINS_P, 0>, VEX_4V;
4071 SSE_INTSHIFT_ITINS_P, 0>, VEX_4V;
4083 VEX_4V;
4089 VEX_4V;
4096 SSE_INTSHIFT_ITINS_P, 0>, VEX_4V, VEX_L;
4099 SSE_INTSHIFT_ITINS_P, 0>, VEX_4V, VEX_L;
4103 SSE_INTSHIFT_ITINS_P, 0>, VEX_4V, VEX_L;
4106 SSE_INTSHIFT_ITINS_P, 0>, VEX_4V, VEX_L;
4110 SSE_INTSHIFT_ITINS_P, 0>, VEX_4V, VEX_L;
4116 SSE_INTSHIFT_ITINS_P, 0>, VEX_4V, VEX_L;
4119 SSE_INTSHIFT_ITINS_P, 0>, VEX_4V, VEX_L;
4122 SSE_INTSHIFT_ITINS_P, 0>, VEX_4V, VEX_L;
4133 VEX_4V, VEX_L;
4139 VEX_4V, VEX_L;
4382 loadv2i64, 0>, VEX_4V;
4384 loadv2i64, 0>, VEX_4V;
4387 loadv2i64, 0>, VEX_4V;
4389 loadv2i64, 0>, VEX_4V;
4394 VEX_4V, VEX_L;
4396 VEX_4V, VEX_L;
4399 VEX_4V, VEX_L;
4401 VEX_4V, VEX_L;
4461 loadv2i64, 0>, VEX_4V;
4463 loadv2i64, 0>, VEX_4V;
4465 loadv2i64, 0>, VEX_4V;
4467 loadv2i64, 0>, VEX_4V;
4471 loadv2i64, 0>, VEX_4V;
4473 loadv2i64, 0>, VEX_4V;
4475 loadv2i64, 0>, VEX_4V;
4477 loadv2i64, 0>, VEX_4V;
4482 VEX_4V, VEX_L;
4484 VEX_4V, VEX_L;
4486 VEX_4V, VEX_L;
4488 VEX_4V, VEX_L;
4492 VEX_4V, VEX_L;
4494 VEX_4V, VEX_L;
4496 VEX_4V, VEX_L;
4498 VEX_4V, VEX_L;
4566 defm VPINSRW : sse2_pinsrw<0>, PD, VEX_4V;
5220 f128mem, SSE_ALU_F32P, loadv4f32, 0>, XD, VEX_4V;
5222 f256mem, SSE_ALU_F32P, loadv8f32, 0>, XD, VEX_4V, VEX_L;
5226 f128mem, SSE_ALU_F64P, loadv2f64, 0>, PD, VEX_4V;
5228 f256mem, SSE_ALU_F64P, loadv4f64, 0>, PD, VEX_4V, VEX_L;
5315 X86fhadd, loadv4f32, 0>, VEX_4V;
5317 X86fhsub, loadv4f32, 0>, VEX_4V;
5319 X86fhadd, loadv8f32, 0>, VEX_4V, VEX_L;
5321 X86fhsub, loadv8f32, 0>, VEX_4V, VEX_L;
5325 X86fhadd, loadv2f64, 0>, VEX_4V;
5327 X86fhsub, loadv2f64, 0>, VEX_4V;
5329 X86fhadd, loadv4f64, 0>, VEX_4V, VEX_L;
5331 X86fhsub, loadv4f64, 0>, VEX_4V, VEX_L;
5560 SSE_PHADDSUBW, 0>, VEX_4V;
5563 SSE_PHADDSUBD, 0>, VEX_4V;
5566 SSE_PHADDSUBW, 0>, VEX_4V;
5569 SSE_PHADDSUBD, 0>, VEX_4V;
5572 SSE_PSIGN, loadv2i64, 0>, VEX_4V;
5575 SSE_PSIGN, loadv2i64, 0>, VEX_4V;
5578 SSE_PSIGN, loadv2i64, 0>, VEX_4V;
5581 SSE_PSHUFB, 0>, VEX_4V;
5584 SSE_PHADDSUBSW, loadv2i64, 0>, VEX_4V;
5587 SSE_PHADDSUBSW, loadv2i64, 0>, VEX_4V;
5590 SSE_PMADD, loadv2i64, 0>, VEX_4V;
5594 SSE_PMULHRSW, loadv2i64, 0>, VEX_4V;
5601 SSE_PHADDSUBW, 0>, VEX_4V, VEX_L;
5604 SSE_PHADDSUBW, 0>, VEX_4V, VEX_L;
5607 SSE_PHADDSUBW, 0>, VEX_4V, VEX_L;
5610 SSE_PHADDSUBW, 0>, VEX_4V, VEX_L;
5612 WriteVecALU>, VEX_4V, VEX_L;
5614 WriteVecALU>, VEX_4V, VEX_L;
5616 WriteVecALU>, VEX_4V, VEX_L;
5619 SSE_PSHUFB, 0>, VEX_4V, VEX_L;
5622 WriteVecALU>, VEX_4V, VEX_L;
5625 WriteVecALU>, VEX_4V, VEX_L;
5628 WriteVecIMul>, VEX_4V, VEX_L;
5632 WriteVecIMul>, VEX_4V, VEX_L;
5710 defm VPALIGNR : ssse3_palignr<"vpalignr", 0>, VEX_4V;
5712 defm VPALIGNR : ssse3_palignr_y<"vpalignr", 0>, VEX_4V, VEX_L;
6212 defm VPINSRB : SS41I_insert8<0x20, "vpinsrb", 0>, VEX_4V;
6238 defm VPINSRD : SS41I_insert32<0x22, "vpinsrd", 0>, VEX_4V;
6264 defm VPINSRQ : SS41I_insert64<0x22, "vpinsrq", 0>, VEX_4V, VEX_W;
6298 defm VINSERTPS : SS41I_insertf32<0x21, "vinsertps", 0>, VEX_4V;
6464 int_x86_sse41_round_sd, 0>, VEX_4V, VEX_LIG;
6770 VEX_4V;
6773 VEX_4V;
6776 VEX_4V;
6779 VEX_4V;
6782 SSE_INTMUL_ITINS_P, 1, 0>, VEX_4V;
6787 VEX_4V;
6790 VEX_4V;
6793 VEX_4V;
6796 VEX_4V;
6802 VEX_4V, VEX_L;
6805 VEX_4V, VEX_L;
6808 VEX_4V, VEX_L;
6811 VEX_4V, VEX_L;
6814 SSE_INTMUL_ITINS_P, 1, 0>, VEX_4V, VEX_L;
6819 VEX_4V, VEX_L;
6822 VEX_4V, VEX_L;
6825 VEX_4V, VEX_L;
6828 VEX_4V, VEX_L;
6856 VEX_4V;
6859 VEX_4V;
6864 VEX_4V, VEX_L;
6867 VEX_4V, VEX_L;
6937 DEFAULT_ITINS_MPSADSCHED>, VEX_4V;
6943 DEFAULT_ITINS_FBLENDSCHED>, VEX_4V;
6946 DEFAULT_ITINS_FBLENDSCHED>, VEX_4V, VEX_L;
6951 DEFAULT_ITINS_FBLENDSCHED>, VEX_4V;
6954 DEFAULT_ITINS_FBLENDSCHED>, VEX_4V, VEX_L;
6958 DEFAULT_ITINS_BLENDSCHED>, VEX_4V;
6963 SSE_DPPS_ITINS>, VEX_4V;
6967 SSE_DPPS_ITINS>, VEX_4V;
6971 SSE_DPPS_ITINS>, VEX_4V, VEX_L;
6978 DEFAULT_ITINS_MPSADSCHED>, VEX_4V, VEX_L;
6982 DEFAULT_ITINS_BLENDSCHED>, VEX_4V, VEX_L;
7022 NoItinerary, SSEPackedInt>, TAPD, VEX_4V, VEX_I8IMM,
7032 NoItinerary, SSEPackedInt>, TAPD, VEX_4V, VEX_I8IMM,
7298 loadv2i64, i128mem, 0>, VEX_4V;
7302 loadv4i64, i256mem, 0>, VEX_4V, VEX_L;
7591 int_x86_aesni_aesenc, loadv2i64, 0>, VEX_4V;
7593 int_x86_aesni_aesenclast, loadv2i64, 0>, VEX_4V;
7595 int_x86_aesni_aesdec, loadv2i64, 0>, VEX_4V;
7597 int_x86_aesni_aesdeclast, loadv2i64, 0>, VEX_4V;
7845 []>, Sched<[WriteFShuffle]>, VEX_4V, VEX_L;
7850 []>, Sched<[WriteFShuffleLd, ReadAfterLd]>, VEX_4V, VEX_L;
7994 VEX_4V;
7999 VEX_4V, VEX_L;
8003 [(IntSt addr:$dst, VR128:$src1, VR128:$src2)]>, VEX_4V;
8007 [(IntSt256 addr:$dst, VR256:$src1, VR256:$src2)]>, VEX_4V, VEX_L;
8034 [(set RC:$dst, (f_vt (X86VPermilpv RC:$src1, (i_vt RC:$src2))))]>, VEX_4V,
8040 (i_vt (bitconvert (i_frag addr:$src2))))))]>, VEX_4V,
8114 (i8 imm:$src3))))]>, VEX_4V, VEX_L,
8120 (i8 imm:$src3)))]>, VEX_4V, VEX_L,
8260 Sched<[WriteBlend]>, VEX_4V;
8268 Sched<[WriteBlendLd, ReadAfterLd]>, VEX_4V;
8452 Sched<[Sched]>, VEX_4V, VEX_L;
8460 Sched<[Sched.Folded, ReadAfterLd]>, VEX_4V, VEX_L;
8504 VEX_4V, VEX_L;
8510 Sched<[WriteShuffle256Ld, ReadAfterLd]>, VEX_4V, VEX_L;
8539 []>, Sched<[WriteShuffle256]>, VEX_4V, VEX_L;
8544 []>, Sched<[WriteShuffle256Ld, ReadAfterLd]>, VEX_4V, VEX_L;
8644 [(set VR128:$dst, (IntLd128 addr:$src2, VR128:$src1))]>, VEX_4V;
8649 VEX_4V, VEX_L;
8653 [(IntSt128 addr:$dst, VR128:$src1, VR128:$src2)]>, VEX_4V;
8657 [(IntSt256 addr:$dst, VR256:$src1, VR256:$src2)]>, VEX_4V, VEX_L;
8717 VEX_4V, Sched<[WriteVarVecShift]>;
8724 VEX_4V, Sched<[WriteVarVecShiftLd, ReadAfterLd]>;
8730 VEX_4V, VEX_L, Sched<[WriteVarVecShift]>;
8737 VEX_4V, VEX_L, Sched<[WriteVarVecShiftLd, ReadAfterLd]>;