Lines Matching refs:SchedModels
69 CodeGenSchedModels &SchedModels; member in __anon5312b1af0111::SubtargetEmitter
111 Records(R), SchedModels(TGT.getSchedModels()), Target(TGT.getName()) {} in SubtargetEmitter()
367 for (const CodeGenProcModel &ProcModel : SchedModels.procModels()) { in EmitStageAndOperandCycleData()
420 for (const CodeGenProcModel &ProcModel : SchedModels.procModels()) { in EmitStageAndOperandCycleData()
432 ItinList.resize(SchedModels.numInstrSchedClasses()); in EmitStageAndOperandCycleData()
541 for (CodeGenSchedModels::ProcIter PI = SchedModels.procModelBegin(), in EmitItineraries()
542 PE = SchedModels.procModelEnd(); PI != PE; ++PI, ++ProcItinListsIter) { in EmitItineraries()
578 ", // " << j << " " << SchedModels.getSchedClass(j).Name << "\n"; in EmitItineraries()
625 SuperDef = SchedModels.findProcResUnits( in EmitProcessorResources()
659 SchedModels.getSchedRW(A->getValueAsDef("AliasRW")); in FindWriteResources()
662 if (&SchedModels.getProcModel(ModelDef) != &ProcModel) in FindWriteResources()
711 SchedModels.getSchedRW(A->getValueAsDef("AliasRW")); in FindReadAdvance()
714 if (&SchedModels.getProcModel(ModelDef) != &ProcModel) in FindReadAdvance()
765 PRDef = SchedModels.findProcResUnits(PRVec[i], PM); in ExpandProcResources()
774 SchedModels.findProcResUnits(SubDef->getValueAsDef("Super"), PM); in ExpandProcResources()
808 for (const CodeGenSchedClass &SC : SchedModels.schedClasses()) { in GenSchedClassTables()
809 DEBUG(SC.dump(&SchedModels)); in GenSchedClassTables()
860 if (&ProcModel == &SchedModels.getProcModel(RWModelDef)) { in GenSchedClassTables()
868 SchedModels.findRWs(RWDef->getValueAsListOfDefs("OperandReadWrites"), in GenSchedClassTables()
878 SchedModels.findRWs(I->getValueAsListOfDefs("OperandReadWrites"), in GenSchedClassTables()
895 SchedModels.expandRWSeqForProc(W, WriteSeq, /*IsRead=*/false, in GenSchedClassTables()
902 WriterNames.push_back(SchedModels.getSchedWrite(WriteID).Name); in GenSchedClassTables()
905 if (!SchedModels.hasReadOfWrite( in GenSchedClassTables()
906 SchedModels.getSchedWrite(WriteID).TheDef)) { in GenSchedClassTables()
914 FindWriteResources(SchedModels.getSchedWrite(WS), ProcModel); in GenSchedClassTables()
962 FindReadAdvance(SchedModels.getSchedRead(Reads[UseIdx]), ProcModel); in GenSchedClassTables()
977 WriteIDs.push_back(SchedModels.getSchedRWIdx(VW, /*IsRead=*/false)); in GenSchedClassTables()
1105 for (CodeGenSchedModels::ProcIter PI = SchedModels.procModelBegin(), in EmitSchedClassTables()
1106 PE = SchedModels.procModelEnd(); PI != PE; ++PI) { in EmitSchedClassTables()
1111 SchedTables.ProcSchedClasses[1 + (PI - SchedModels.procModelBegin())]; in EmitSchedClassTables()
1120 assert(SchedModels.getSchedClass(0).Name == "NoInstrModel" in EmitSchedClassTables()
1128 const CodeGenSchedClass &SchedClass = SchedModels.getSchedClass(SCIdx); in EmitSchedClassTables()
1151 for (const CodeGenProcModel &PM : SchedModels.procModels()) { in EmitProcessorModels()
1186 << " " << (SchedModels.schedClassEnd() in EmitProcessorModels()
1187 - SchedModels.schedClassBegin()) << ",\n"; in EmitProcessorModels()
1220 SchedModels.getModelForProc(Processor).ModelName; in EmitProcessorLookup()
1248 if (SchedModels.hasItineraries()) { in EmitSchedModel()
1258 for (const CodeGenProcModel &ProcModel : SchedModels.procModels()) { in EmitSchedModel()
1283 for (const CodeGenSchedClass &SC : SchedModels.schedClasses()) { in EmitSchedModelHelpers()
1291 const CodeGenSchedClass &SC = SchedModels.getSchedClass(VC); in EmitSchedModelHelpers()
1305 OS << "{ // " << (SchedModels.procModelBegin() + PI)->ModelName in EmitSchedModelHelpers()
1321 << SchedModels.getSchedClass(T.ToClassIdx).Name << '\n'; in EmitSchedModelHelpers()
1433 if (SchedModels.hasItineraries()) { in run()
1491 if (SchedModels.hasItineraries()) { in run()
1514 if (SchedModels.hasItineraries()) { in run()