Lines Matching refs:ir3
732 - nir: Move nir_lower_mediump_outputs from ir3
733 - ir3: Use shared mediump output lowering
964 - ir3: Disable copy prop for immediate ldlw offsets
1141 - tu: ir3: Emit push constants directly
1144 - ir3: Add bindless instruction encoding
1145 - ir3: Plumb through support for a1.x
1146 - ir3: Also don't propagate immediate offset with LDC
1147 - ir3: LDC also has a destination
1148 - ir3: Plumb through bindless support
1149 - ir3: Rewrite UBO push analysis to support bindless
1154 - ir3: Fix txs with bindless
1155 - ir3: Fix LDC offset units
1156 - ir3: Handle load_ubo_ir3 when promoting to constants
1159 - ir3/ra: Fix off-by-one issues with live-range extension
1162 - ir3: Don't double-insert the first block
1163 - ir3: Fix bug with shaders that only exit via discard
1165 - ir3: Skip missing VS outputs in VS out map when linking
1169 - ir3: Remove VARYING_SLOT_PNTC remapping hack
1591 - freedreno/ir3: Reuse glsl_get_sampler_dim_coordinate_components() in
1595 - freedreno/ir3: Fix the arg to
1656 - freedreno/ir3: Stop doing b2n on the SEL condition.
1657 - freedreno/ir3: CSE the up/downconversion of SEL's cond's size.
1660 - freedreno/ir3: Drop handling FRAG_RESULT_DEPTH writing to .z
1667 - freedreno/ir3: Fix driver_location of the added vertex_flags varying.
1668 - freedreno/ir3: Fix sizing of the inputs/outputs array.
1674 - freedreno/ir3: Fix the disasm of half-float STG dests.
1675 - freedreno/ir3: Print a space after nop counts, like qcom's disasm.
1676 - freedreno/ir3: Add a unit test for our disassembler.
1677 - freedreno/ir3: Convert remaining disasm src prints to reginfo.
1678 - freedreno/ir3: Refactor out print_reg_src().
1679 - freedreno/ir3: Add support for disasm of cat2 float32 immediates.
2120 - freedreno/ir3: fix printing half constant registers.
2121 - freedreno/ir3: Add cat4 mediump opcodes
2122 - freedreno/ir3: put the conversion back for half const to the right
2124 - freedreno/ir3: Fold const only when the type is float
2125 - freedreno/ir3: Add new ir3 pass to fold out fp16 conversions
2127 - freedreno/ir3: handle half registers for arrays during register
2142 - freedreno/ir3: enable nir_opt_loop_unroll on a6xx
2610 - freedreno/ir3: fix emit_tex_info split_dest
2611 - freedreno/ir3: don't overwrite wrmask in ir3_SAM
2630 - freedreno/ir3: fix 16-bit ssbo access
2631 - freedreno/ir3: set even bit for f2f16_rtne
2632 - freedreno/ir3: fix incorrect conversion folding
2637 - freedreno/ir3: run nir_lower_pack
2742 - freedreno/ir3: Set IR3_REG_HALF flag on src as well in immediate MOV
2746 - freedreno/ir3: Lower output precision
2750 - freedreno/ir3: Don't fold conversions into sign
2762 - freedreno/ir3: Fix sz vs class confusion
2763 - freedreno/computerator: Decouple ir3 assembler
2764 - freedreno/ir3: Move ir3 assembler to backend compiler
2765 - freedreno/ir3: Parse, but ignore @in, @out and @tex headers
2766 - freedreno/ir3: Reset lex line number when we start parsing
2767 - freedreno/ir3: Print @tex write mask using 0x%x
3351 - freedreno/ir3: Lower bools to bitsize
3622 - freedreno/ir3: shuffle a few ir3_register fields
3623 - freedreno/ir3: cleanup after lower_locals_to_regs
3624 - freedreno/ir3: fix crash when no non-input instructions
3625 - freedreno/ir3: split out delay helpers
3626 - freedreno/ir3: move nop padding to legalize
3627 - freedreno/ir3: move block-scheduling into legalize
3628 - freedreno/ir3: move atomic fixup after RA
3629 - freedreno/ir3: a bit more optmsgs debug
3630 - freedreno/ir3/ra: make use()/def() functions instead of macros
3631 - freedreno/ir3: fix kill scheduling
3632 - freedreno/ir3: post-RA sched pass
3633 - freedreno/ir3: number instructions from one
3634 - freedreno/ir3: add is_tex_or_prefetch()
3635 - freedreno/ir3: don't precolor unused inputs
3636 - freedreno/ir3: two pass register allocation
3638 - freedreno/ir3: add RA sanity check
3639 - freedreno/ir3: remove unused tex arg harder
3640 - freedreno/ir3: create fragcoord instructions in input block
3641 - freedreno/ir3: simplify split from collect
3642 - freedreno/ir3: fix a dirty lie
3644 - freedreno/ir3: fold const conversion into consumer
3652 - freedreno/computerator: rename prefix asm->ir3
3653 - freedreno/ir3: allow block->predecessors to be null
3656 - freedreno/ir3: remove from_tgsi
3663 - freedreno/ir3: remove regmask_set_if_not()
3664 - freedreno/ir3: rewrite regmask to better support a6xx+
3665 - freedreno/ir3: don't hide latency when there is none to hide
3666 - freedreno/ir3: track half-precision live values
3667 - freedreno/ir3: update SFU delay
3668 - freedreno/ir3: fix crash with samgq workaround
3669 - freedreno/ir3: don't precolor unassigned inputs
3670 - freedreno/ir3: fix assert with getinfo
3671 - freedreno/ir3: add assert
3673 - freedreno/ir3: also lower lowp frag outputs
3675 - freedreno/ir3: remove extra nops inserted in scheduler
3676 - freedreno/ir3: add simplified stall estimation
3680 - freedreno/ir3: split out has_latency_to_hide()
3681 - freedreno/ir3: fix has_latency_to_hide
3682 - freedreno/ir3: track register usage in first RA pass
3683 - freedreno/ir3: round-robin RA
3684 - freedreno/ir3: try to avoid syncs
3688 - freedreno/ir3: small cleanup and comments
3689 - freedreno/ir3: add bary_ij as src for meta:tex_prefetch
3690 - freedreno/ir3: remove unused helper
3691 - freedreno/ir3: fix bogus register footprint with tess/gs
3692 - freedreno/ir3: reformat disasm output
3693 - freedreno/ir3: convert debug bitfield to BITFIELD_BIT()
3694 - freedreno/ir3/ra: add debug option for RA debug msgs
3695 - freedreno/ir3/ra: split-up
3696 - freedreno/ir3/ra: add helper to map name to instruction
3697 - freedreno/ir3/ra: fix target register calculation
3698 - freedreno/ir3/ra: add helper to map name to array
3699 - freedreno/ir3/ra: drop extending output live-ranges
3700 - freedreno/ir3/ra: add def/use iterators
3701 - freedreno/ir3/ra: fix array liveranges
3702 - freedreno/ir3/ra: compute register target from liveranges
3703 - freedreno/ir3/ra: pick higher numbered scalars in first pass
3704 - freedreno/ir3/ra: split building regs/classes and conflicts
3705 - freedreno/ir3/ra: re-work a6xx merged register file conflicts
3715 - freedreno/ir3: fix android build
3718 - freedreno/ir3/cf: handle widening too
3719 - freedreno/ir3: fixup cat3 32b vs 16b
3720 - freedreno/ir3/cf: skip array load/store
3721 - freedreno/ir3: add a pass to collect SSA uses
3722 - freedreno/ir3/cf: use ssa-uses
3725 - freedreno/ir3: also precompile compute shaders for shaderdb
3733 - freedreno/ir3: spiff out disasm a bit
3734 - freedreno/ir3: make falsedep use's optional
3735 - freedreno/ir3: simplify grouping pass
3736 - freedreno/ir3: fix location of inserted mov's
3737 - freedreno/ir3: new pre-RA scheduler
3738 - freedreno/ir3/sched: awareness of partial liveness
3739 - freedreno/ir3/postsched: remove some leftovers
3740 - freedreno/ir3/postsched: avoid moving tex ahead of kill
3741 - freedreno/ir3: add mov/cov stats
3742 - freedreno/ir3/ra: handle array case for SFU select_reg opt
3743 - freedreno/ir3: better cleanup when removing unused instructions
3744 - freedreno/ir3: rename depth->dce
3745 - freedreno/ir3/ra: cleanup some leftovers
3750 - freedreno/ir3/ra: remove unused variable
3751 - freedreno/ir3/ra: use ir3_debug_print helper
3752 - freedreno/ir3/ra: split out helper for array assignment
3753 - freedreno/ir3/ra: only assign array base in first pass
3766 - freedreno/ir3: fix indirect cb0 load_ubo lowering