Lines Matching full:info
56 static unsigned cik_get_num_tile_pipes(struct amdgpu_gpu_info *info) in cik_get_num_tile_pipes() argument
58 unsigned mode2d = info->gb_tile_mode[CIK_TILE_MODE_COLOR_2D]; in cik_get_num_tile_pipes()
145 struct radeon_info *info, in has_tmz_support() argument
156 if (info->drm_minor >= 40) in has_tmz_support()
160 if (info->chip_class < GFX9) in has_tmz_support()
163 if (info->drm_minor < 36) in has_tmz_support()
178 bool ac_query_gpu_info(int fd, void *dev_p, struct radeon_info *info, in ac_query_gpu_info() argument
192 /* Get PCI info. */ in ac_query_gpu_info()
198 info->pci_domain = devinfo->businfo.pci->domain; in ac_query_gpu_info()
199 info->pci_bus = devinfo->businfo.pci->bus; in ac_query_gpu_info()
200 info->pci_dev = devinfo->businfo.pci->dev; in ac_query_gpu_info()
201 info->pci_func = devinfo->businfo.pci->func; in ac_query_gpu_info()
204 assert(info->drm_major == 3); in ac_query_gpu_info()
205 info->is_amdgpu = true; in ac_query_gpu_info()
250 if (info->drm_minor >= 17) { in ac_query_gpu_info()
258 if (info->drm_minor >= 17) { in ac_query_gpu_info()
266 if (info->drm_minor >= 17) { in ac_query_gpu_info()
274 if (info->drm_minor >= 27) { in ac_query_gpu_info()
282 r = amdgpu_query_firmware_version(dev, AMDGPU_INFO_FW_GFX_ME, 0, 0, &info->me_fw_version, in ac_query_gpu_info()
283 &info->me_fw_feature); in ac_query_gpu_info()
289 r = amdgpu_query_firmware_version(dev, AMDGPU_INFO_FW_GFX_PFP, 0, 0, &info->pfp_fw_version, in ac_query_gpu_info()
290 &info->pfp_fw_feature); in ac_query_gpu_info()
296 r = amdgpu_query_firmware_version(dev, AMDGPU_INFO_FW_GFX_CE, 0, 0, &info->ce_fw_version, in ac_query_gpu_info()
297 &info->ce_fw_feature); in ac_query_gpu_info()
321 r = amdgpu_query_sw_info(dev, amdgpu_sw_info_address32_hi, &info->address32_hi); in ac_query_gpu_info()
333 if (info->drm_minor >= 9) { in ac_query_gpu_info()
343 info->gart_size = meminfo.gtt.total_heap_size; in ac_query_gpu_info()
344 info->vram_size = fix_vram_size(meminfo.vram.total_heap_size); in ac_query_gpu_info()
345 info->vram_vis_size = meminfo.cpu_accessible_vram.total_heap_size; in ac_query_gpu_info()
373 info->gart_size = gtt.heap_size; in ac_query_gpu_info()
374 info->vram_size = fix_vram_size(vram.heap_size); in ac_query_gpu_info()
375 info->vram_vis_size = vram_vis.heap_size; in ac_query_gpu_info()
379 info->pci_id = amdinfo->asic_id; /* TODO: is this correct? */ in ac_query_gpu_info()
380 info->pci_rev_id = amdinfo->pci_rev_id; in ac_query_gpu_info()
381 info->vce_harvest_config = amdinfo->vce_harvest_config; in ac_query_gpu_info()
385 info->family = CHIP_##chipname; \ in ac_query_gpu_info()
386 info->name = #chipname; \ in ac_query_gpu_info()
445 if (!info->name) { in ac_query_gpu_info()
451 if (info->family >= CHIP_SIENNA_CICHLID) in ac_query_gpu_info()
452 info->chip_class = GFX10_3; in ac_query_gpu_info()
453 else if (info->family >= CHIP_NAVI10) in ac_query_gpu_info()
454 info->chip_class = GFX10; in ac_query_gpu_info()
455 else if (info->family >= CHIP_VEGA10) in ac_query_gpu_info()
456 info->chip_class = GFX9; in ac_query_gpu_info()
457 else if (info->family >= CHIP_TONGA) in ac_query_gpu_info()
458 info->chip_class = GFX8; in ac_query_gpu_info()
459 else if (info->family >= CHIP_BONAIRE) in ac_query_gpu_info()
460 info->chip_class = GFX7; in ac_query_gpu_info()
461 else if (info->family >= CHIP_TAHITI) in ac_query_gpu_info()
462 info->chip_class = GFX6; in ac_query_gpu_info()
468 info->family_id = amdinfo->family_id; in ac_query_gpu_info()
469 info->chip_external_rev = amdinfo->chip_external_rev; in ac_query_gpu_info()
470 info->marketing_name = amdgpu_get_marketing_name(dev); in ac_query_gpu_info()
471 info->is_pro_graphics = info->marketing_name && (strstr(info->marketing_name, "Pro") || in ac_query_gpu_info()
472 strstr(info->marketing_name, "PRO") || in ac_query_gpu_info()
473 strstr(info->marketing_name, "Frontier")); in ac_query_gpu_info()
476 info->has_dedicated_vram = !(amdinfo->ids_flags & AMDGPU_IDS_FLAGS_FUSION); in ac_query_gpu_info()
481 if (info->has_dedicated_vram) in ac_query_gpu_info()
482 info->max_alloc_size = info->vram_size * 0.8; in ac_query_gpu_info()
484 info->max_alloc_size = info->gart_size * 0.7; in ac_query_gpu_info()
486 info->vram_type = amdinfo->vram_type; in ac_query_gpu_info()
487 info->vram_bit_width = amdinfo->vram_bit_width; in ac_query_gpu_info()
488 info->ce_ram_size = amdinfo->ce_ram_size; in ac_query_gpu_info()
490 info->l2_cache_size = get_l2_cache_size(info->family); in ac_query_gpu_info()
491 info->l1_cache_size = 16384; in ac_query_gpu_info()
494 info->has_l2_uncached = info->chip_class >= GFX9; in ac_query_gpu_info()
497 info->gds_size = gds.gds_total_size; in ac_query_gpu_info()
498 info->gds_gfx_partition_size = gds.gds_gfx_partition_size; in ac_query_gpu_info()
500 info->max_shader_clock = amdinfo->max_engine_clk / 1000; in ac_query_gpu_info()
501 info->max_memory_clock = amdinfo->max_memory_clk / 1000; in ac_query_gpu_info()
502 info->num_tcc_blocks = device_info.num_tcc_blocks; in ac_query_gpu_info()
503 info->max_se = amdinfo->num_shader_engines; in ac_query_gpu_info()
504 info->max_sh_per_se = amdinfo->num_shader_arrays_per_engine; in ac_query_gpu_info()
505 info->has_hw_decode = (uvd.available_rings != 0) || (vcn_dec.available_rings != 0) || in ac_query_gpu_info()
507 info->uvd_fw_version = uvd.available_rings ? uvd_version : 0; in ac_query_gpu_info()
508 info->vce_fw_version = vce.available_rings ? vce_version : 0; in ac_query_gpu_info()
509 info->uvd_enc_supported = uvd_enc.available_rings ? true : false; in ac_query_gpu_info()
510 info->has_userptr = true; in ac_query_gpu_info()
511 info->has_syncobj = has_syncobj(fd); in ac_query_gpu_info()
512 info->has_timeline_syncobj = has_timeline_syncobj(fd); in ac_query_gpu_info()
513 info->has_syncobj_wait_for_submit = info->has_syncobj && info->drm_minor >= 20; in ac_query_gpu_info()
514 info->has_fence_to_handle = info->has_syncobj && info->drm_minor >= 21; in ac_query_gpu_info()
515 info->has_ctx_priority = info->drm_minor >= 22; in ac_query_gpu_info()
516 info->has_local_buffers = info->drm_minor >= 20; in ac_query_gpu_info()
517 info->kernel_flushes_hdp_before_ib = true; in ac_query_gpu_info()
518 info->htile_cmask_support_1d_tiling = true; in ac_query_gpu_info()
519 info->si_TA_CS_BC_BASE_ADDR_allowed = true; in ac_query_gpu_info()
520 info->has_bo_metadata = true; in ac_query_gpu_info()
521 info->has_gpu_reset_status_query = true; in ac_query_gpu_info()
522 info->has_eqaa_surface_allocator = true; in ac_query_gpu_info()
523 info->has_format_bc1_through_bc7 = true; in ac_query_gpu_info()
525 info->kernel_flushes_tc_l2_after_ib = info->chip_class != GFX8 || info->drm_minor >= 2; in ac_query_gpu_info()
526 info->has_indirect_compute_dispatch = true; in ac_query_gpu_info()
528 info->has_unaligned_shader_loads = info->chip_class != GFX6; in ac_query_gpu_info()
532 info->has_sparse_vm_mappings = info->chip_class >= GFX7 && info->drm_minor >= 13; in ac_query_gpu_info()
533 info->has_2d_tiling = true; in ac_query_gpu_info()
534 info->has_read_registers_query = true; in ac_query_gpu_info()
535 info->has_scheduled_fence_dependency = info->drm_minor >= 28; in ac_query_gpu_info()
536 info->mid_command_buffer_preemption_enabled = amdinfo->ids_flags & AMDGPU_IDS_FLAGS_PREEMPTION; in ac_query_gpu_info()
537 info->has_tmz_support = has_tmz_support(dev, info, amdinfo); in ac_query_gpu_info()
539 info->pa_sc_tile_steering_override = device_info.pa_sc_tile_steering_override; in ac_query_gpu_info()
540 info->num_render_backends = amdinfo->rb_pipes; in ac_query_gpu_info()
542 if (info->family == CHIP_KAVERI) in ac_query_gpu_info()
543 info->num_render_backends = 2; in ac_query_gpu_info()
546 if (info->chip_class >= GFX10_3 && info->max_se > 1) { in ac_query_gpu_info()
547 unsigned num_rbs_per_se = info->num_render_backends / info->max_se; in ac_query_gpu_info()
548 info->num_se = util_bitcount(amdinfo->enabled_rb_pipes_mask) / num_rbs_per_se; in ac_query_gpu_info()
550 info->num_se = info->max_se; in ac_query_gpu_info()
553 info->clock_crystal_freq = amdinfo->gpu_counter_freq; in ac_query_gpu_info()
554 if (!info->clock_crystal_freq) { in ac_query_gpu_info()
556 info->clock_crystal_freq = 1; in ac_query_gpu_info()
558 if (info->chip_class >= GFX10) { in ac_query_gpu_info()
559 info->tcc_cache_line_size = 128; in ac_query_gpu_info()
561 if (info->drm_minor >= 35) { in ac_query_gpu_info()
562 info->tcc_harvested = device_info.tcc_disabled_mask != 0; in ac_query_gpu_info()
565 info->tcc_harvested = (info->vram_size / info->num_tcc_blocks) != 512 * 1024 * 1024; in ac_query_gpu_info()
568 info->tcc_cache_line_size = 64; in ac_query_gpu_info()
570 info->gb_addr_config = amdinfo->gb_addr_cfg; in ac_query_gpu_info()
571 if (info->chip_class >= GFX9) { in ac_query_gpu_info()
572 info->num_tile_pipes = 1 << G_0098F8_NUM_PIPES(amdinfo->gb_addr_cfg); in ac_query_gpu_info()
573 info->pipe_interleave_bytes = 256 << G_0098F8_PIPE_INTERLEAVE_SIZE_GFX9(amdinfo->gb_addr_cfg); in ac_query_gpu_info()
575 info->num_tile_pipes = cik_get_num_tile_pipes(amdinfo); in ac_query_gpu_info()
576 info->pipe_interleave_bytes = 256 << G_0098F8_PIPE_INTERLEAVE_SIZE_GFX6(amdinfo->gb_addr_cfg); in ac_query_gpu_info()
578 info->r600_has_virtual_memory = true; in ac_query_gpu_info()
585 info->lds_size_per_workgroup = info->chip_class >= GFX10 ? 128 * 1024 : 64 * 1024; in ac_query_gpu_info()
586 info->lds_granularity = info->chip_class >= GFX7 ? 128 * 4 : 64 * 4; in ac_query_gpu_info()
591 info->has_graphics = gfx.available_rings > 0; in ac_query_gpu_info()
592 info->num_rings[RING_GFX] = util_bitcount(gfx.available_rings); in ac_query_gpu_info()
593 info->num_rings[RING_COMPUTE] = util_bitcount(compute.available_rings); in ac_query_gpu_info()
594 info->num_rings[RING_DMA] = util_bitcount(dma.available_rings); in ac_query_gpu_info()
595 info->num_rings[RING_UVD] = util_bitcount(uvd.available_rings); in ac_query_gpu_info()
596 info->num_rings[RING_VCE] = util_bitcount(vce.available_rings); in ac_query_gpu_info()
597 info->num_rings[RING_UVD_ENC] = util_bitcount(uvd_enc.available_rings); in ac_query_gpu_info()
598 info->num_rings[RING_VCN_DEC] = util_bitcount(vcn_dec.available_rings); in ac_query_gpu_info()
599 info->num_rings[RING_VCN_ENC] = util_bitcount(vcn_enc.available_rings); in ac_query_gpu_info()
600 info->num_rings[RING_VCN_JPEG] = util_bitcount(vcn_jpeg.available_rings); in ac_query_gpu_info()
603 info->ib_pad_dw_mask[RING_GFX] = 0xff; in ac_query_gpu_info()
604 info->ib_pad_dw_mask[RING_COMPUTE] = 0xff; in ac_query_gpu_info()
605 info->ib_pad_dw_mask[RING_DMA] = 0xf; in ac_query_gpu_info()
606 info->ib_pad_dw_mask[RING_UVD] = 0xf; in ac_query_gpu_info()
607 info->ib_pad_dw_mask[RING_VCE] = 0x3f; in ac_query_gpu_info()
608 info->ib_pad_dw_mask[RING_UVD_ENC] = 0x3f; in ac_query_gpu_info()
609 info->ib_pad_dw_mask[RING_VCN_DEC] = 0xf; in ac_query_gpu_info()
610 info->ib_pad_dw_mask[RING_VCN_ENC] = 0x3f; in ac_query_gpu_info()
611 info->ib_pad_dw_mask[RING_VCN_JPEG] = 0xf; in ac_query_gpu_info()
617 info->has_clear_state = info->chip_class >= GFX7; in ac_query_gpu_info()
619 info->has_distributed_tess = in ac_query_gpu_info()
620 info->chip_class >= GFX10 || (info->chip_class >= GFX8 && info->max_se >= 2); in ac_query_gpu_info()
622 info->has_dcc_constant_encode = in ac_query_gpu_info()
623 info->family == CHIP_RAVEN2 || info->family == CHIP_RENOIR || info->chip_class >= GFX10; in ac_query_gpu_info()
625 info->has_rbplus = info->family == CHIP_STONEY || info->chip_class >= GFX9; in ac_query_gpu_info()
630 info->rbplus_allowed = in ac_query_gpu_info()
631 info->has_rbplus && in ac_query_gpu_info()
632 (info->family == CHIP_STONEY || info->family == CHIP_VEGA12 || info->family == CHIP_RAVEN || in ac_query_gpu_info()
633 info->family == CHIP_RAVEN2 || info->family == CHIP_RENOIR || info->chip_class >= GFX10_3); in ac_query_gpu_info()
635 info->has_out_of_order_rast = in ac_query_gpu_info()
636 info->chip_class >= GFX8 && info->chip_class <= GFX9 && info->max_se >= 2; in ac_query_gpu_info()
639 info->has_packed_math_16bit = info->chip_class >= GFX9; in ac_query_gpu_info()
642 info->has_load_ctx_reg_pkt = in ac_query_gpu_info()
643 info->chip_class >= GFX9 || (info->chip_class >= GFX8 && info->me_fw_feature >= 41); in ac_query_gpu_info()
645 info->cpdma_prefetch_writes_memory = info->chip_class <= GFX8; in ac_query_gpu_info()
647 info->has_gfx9_scissor_bug = info->family == CHIP_VEGA10 || info->family == CHIP_RAVEN; in ac_query_gpu_info()
649 info->has_tc_compat_zrange_bug = info->chip_class >= GFX8 && info->chip_class <= GFX9; in ac_query_gpu_info()
651 info->has_msaa_sample_loc_bug = in ac_query_gpu_info()
652 (info->family >= CHIP_POLARIS10 && info->family <= CHIP_POLARIS12) || in ac_query_gpu_info()
653 info->family == CHIP_VEGA10 || info->family == CHIP_RAVEN; in ac_query_gpu_info()
655 info->has_ls_vgpr_init_bug = info->family == CHIP_VEGA10 || info->family == CHIP_RAVEN; in ac_query_gpu_info()
658 info->num_good_compute_units = 0; in ac_query_gpu_info()
659 for (i = 0; i < info->max_se; i++) { in ac_query_gpu_info()
660 for (j = 0; j < info->max_sh_per_se; j++) { in ac_query_gpu_info()
662 * The cu bitmap in amd gpu info structure is in ac_query_gpu_info()
673 info->cu_mask[i % 4][j + i / 4] = amdinfo->cu_bitmap[i % 4][j + i / 4]; in ac_query_gpu_info()
674 info->num_good_compute_units += util_bitcount(info->cu_mask[i][j]); in ac_query_gpu_info()
681 unsigned cu_group = info->chip_class >= GFX10 ? 2 : 1; in ac_query_gpu_info()
682 info->max_good_cu_per_sa = in ac_query_gpu_info()
683 DIV_ROUND_UP(info->num_good_compute_units, (info->num_se * info->max_sh_per_se * cu_group)) * in ac_query_gpu_info()
685 info->min_good_cu_per_sa = in ac_query_gpu_info()
686 (info->num_good_compute_units / (info->num_se * info->max_sh_per_se * cu_group)) * cu_group; in ac_query_gpu_info()
688 memcpy(info->si_tile_mode_array, amdinfo->gb_tile_mode, sizeof(amdinfo->gb_tile_mode)); in ac_query_gpu_info()
689 info->enabled_rb_mask = amdinfo->enabled_rb_pipes_mask; in ac_query_gpu_info()
691 memcpy(info->cik_macrotile_mode_array, amdinfo->gb_macro_tile_mode, in ac_query_gpu_info()
694 info->pte_fragment_size = alignment_info.size_local; in ac_query_gpu_info()
695 info->gart_page_size = alignment_info.size_remote; in ac_query_gpu_info()
697 if (info->chip_class == GFX6) in ac_query_gpu_info()
698 info->gfx_ib_pad_with_type2 = true; in ac_query_gpu_info()
720 if (info->chip_class >= GFX9) in ac_query_gpu_info()
721 ib_align = MAX2(ib_align, info->tcc_cache_line_size); in ac_query_gpu_info()
727 info->ib_alignment = ib_align; in ac_query_gpu_info()
729 if ((info->drm_minor >= 31 && (info->family == CHIP_RAVEN || info->family == CHIP_RAVEN2 || in ac_query_gpu_info()
730 info->family == CHIP_RENOIR)) || in ac_query_gpu_info()
731 (info->drm_minor >= 34 && (info->family == CHIP_NAVI12 || info->family == CHIP_NAVI14)) || in ac_query_gpu_info()
732 info->chip_class >= GFX10_3) { in ac_query_gpu_info()
733 if (info->num_render_backends == 1) in ac_query_gpu_info()
734 info->use_display_dcc_unaligned = true; in ac_query_gpu_info()
736 info->use_display_dcc_with_retile_blit = true; in ac_query_gpu_info()
739 info->has_gds_ordered_append = info->chip_class >= GFX7 && info->drm_minor >= 29; in ac_query_gpu_info()
741 if (info->chip_class >= GFX9) { in ac_query_gpu_info()
744 switch (info->family) { in ac_query_gpu_info()
772 info->pc_lines = pc_lines; in ac_query_gpu_info()
774 if (info->chip_class >= GFX10) { in ac_query_gpu_info()
775 info->pbb_max_alloc_count = pc_lines / 3; in ac_query_gpu_info()
777 info->pbb_max_alloc_count = MIN2(128, pc_lines / (4 * info->max_se)); in ac_query_gpu_info()
782 if (info->chip_class >= GFX10) in ac_query_gpu_info()
783 info->num_sdp_interfaces = device_info.num_tcc_blocks; in ac_query_gpu_info()
785 if (info->chip_class >= GFX10_3) in ac_query_gpu_info()
786 info->max_wave64_per_simd = 16; in ac_query_gpu_info()
787 else if (info->chip_class == GFX10) in ac_query_gpu_info()
788 info->max_wave64_per_simd = 20; in ac_query_gpu_info()
789 else if (info->family >= CHIP_POLARIS10 && info->family <= CHIP_VEGAM) in ac_query_gpu_info()
790 info->max_wave64_per_simd = 8; in ac_query_gpu_info()
792 info->max_wave64_per_simd = 10; in ac_query_gpu_info()
794 if (info->chip_class >= GFX10) { in ac_query_gpu_info()
795 info->num_physical_sgprs_per_simd = 128 * info->max_wave64_per_simd; in ac_query_gpu_info()
796 info->min_sgpr_alloc = 128; in ac_query_gpu_info()
797 info->sgpr_alloc_granularity = 128; in ac_query_gpu_info()
799 info->use_late_alloc = info->num_render_backends > 4; in ac_query_gpu_info()
800 } else if (info->chip_class >= GFX8) { in ac_query_gpu_info()
801 info->num_physical_sgprs_per_simd = 800; in ac_query_gpu_info()
802 info->min_sgpr_alloc = 16; in ac_query_gpu_info()
803 info->sgpr_alloc_granularity = 16; in ac_query_gpu_info()
804 info->use_late_alloc = true; in ac_query_gpu_info()
806 info->num_physical_sgprs_per_simd = 512; in ac_query_gpu_info()
807 info->min_sgpr_alloc = 8; in ac_query_gpu_info()
808 info->sgpr_alloc_granularity = 8; in ac_query_gpu_info()
810 info->use_late_alloc = info->family != CHIP_KABINI; in ac_query_gpu_info()
813 info->max_sgpr_alloc = info->family == CHIP_TONGA || info->family == CHIP_ICELAND ? 96 : 104; in ac_query_gpu_info()
815 info->min_wave64_vgpr_alloc = 4; in ac_query_gpu_info()
816 info->max_vgpr_alloc = 256; in ac_query_gpu_info()
817 info->wave64_vgpr_alloc_granularity = 4; in ac_query_gpu_info()
819 info->num_physical_wave64_vgprs_per_simd = info->chip_class >= GFX10 ? 512 : 256; in ac_query_gpu_info()
820 info->num_simd_per_compute_unit = info->chip_class >= GFX10 ? 2 : 4; in ac_query_gpu_info()
835 void ac_compute_device_uuid(struct radeon_info *info, char *uuid, size_t size) in ac_compute_device_uuid() argument
842 * Use the device info directly instead of using a sha1. GL/VK UUIDs in ac_compute_device_uuid()
847 uint_uuid[0] = info->pci_domain; in ac_compute_device_uuid()
848 uint_uuid[1] = info->pci_bus; in ac_compute_device_uuid()
849 uint_uuid[2] = info->pci_dev; in ac_compute_device_uuid()
850 uint_uuid[3] = info->pci_func; in ac_compute_device_uuid()
853 void ac_print_gpu_info(struct radeon_info *info, FILE *f) in ac_print_gpu_info() argument
855 fprintf(f, "Device info:\n"); in ac_print_gpu_info()
856 fprintf(f, " pci (domain:bus:dev.func): %04x:%02x:%02x.%x\n", info->pci_domain, info->pci_bus, in ac_print_gpu_info()
857 info->pci_dev, info->pci_func); in ac_print_gpu_info()
859 fprintf(f, " name = %s\n", info->name); in ac_print_gpu_info()
860 fprintf(f, " marketing_name = %s\n", info->marketing_name); in ac_print_gpu_info()
861 fprintf(f, " is_pro_graphics = %u\n", info->is_pro_graphics); in ac_print_gpu_info()
862 fprintf(f, " pci_id = 0x%x\n", info->pci_id); in ac_print_gpu_info()
863 fprintf(f, " pci_rev_id = 0x%x\n", info->pci_rev_id); in ac_print_gpu_info()
864 fprintf(f, " family = %i\n", info->family); in ac_print_gpu_info()
865 fprintf(f, " chip_class = %i\n", info->chip_class); in ac_print_gpu_info()
866 fprintf(f, " family_id = %i\n", info->family_id); in ac_print_gpu_info()
867 fprintf(f, " chip_external_rev = %i\n", info->chip_external_rev); in ac_print_gpu_info()
868 fprintf(f, " clock_crystal_freq = %i\n", info->clock_crystal_freq); in ac_print_gpu_info()
871 fprintf(f, " has_graphics = %i\n", info->has_graphics); in ac_print_gpu_info()
872 fprintf(f, " num_rings[RING_GFX] = %i\n", info->num_rings[RING_GFX]); in ac_print_gpu_info()
873 fprintf(f, " num_rings[RING_DMA] = %i\n", info->num_rings[RING_DMA]); in ac_print_gpu_info()
874 fprintf(f, " num_rings[RING_COMPUTE] = %u\n", info->num_rings[RING_COMPUTE]); in ac_print_gpu_info()
875 fprintf(f, " num_rings[RING_UVD] = %i\n", info->num_rings[RING_UVD]); in ac_print_gpu_info()
876 fprintf(f, " num_rings[RING_VCE] = %i\n", info->num_rings[RING_VCE]); in ac_print_gpu_info()
877 fprintf(f, " num_rings[RING_UVD_ENC] = %i\n", info->num_rings[RING_UVD_ENC]); in ac_print_gpu_info()
878 fprintf(f, " num_rings[RING_VCN_DEC] = %i\n", info->num_rings[RING_VCN_DEC]); in ac_print_gpu_info()
879 fprintf(f, " num_rings[RING_VCN_ENC] = %i\n", info->num_rings[RING_VCN_ENC]); in ac_print_gpu_info()
880 fprintf(f, " num_rings[RING_VCN_JPEG] = %i\n", info->num_rings[RING_VCN_JPEG]); in ac_print_gpu_info()
881 fprintf(f, " has_clear_state = %u\n", info->has_clear_state); in ac_print_gpu_info()
882 fprintf(f, " has_distributed_tess = %u\n", info->has_distributed_tess); in ac_print_gpu_info()
883 fprintf(f, " has_dcc_constant_encode = %u\n", info->has_dcc_constant_encode); in ac_print_gpu_info()
884 fprintf(f, " has_rbplus = %u\n", info->has_rbplus); in ac_print_gpu_info()
885 fprintf(f, " rbplus_allowed = %u\n", info->rbplus_allowed); in ac_print_gpu_info()
886 fprintf(f, " has_load_ctx_reg_pkt = %u\n", info->has_load_ctx_reg_pkt); in ac_print_gpu_info()
887 fprintf(f, " has_out_of_order_rast = %u\n", info->has_out_of_order_rast); in ac_print_gpu_info()
888 fprintf(f, " cpdma_prefetch_writes_memory = %u\n", info->cpdma_prefetch_writes_memory); in ac_print_gpu_info()
889 fprintf(f, " has_gfx9_scissor_bug = %i\n", info->has_gfx9_scissor_bug); in ac_print_gpu_info()
890 fprintf(f, " has_tc_compat_zrange_bug = %i\n", info->has_tc_compat_zrange_bug); in ac_print_gpu_info()
891 fprintf(f, " has_msaa_sample_loc_bug = %i\n", info->has_msaa_sample_loc_bug); in ac_print_gpu_info()
892 fprintf(f, " has_ls_vgpr_init_bug = %i\n", info->has_ls_vgpr_init_bug); in ac_print_gpu_info()
895 fprintf(f, " use_display_dcc_unaligned = %u\n", info->use_display_dcc_unaligned); in ac_print_gpu_info()
896 … fprintf(f, " use_display_dcc_with_retile_blit = %u\n", info->use_display_dcc_with_retile_blit); in ac_print_gpu_info()
898 fprintf(f, "Memory info:\n"); in ac_print_gpu_info()
899 fprintf(f, " pte_fragment_size = %u\n", info->pte_fragment_size); in ac_print_gpu_info()
900 fprintf(f, " gart_page_size = %u\n", info->gart_page_size); in ac_print_gpu_info()
901 fprintf(f, " gart_size = %i MB\n", (int)DIV_ROUND_UP(info->gart_size, 1024 * 1024)); in ac_print_gpu_info()
902 fprintf(f, " vram_size = %i MB\n", (int)DIV_ROUND_UP(info->vram_size, 1024 * 1024)); in ac_print_gpu_info()
903 fprintf(f, " vram_vis_size = %i MB\n", (int)DIV_ROUND_UP(info->vram_vis_size, 1024 * 1024)); in ac_print_gpu_info()
904 fprintf(f, " vram_type = %i\n", info->vram_type); in ac_print_gpu_info()
905 fprintf(f, " vram_bit_width = %i\n", info->vram_bit_width); in ac_print_gpu_info()
906 fprintf(f, " gds_size = %u kB\n", info->gds_size / 1024); in ac_print_gpu_info()
907 fprintf(f, " gds_gfx_partition_size = %u kB\n", info->gds_gfx_partition_size / 1024); in ac_print_gpu_info()
908 fprintf(f, " max_alloc_size = %i MB\n", (int)DIV_ROUND_UP(info->max_alloc_size, 1024 * 1024)); in ac_print_gpu_info()
909 fprintf(f, " min_alloc_size = %u\n", info->min_alloc_size); in ac_print_gpu_info()
910 fprintf(f, " address32_hi = %u\n", info->address32_hi); in ac_print_gpu_info()
911 fprintf(f, " has_dedicated_vram = %u\n", info->has_dedicated_vram); in ac_print_gpu_info()
912 fprintf(f, " num_sdp_interfaces = %u\n", info->num_sdp_interfaces); in ac_print_gpu_info()
913 fprintf(f, " num_tcc_blocks = %i\n", info->num_tcc_blocks); in ac_print_gpu_info()
914 fprintf(f, " tcc_cache_line_size = %u\n", info->tcc_cache_line_size); in ac_print_gpu_info()
915 fprintf(f, " tcc_harvested = %u\n", info->tcc_harvested); in ac_print_gpu_info()
916 fprintf(f, " pc_lines = %u\n", info->pc_lines); in ac_print_gpu_info()
917 fprintf(f, " lds_size_per_workgroup = %u\n", info->lds_size_per_workgroup); in ac_print_gpu_info()
918 fprintf(f, " lds_granularity = %i\n", info->lds_granularity); in ac_print_gpu_info()
919 fprintf(f, " max_memory_clock = %i\n", info->max_memory_clock); in ac_print_gpu_info()
920 fprintf(f, " ce_ram_size = %i\n", info->ce_ram_size); in ac_print_gpu_info()
921 fprintf(f, " l1_cache_size = %i\n", info->l1_cache_size); in ac_print_gpu_info()
922 fprintf(f, " l2_cache_size = %i\n", info->l2_cache_size); in ac_print_gpu_info()
924 fprintf(f, "CP info:\n"); in ac_print_gpu_info()
925 fprintf(f, " gfx_ib_pad_with_type2 = %i\n", info->gfx_ib_pad_with_type2); in ac_print_gpu_info()
926 fprintf(f, " ib_alignment = %u\n", info->ib_alignment); in ac_print_gpu_info()
927 fprintf(f, " me_fw_version = %i\n", info->me_fw_version); in ac_print_gpu_info()
928 fprintf(f, " me_fw_feature = %i\n", info->me_fw_feature); in ac_print_gpu_info()
929 fprintf(f, " pfp_fw_version = %i\n", info->pfp_fw_version); in ac_print_gpu_info()
930 fprintf(f, " pfp_fw_feature = %i\n", info->pfp_fw_feature); in ac_print_gpu_info()
931 fprintf(f, " ce_fw_version = %i\n", info->ce_fw_version); in ac_print_gpu_info()
932 fprintf(f, " ce_fw_feature = %i\n", info->ce_fw_feature); in ac_print_gpu_info()
934 fprintf(f, "Multimedia info:\n"); in ac_print_gpu_info()
935 fprintf(f, " has_hw_decode = %u\n", info->has_hw_decode); in ac_print_gpu_info()
936 fprintf(f, " uvd_enc_supported = %u\n", info->uvd_enc_supported); in ac_print_gpu_info()
937 fprintf(f, " uvd_fw_version = %u\n", info->uvd_fw_version); in ac_print_gpu_info()
938 fprintf(f, " vce_fw_version = %u\n", info->vce_fw_version); in ac_print_gpu_info()
939 fprintf(f, " vce_harvest_config = %i\n", info->vce_harvest_config); in ac_print_gpu_info()
942 fprintf(f, " drm = %i.%i.%i\n", info->drm_major, info->drm_minor, info->drm_patchlevel); in ac_print_gpu_info()
943 fprintf(f, " has_userptr = %i\n", info->has_userptr); in ac_print_gpu_info()
944 fprintf(f, " has_syncobj = %u\n", info->has_syncobj); in ac_print_gpu_info()
945 fprintf(f, " has_syncobj_wait_for_submit = %u\n", info->has_syncobj_wait_for_submit); in ac_print_gpu_info()
946 fprintf(f, " has_timeline_syncobj = %u\n", info->has_timeline_syncobj); in ac_print_gpu_info()
947 fprintf(f, " has_fence_to_handle = %u\n", info->has_fence_to_handle); in ac_print_gpu_info()
948 fprintf(f, " has_ctx_priority = %u\n", info->has_ctx_priority); in ac_print_gpu_info()
949 fprintf(f, " has_local_buffers = %u\n", info->has_local_buffers); in ac_print_gpu_info()
950 fprintf(f, " kernel_flushes_hdp_before_ib = %u\n", info->kernel_flushes_hdp_before_ib); in ac_print_gpu_info()
951 fprintf(f, " htile_cmask_support_1d_tiling = %u\n", info->htile_cmask_support_1d_tiling); in ac_print_gpu_info()
952 fprintf(f, " si_TA_CS_BC_BASE_ADDR_allowed = %u\n", info->si_TA_CS_BC_BASE_ADDR_allowed); in ac_print_gpu_info()
953 fprintf(f, " has_bo_metadata = %u\n", info->has_bo_metadata); in ac_print_gpu_info()
954 fprintf(f, " has_gpu_reset_status_query = %u\n", info->has_gpu_reset_status_query); in ac_print_gpu_info()
955 fprintf(f, " has_eqaa_surface_allocator = %u\n", info->has_eqaa_surface_allocator); in ac_print_gpu_info()
956 fprintf(f, " has_format_bc1_through_bc7 = %u\n", info->has_format_bc1_through_bc7); in ac_print_gpu_info()
957 fprintf(f, " kernel_flushes_tc_l2_after_ib = %u\n", info->kernel_flushes_tc_l2_after_ib); in ac_print_gpu_info()
958 fprintf(f, " has_indirect_compute_dispatch = %u\n", info->has_indirect_compute_dispatch); in ac_print_gpu_info()
959 fprintf(f, " has_unaligned_shader_loads = %u\n", info->has_unaligned_shader_loads); in ac_print_gpu_info()
960 fprintf(f, " has_sparse_vm_mappings = %u\n", info->has_sparse_vm_mappings); in ac_print_gpu_info()
961 fprintf(f, " has_2d_tiling = %u\n", info->has_2d_tiling); in ac_print_gpu_info()
962 fprintf(f, " has_read_registers_query = %u\n", info->has_read_registers_query); in ac_print_gpu_info()
963 fprintf(f, " has_gds_ordered_append = %u\n", info->has_gds_ordered_append); in ac_print_gpu_info()
964 fprintf(f, " has_scheduled_fence_dependency = %u\n", info->has_scheduled_fence_dependency); in ac_print_gpu_info()
966 info->mid_command_buffer_preemption_enabled); in ac_print_gpu_info()
967 fprintf(f, " has_tmz_support = %u\n", info->has_tmz_support); in ac_print_gpu_info()
969 fprintf(f, "Shader core info:\n"); in ac_print_gpu_info()
970 fprintf(f, " max_shader_clock = %i\n", info->max_shader_clock); in ac_print_gpu_info()
971 fprintf(f, " num_good_compute_units = %i\n", info->num_good_compute_units); in ac_print_gpu_info()
972 fprintf(f, " max_good_cu_per_sa = %i\n", info->max_good_cu_per_sa); in ac_print_gpu_info()
973 fprintf(f, " min_good_cu_per_sa = %i\n", info->min_good_cu_per_sa); in ac_print_gpu_info()
974 fprintf(f, " max_se = %i\n", info->max_se); in ac_print_gpu_info()
975 fprintf(f, " num_se = %i\n", info->num_se); in ac_print_gpu_info()
976 fprintf(f, " max_sh_per_se = %i\n", info->max_sh_per_se); in ac_print_gpu_info()
977 fprintf(f, " max_wave64_per_simd = %i\n", info->max_wave64_per_simd); in ac_print_gpu_info()
978 fprintf(f, " num_physical_sgprs_per_simd = %i\n", info->num_physical_sgprs_per_simd); in ac_print_gpu_info()
980 info->num_physical_wave64_vgprs_per_simd); in ac_print_gpu_info()
981 fprintf(f, " num_simd_per_compute_unit = %i\n", info->num_simd_per_compute_unit); in ac_print_gpu_info()
982 fprintf(f, " min_sgpr_alloc = %i\n", info->min_sgpr_alloc); in ac_print_gpu_info()
983 fprintf(f, " max_sgpr_alloc = %i\n", info->max_sgpr_alloc); in ac_print_gpu_info()
984 fprintf(f, " sgpr_alloc_granularity = %i\n", info->sgpr_alloc_granularity); in ac_print_gpu_info()
985 fprintf(f, " min_wave64_vgpr_alloc = %i\n", info->min_wave64_vgpr_alloc); in ac_print_gpu_info()
986 fprintf(f, " max_vgpr_alloc = %i\n", info->max_vgpr_alloc); in ac_print_gpu_info()
987 fprintf(f, " wave64_vgpr_alloc_granularity = %i\n", info->wave64_vgpr_alloc_granularity); in ac_print_gpu_info()
989 fprintf(f, "Render backend info:\n"); in ac_print_gpu_info()
990 fprintf(f, " pa_sc_tile_steering_override = 0x%x\n", info->pa_sc_tile_steering_override); in ac_print_gpu_info()
991 fprintf(f, " num_render_backends = %i\n", info->num_render_backends); in ac_print_gpu_info()
992 fprintf(f, " num_tile_pipes = %i\n", info->num_tile_pipes); in ac_print_gpu_info()
993 fprintf(f, " pipe_interleave_bytes = %i\n", info->pipe_interleave_bytes); in ac_print_gpu_info()
994 fprintf(f, " enabled_rb_mask = 0x%x\n", info->enabled_rb_mask); in ac_print_gpu_info()
995 fprintf(f, " max_alignment = %u\n", (unsigned)info->max_alignment); in ac_print_gpu_info()
996 fprintf(f, " pbb_max_alloc_count = %u\n", info->pbb_max_alloc_count); in ac_print_gpu_info()
998 fprintf(f, "GB_ADDR_CONFIG: 0x%08x\n", info->gb_addr_config); in ac_print_gpu_info()
999 if (info->chip_class >= GFX10) { in ac_print_gpu_info()
1000 fprintf(f, " num_pipes = %u\n", 1 << G_0098F8_NUM_PIPES(info->gb_addr_config)); in ac_print_gpu_info()
1002 256 << G_0098F8_PIPE_INTERLEAVE_SIZE_GFX9(info->gb_addr_config)); in ac_print_gpu_info()
1004 1 << G_0098F8_MAX_COMPRESSED_FRAGS(info->gb_addr_config)); in ac_print_gpu_info()
1005 if (info->chip_class >= GFX10_3) in ac_print_gpu_info()
1006 fprintf(f, " num_pkrs = %u\n", 1 << G_0098F8_NUM_PKRS(info->gb_addr_config)); in ac_print_gpu_info()
1007 } else if (info->chip_class == GFX9) { in ac_print_gpu_info()
1008 fprintf(f, " num_pipes = %u\n", 1 << G_0098F8_NUM_PIPES(info->gb_addr_config)); in ac_print_gpu_info()
1010 256 << G_0098F8_PIPE_INTERLEAVE_SIZE_GFX9(info->gb_addr_config)); in ac_print_gpu_info()
1012 1 << G_0098F8_MAX_COMPRESSED_FRAGS(info->gb_addr_config)); in ac_print_gpu_info()
1014 1 << G_0098F8_BANK_INTERLEAVE_SIZE(info->gb_addr_config)); in ac_print_gpu_info()
1015 fprintf(f, " num_banks = %u\n", 1 << G_0098F8_NUM_BANKS(info->gb_addr_config)); in ac_print_gpu_info()
1017 16 << G_0098F8_SHADER_ENGINE_TILE_SIZE(info->gb_addr_config)); in ac_print_gpu_info()
1019 1 << G_0098F8_NUM_SHADER_ENGINES_GFX9(info->gb_addr_config)); in ac_print_gpu_info()
1020 fprintf(f, " num_gpus = %u (raw)\n", G_0098F8_NUM_GPUS_GFX9(info->gb_addr_config)); in ac_print_gpu_info()
1022 G_0098F8_MULTI_GPU_TILE_SIZE(info->gb_addr_config)); in ac_print_gpu_info()
1023 fprintf(f, " num_rb_per_se = %u\n", 1 << G_0098F8_NUM_RB_PER_SE(info->gb_addr_config)); in ac_print_gpu_info()
1024 fprintf(f, " row_size = %u\n", 1024 << G_0098F8_ROW_SIZE(info->gb_addr_config)); in ac_print_gpu_info()
1025 … fprintf(f, " num_lower_pipes = %u (raw)\n", G_0098F8_NUM_LOWER_PIPES(info->gb_addr_config)); in ac_print_gpu_info()
1026 fprintf(f, " se_enable = %u (raw)\n", G_0098F8_SE_ENABLE(info->gb_addr_config)); in ac_print_gpu_info()
1028 fprintf(f, " num_pipes = %u\n", 1 << G_0098F8_NUM_PIPES(info->gb_addr_config)); in ac_print_gpu_info()
1030 256 << G_0098F8_PIPE_INTERLEAVE_SIZE_GFX6(info->gb_addr_config)); in ac_print_gpu_info()
1032 1 << G_0098F8_BANK_INTERLEAVE_SIZE(info->gb_addr_config)); in ac_print_gpu_info()
1034 1 << G_0098F8_NUM_SHADER_ENGINES_GFX6(info->gb_addr_config)); in ac_print_gpu_info()
1036 16 << G_0098F8_SHADER_ENGINE_TILE_SIZE(info->gb_addr_config)); in ac_print_gpu_info()
1037 fprintf(f, " num_gpus = %u (raw)\n", G_0098F8_NUM_GPUS_GFX6(info->gb_addr_config)); in ac_print_gpu_info()
1039 G_0098F8_MULTI_GPU_TILE_SIZE(info->gb_addr_config)); in ac_print_gpu_info()
1040 fprintf(f, " row_size = %u\n", 1024 << G_0098F8_ROW_SIZE(info->gb_addr_config)); in ac_print_gpu_info()
1041 … fprintf(f, " num_lower_pipes = %u (raw)\n", G_0098F8_NUM_LOWER_PIPES(info->gb_addr_config)); in ac_print_gpu_info()
1076 void ac_get_raster_config(struct radeon_info *info, uint32_t *raster_config_p, in ac_get_raster_config() argument
1081 switch (info->family) { in ac_get_raster_config()
1142 if (info->family == CHIP_KAVERI && !info->is_amdgpu) in ac_get_raster_config()
1148 if (info->family == CHIP_FIJI && info->cik_macrotile_mode_array[0] == 0x000000e8) { in ac_get_raster_config()
1157 se_tile_repeat = MAX2(se_width, se_height) * info->max_se; in ac_get_raster_config()
1165 void ac_get_harvested_configs(struct radeon_info *info, unsigned raster_config, in ac_get_harvested_configs() argument
1168 unsigned sh_per_se = MAX2(info->max_sh_per_se, 1); in ac_get_harvested_configs()
1169 unsigned num_se = MAX2(info->max_se, 1); in ac_get_harvested_configs()
1170 unsigned rb_mask = info->enabled_rb_mask; in ac_get_harvested_configs()
1171 unsigned num_rb = MIN2(info->num_render_backends, 16); in ac_get_harvested_configs()
1186 if (info->chip_class >= GFX7) { in ac_get_harvested_configs()
1263 unsigned ac_get_compute_resource_limits(struct radeon_info *info, unsigned waves_per_threadgroup, in ac_get_compute_resource_limits() argument
1268 if (info->chip_class >= GFX7) { in ac_get_compute_resource_limits()
1269 unsigned num_cu_per_se = info->num_good_compute_units / info->num_se; in ac_get_compute_resource_limits()