Lines Matching refs:gfx9
1294 return surf->u.gfx9.dcc.independent_64B_blocks && !surf->u.gfx9.dcc.independent_128B_blocks && in is_dcc_supported_by_L2()
1295 surf->u.gfx9.dcc.max_compressed_block_size == V_028C78_MAX_BLOCK_SIZE_64B; in is_dcc_supported_by_L2()
1300 return !surf->u.gfx9.dcc.independent_64B_blocks && surf->u.gfx9.dcc.independent_128B_blocks && in is_dcc_supported_by_L2()
1301 surf->u.gfx9.dcc.max_compressed_block_size <= V_028C78_MAX_BLOCK_SIZE_128B; in is_dcc_supported_by_L2()
1308 return surf->u.gfx9.dcc.independent_64B_blocks != surf->u.gfx9.dcc.independent_128B_blocks && in is_dcc_supported_by_L2()
1309 (!surf->u.gfx9.dcc.independent_64B_blocks || in is_dcc_supported_by_L2()
1310 surf->u.gfx9.dcc.max_compressed_block_size == V_028C78_MAX_BLOCK_SIZE_64B) && in is_dcc_supported_by_L2()
1311 (!surf->u.gfx9.dcc.independent_128B_blocks || in is_dcc_supported_by_L2()
1312 surf->u.gfx9.dcc.max_compressed_block_size <= V_028C78_MAX_BLOCK_SIZE_128B); in is_dcc_supported_by_L2()
1319 return surf->u.gfx9.dcc.independent_128B_blocks && in is_dcc_supported_by_L2()
1320 surf->u.gfx9.dcc.max_compressed_block_size <= V_028C78_MAX_BLOCK_SIZE_128B; in is_dcc_supported_by_L2()
1345 assert(surf->u.gfx9.dcc.independent_64B_blocks && in is_dcc_supported_by_DCN()
1346 surf->u.gfx9.dcc.max_compressed_block_size == V_028C78_MAX_BLOCK_SIZE_64B); in is_dcc_supported_by_DCN()
1351 if (info->chip_class == GFX10 && surf->u.gfx9.dcc.independent_128B_blocks) in is_dcc_supported_by_DCN()
1356 (surf->u.gfx9.dcc.independent_64B_blocks && in is_dcc_supported_by_DCN()
1357 surf->u.gfx9.dcc.max_compressed_block_size == V_028C78_MAX_BLOCK_SIZE_64B)); in is_dcc_supported_by_DCN()
1380 surf->u.gfx9.stencil.swizzle_mode = in->swizzleMode; in gfx9_compute_miptree()
1381 surf->u.gfx9.stencil.epitch = in gfx9_compute_miptree()
1384 surf->u.gfx9.stencil_offset = align(surf->surf_size, out.baseAlign); in gfx9_compute_miptree()
1385 surf->surf_size = surf->u.gfx9.stencil_offset + out.surfSize; in gfx9_compute_miptree()
1389 surf->u.gfx9.surf.swizzle_mode = in->swizzleMode; in gfx9_compute_miptree()
1390 surf->u.gfx9.surf.epitch = out.epitchIsHeight ? out.mipChainHeight - 1 : out.mipChainPitch - 1; in gfx9_compute_miptree()
1395 surf->u.gfx9.fmask.swizzle_mode = surf->u.gfx9.surf.swizzle_mode & ~0x3; in gfx9_compute_miptree()
1396 surf->u.gfx9.fmask.epitch = surf->u.gfx9.surf.epitch; in gfx9_compute_miptree()
1398 surf->u.gfx9.surf_slice_size = out.sliceSize; in gfx9_compute_miptree()
1399 surf->u.gfx9.surf_pitch = out.pitch; in gfx9_compute_miptree()
1400 surf->u.gfx9.surf_height = out.height; in gfx9_compute_miptree()
1405 surf->u.gfx9.surf.swizzle_mode == ADDR_SW_LINEAR) { in gfx9_compute_miptree()
1407 surf->u.gfx9.surf_pitch = align(surf->u.gfx9.surf_pitch / surf->blk_w, 256 / surf->bpe); in gfx9_compute_miptree()
1408 surf->u.gfx9.surf.epitch = in gfx9_compute_miptree()
1409 MAX2(surf->u.gfx9.surf.epitch, surf->u.gfx9.surf_pitch * surf->blk_w - 1); in gfx9_compute_miptree()
1415 surf->u.gfx9.surf_slice_size = in gfx9_compute_miptree()
1416 MAX2(surf->u.gfx9.surf_slice_size, in gfx9_compute_miptree()
1417 surf->u.gfx9.surf_pitch * out.height * surf->bpe * surf->blk_w); in gfx9_compute_miptree()
1418 surf->surf_size = surf->u.gfx9.surf_slice_size * in->numSlices; in gfx9_compute_miptree()
1423 surf->u.gfx9.offset[i] = mip_info[i].offset; in gfx9_compute_miptree()
1424 surf->u.gfx9.pitch[i] = mip_info[i].pitch; in gfx9_compute_miptree()
1428 surf->u.gfx9.base_mip_width = mip_info[0].pitch; in gfx9_compute_miptree()
1429 surf->u.gfx9.base_mip_height = mip_info[0].height; in gfx9_compute_miptree()
1526 surf->u.gfx9.dcc.rb_aligned = din.dccKeyFlags.rbAligned; in gfx9_compute_miptree()
1527 surf->u.gfx9.dcc.pipe_aligned = din.dccKeyFlags.pipeAligned; in gfx9_compute_miptree()
1528 surf->u.gfx9.dcc_block_width = dout.compressBlkWidth; in gfx9_compute_miptree()
1529 surf->u.gfx9.dcc_block_height = dout.compressBlkHeight; in gfx9_compute_miptree()
1530 surf->u.gfx9.dcc_block_depth = dout.compressBlkDepth; in gfx9_compute_miptree()
1576 surf->u.gfx9.display_dcc_size = surf->dcc_size; in gfx9_compute_miptree()
1577 surf->u.gfx9.display_dcc_alignment = surf->dcc_alignment; in gfx9_compute_miptree()
1578 surf->u.gfx9.display_dcc_pitch_max = dout.pitch - 1; in gfx9_compute_miptree()
1579 surf->u.gfx9.dcc_pitch_max = dout.pitch - 1; in gfx9_compute_miptree()
1591 assert(surf->u.gfx9.dcc.pipe_aligned || surf->u.gfx9.dcc.rb_aligned); in gfx9_compute_miptree()
1597 surf->u.gfx9.display_dcc_size = dout.dccRamSize; in gfx9_compute_miptree()
1598 surf->u.gfx9.display_dcc_alignment = dout.dccRamBaseAlign; in gfx9_compute_miptree()
1599 surf->u.gfx9.display_dcc_pitch_max = dout.pitch - 1; in gfx9_compute_miptree()
1600 assert(surf->u.gfx9.display_dcc_size <= surf->dcc_size); in gfx9_compute_miptree()
1602 surf->u.gfx9.dcc_retile_use_uint16 = in gfx9_compute_miptree()
1603 surf->u.gfx9.display_dcc_size <= UINT16_MAX + 1 && surf->dcc_size <= UINT16_MAX + 1; in gfx9_compute_miptree()
1646 surf->u.gfx9.dcc_retile_num_elements = in gfx9_compute_miptree()
1650 surf->u.gfx9.dcc_retile_num_elements = align(surf->u.gfx9.dcc_retile_num_elements, 4); in gfx9_compute_miptree()
1672 surf->u.gfx9.dcc_retile_map = ac_compute_dcc_retile_map( in gfx9_compute_miptree()
1673 addrlib, info, retile_dim[0], retile_dim[1], surf->u.gfx9.dcc.rb_aligned, in gfx9_compute_miptree()
1674 surf->u.gfx9.dcc.pipe_aligned, surf->u.gfx9.dcc_retile_use_uint16, in gfx9_compute_miptree()
1675 surf->u.gfx9.dcc_retile_num_elements, &addrin); in gfx9_compute_miptree()
1676 if (!surf->u.gfx9.dcc_retile_map) in gfx9_compute_miptree()
1703 surf->u.gfx9.fmask.swizzle_mode = fin.swizzleMode; in gfx9_compute_miptree()
1704 surf->u.gfx9.fmask.epitch = fout.pitch - 1; in gfx9_compute_miptree()
1757 cin.swizzleMode = surf->u.gfx9.fmask.swizzle_mode; in gfx9_compute_miptree()
1871 surf->u.gfx9.dcc.independent_64B_blocks = 1; in gfx9_compute_surface()
1872 surf->u.gfx9.dcc.independent_128B_blocks = 0; in gfx9_compute_surface()
1873 surf->u.gfx9.dcc.max_compressed_block_size = V_028C78_MAX_BLOCK_SIZE_64B; in gfx9_compute_surface()
1875 surf->u.gfx9.dcc.independent_64B_blocks = 0; in gfx9_compute_surface()
1876 surf->u.gfx9.dcc.independent_128B_blocks = 1; in gfx9_compute_surface()
1877 surf->u.gfx9.dcc.max_compressed_block_size = V_028C78_MAX_BLOCK_SIZE_128B; in gfx9_compute_surface()
1899 surf->u.gfx9.dcc.independent_64B_blocks = 1; in gfx9_compute_surface()
1900 surf->u.gfx9.dcc.independent_128B_blocks = 0; in gfx9_compute_surface()
1901 surf->u.gfx9.dcc.max_compressed_block_size = V_028C78_MAX_BLOCK_SIZE_64B; in gfx9_compute_surface()
1905 surf->u.gfx9.dcc.independent_64B_blocks = 1; in gfx9_compute_surface()
1906 surf->u.gfx9.dcc.independent_128B_blocks = 1; in gfx9_compute_surface()
1907 surf->u.gfx9.dcc.max_compressed_block_size = V_028C78_MAX_BLOCK_SIZE_64B; in gfx9_compute_surface()
1923 AddrSurfInfoIn.swizzleMode = surf->u.gfx9.surf.swizzle_mode; in gfx9_compute_surface()
1937 surf->u.gfx9.resource_type = AddrSurfInfoIn.resourceType; in gfx9_compute_surface()
1946 surf->u.gfx9.surf_offset = 0; in gfx9_compute_surface()
1947 surf->u.gfx9.stencil_offset = 0; in gfx9_compute_surface()
1949 surf->u.gfx9.dcc_retile_use_uint16 = false; in gfx9_compute_surface()
1950 surf->u.gfx9.dcc_retile_num_elements = 0; in gfx9_compute_surface()
1951 surf->u.gfx9.dcc_retile_map = NULL; in gfx9_compute_surface()
1977 surf->is_linear = surf->u.gfx9.surf.swizzle_mode == ADDR_SW_LINEAR; in gfx9_compute_surface()
1983 r = Addr2IsValidDisplaySwizzleMode(addrlib->handle, surf->u.gfx9.surf.swizzle_mode, in gfx9_compute_surface()
1990 (!is_dcc_supported_by_DCN(info, config, surf, surf->u.gfx9.dcc.rb_aligned, in gfx9_compute_surface()
1991 surf->u.gfx9.dcc.pipe_aligned) || in gfx9_compute_surface()
1993 (info->use_display_dcc_with_retile_blit && !surf->u.gfx9.dcc_retile_num_elements))) in gfx9_compute_surface()
2005 assert(is_dcc_supported_by_CB(info, surf->u.gfx9.surf.swizzle_mode)); in gfx9_compute_surface()
2007 assert(is_dcc_supported_by_DCN(info, config, surf, surf->u.gfx9.dcc.rb_aligned, in gfx9_compute_surface()
2008 surf->u.gfx9.dcc.pipe_aligned)); in gfx9_compute_surface()
2033 switch (surf->u.gfx9.surf.swizzle_mode) { in gfx9_compute_surface()
2144 if (info->chip_class >= GFX9 && surf->u.gfx9.dcc_retile_num_elements) { in ac_compute_surface()
2146 surf->display_dcc_offset = align64(surf->total_size, surf->u.gfx9.display_dcc_alignment); in ac_compute_surface()
2147 surf->total_size = surf->display_dcc_offset + surf->u.gfx9.display_dcc_size; in ac_compute_surface()
2225 surf->u.gfx9.surf.swizzle_mode = AMDGPU_TILING_GET(tiling_flags, SWIZZLE_MODE); in ac_surface_set_bo_metadata()
2226 surf->u.gfx9.dcc.independent_64B_blocks = in ac_surface_set_bo_metadata()
2228 surf->u.gfx9.dcc.independent_128B_blocks = in ac_surface_set_bo_metadata()
2230 surf->u.gfx9.dcc.max_compressed_block_size = in ac_surface_set_bo_metadata()
2232 surf->u.gfx9.display_dcc_pitch_max = AMDGPU_TILING_GET(tiling_flags, DCC_PITCH_MAX); in ac_surface_set_bo_metadata()
2235 surf->u.gfx9.surf.swizzle_mode > 0 ? RADEON_SURF_MODE_2D : RADEON_SURF_MODE_LINEAR_ALIGNED; in ac_surface_set_bo_metadata()
2272 *tiling_flags |= AMDGPU_TILING_SET(SWIZZLE_MODE, surf->u.gfx9.surf.swizzle_mode); in ac_surface_get_bo_metadata()
2274 *tiling_flags |= AMDGPU_TILING_SET(DCC_PITCH_MAX, surf->u.gfx9.display_dcc_pitch_max); in ac_surface_get_bo_metadata()
2276 AMDGPU_TILING_SET(DCC_INDEPENDENT_64B, surf->u.gfx9.dcc.independent_64B_blocks); in ac_surface_get_bo_metadata()
2278 AMDGPU_TILING_SET(DCC_INDEPENDENT_128B, surf->u.gfx9.dcc.independent_128B_blocks); in ac_surface_get_bo_metadata()
2280 surf->u.gfx9.dcc.max_compressed_block_size); in ac_surface_get_bo_metadata()
2320 offset = surf->u.gfx9.surf_offset; in ac_surface_set_umd_metadata()
2371 surf->u.gfx9.dcc.pipe_aligned = G_008F24_META_PIPE_ALIGNED(desc[5]); in ac_surface_set_umd_metadata()
2372 surf->u.gfx9.dcc.rb_aligned = G_008F24_META_RB_ALIGNED(desc[5]); in ac_surface_set_umd_metadata()
2375 if (!surf->u.gfx9.dcc.pipe_aligned && !surf->u.gfx9.dcc.rb_aligned) in ac_surface_set_umd_metadata()
2383 surf->u.gfx9.dcc.pipe_aligned = G_00A018_META_PIPE_ALIGNED(desc[6]); in ac_surface_set_umd_metadata()
2463 surf->u.gfx9.surf_pitch = pitch; in ac_surface_override_offset_stride()
2465 surf->u.gfx9.surf.epitch = pitch - 1; in ac_surface_override_offset_stride()
2466 surf->u.gfx9.surf_slice_size = (uint64_t)pitch * surf->u.gfx9.surf_height * surf->bpe; in ac_surface_override_offset_stride()
2468 surf->u.gfx9.surf_offset = offset; in ac_surface_override_offset_stride()
2469 if (surf->u.gfx9.stencil_offset) in ac_surface_override_offset_stride()
2470 surf->u.gfx9.stencil_offset += offset; in ac_surface_override_offset_stride()