205       if (op.regClass().is_subdword())  in fill()
212       clear(op.physReg(), op.regClass());  in clear()
216       if (def.regClass().is_subdword())  in fill()
223       clear(def.physReg(), def.regClass());  in clear()
492    RegClass rc = instr->definitions[idx].regClass();  in add_subdword_definition()
570       copy.second.setTemp(ctx.program->allocateTmp(copy.second.regClass()));  in update_renames()
571       ctx.assignments.emplace_back(copy.second.physReg(), copy.second.regClass());  in update_renames()
832          Definition pc_def = Definition(res.first, pc_op.regClass());  in get_regs_for_copies()
924       Definition pc_def = Definition(PhysReg{reg_lo}, pc_op.regClass());  in get_regs_for_copies()
956          reg_file.block(instr->operands[j].physReg(), instr->operands[j].regClass());  in get_reg_impl()
1200             if (get_reg_specified(ctx, reg_file, temp.regClass(), parallelcopies, instr, reg))  in get_reg()
1210       if (get_reg_specified(ctx, reg_file, temp.regClass(), parallelcopies, instr, reg))  in get_reg()
1231             if (get_reg_specified(ctx, reg_file, temp.regClass(), parallelcopies, instr, reg))  in get_reg()
1237       DefInfo info(ctx, ctx.pseudo_dummy, vec->definitions[0].regClass(), -1);  in get_reg()
1243          if (get_reg_specified(ctx, reg_file, temp.regClass(), parallelcopies, instr, reg))  in get_reg()
1248    DefInfo info(ctx, instr, temp.regClass(), operand_index);  in get_reg()
1290    RegClass rc = temp.regClass();  in get_reg_create_vector()
1469       if (op.isTemp() && op.regClass().is_subdword())  in handle_pseudo()
1556          Definition pc_def = Definition(PhysReg{reg}, pc_op.regClass());  in get_reg_for_operand()
1568    Definition pc_def = Definition(dst, pc_op.regClass());  in get_reg_for_operand()
1586    if (preds.size() == 0 || val.regClass() == val.regClass().as_linear())  in handle_live_in()
1597       new_val = ctx.program->allocateTmp(val.regClass());  in handle_live_in()
1604       if (tmp.regClass() == new_val.regClass())  in handle_live_in()
1632          new_val = ctx.program->allocateTmp(val.regClass());  in handle_live_in()
1637             if (ops[i].regClass() == new_val.regClass())  in handle_live_in()
1753                if (op.isTemp() && op.regClass() == instr->definitions[0].regClass()) {  in register_allocation()
1786 …if (it != temp_to_phi_ressources.end() && def.regClass() == phi_ressources[it->second][0].regClass…  in register_allocation()
1799                if (op.isTemp() && op.isFirstKillBeforeDef() && def.regClass() == op.regClass()) {  in register_allocation()
1866          ctx.assignments[definition.tempId()] = {definition.physReg(), definition.regClass()};  in register_allocation()
1880 …          assert(ctx.assignments[ctx.affinities[definition.tempId()]].rc == definition.regClass());  in register_allocation()
1898                ctx.assignments[definition.tempId()] = {definition.physReg(), definition.regClass()};  in register_allocation()
1923 …        if (get_reg_specified(ctx, register_file, definition.regClass(), parallelcopy, phi, reg)) {  in register_allocation()
1951 …  ctx.assignments[prev_phi->definitions[0].tempId()] = {pc.second.physReg(), pc.second.regClass()};  in register_allocation()
1977             ctx.assignments[definition.tempId()] = {definition.physReg(), definition.regClass()};  in register_allocation()
1983             if (op.isTemp() && op.regClass() == phi->definitions[0].regClass())  in register_allocation()
2047             if (operand_can_use_reg(program->chip_class, instr, i, reg, operand.regClass()))  in register_allocation()
2129                     instr->operands[1].regClass().type() == RegType::vgpr) {  in register_allocation()
2141             adjust_max_used_regs(ctx, definition.regClass(), definition.physReg());  in register_allocation()
2154                DefInfo info(ctx, instr, definition.regClass(), -1);  in register_allocation()
2182             ctx.assignments[definition.tempId()] = {definition.physReg(), definition.regClass()};  in register_allocation()
2200 …       if (get_reg_specified(ctx, register_file, definition->regClass(), parallelcopy, instr, reg))  in register_allocation()
2211 …       if (get_reg_specified(ctx, register_file, definition->regClass(), parallelcopy, instr, reg))  in register_allocation()
2221                if (definition->regClass().is_subdword() && definition->bytes() < 4) {  in register_allocation()
2241             ctx.assignments[definition->tempId()] = {definition->physReg(), definition->regClass()};  in register_allocation()
2257                add_subdword_operand(ctx, instr, i, op.physReg().byte(), op.regClass());  in register_allocation()
2304                      register_file.block(op.physReg(), op.regClass());  in register_allocation()
2357                      register_file.block(op.physReg(), op.regClass());  in register_allocation()