Lines Matching refs:radeon_cmdbuf
726 struct radeon_cmdbuf *initial_preamble_cs;
727 struct radeon_cmdbuf *initial_full_flush_preamble_cs;
728 struct radeon_cmdbuf *continue_preamble_cs;
776 struct radeon_cmdbuf *empty_cs[RADV_MAX_QUEUE_FAMILIES];
843 struct radeon_cmdbuf *thread_trace_start_cs[2];
844 struct radeon_cmdbuf *thread_trace_stop_cs[2];
1432 struct radeon_cmdbuf *cs;
1480 struct radeon_cmdbuf *cs);
1482 struct radeon_cmdbuf *cs);
1486 void si_write_viewport(struct radeon_cmdbuf *cs, int first_vp,
1488 void si_write_scissors(struct radeon_cmdbuf *cs, int first,
1496 void si_cs_emit_write_event_eop(struct radeon_cmdbuf *cs,
1505 void radv_cp_wait_mem(struct radeon_cmdbuf *cs, uint32_t op, uint64_t va,
1507 void si_cs_emit_cache_flush(struct radeon_cmdbuf *cs,
1551 void radv_emit_default_sample_locations(struct radeon_cmdbuf *cs, int nr_samples);
1585 radv_emit_shader_pointer_head(struct radeon_cmdbuf *cs, in radv_emit_shader_pointer_head()
1595 struct radeon_cmdbuf *cs, in radv_emit_shader_pointer_body()
1610 struct radeon_cmdbuf *cs, in radv_emit_shader_pointer()
1729 struct radeon_cmdbuf cs;
1731 struct radeon_cmdbuf ctx_cs;
2407 struct radeon_cmdbuf *cs);
2522 struct radeon_cmdbuf *cs,