867 				    struct ac_shader_config *config_out)  in radv_postprocess_config()  argument
889 	*config_out = *config_in;  in radv_postprocess_config()
890 	config_out->num_vgprs = num_vgprs;  in radv_postprocess_config()
891 	config_out->num_sgprs = num_sgprs;  in radv_postprocess_config()
892 	config_out->num_shared_vgprs = num_shared_vgprs;  in radv_postprocess_config()
894 	config_out->rsrc2 = S_00B12C_USER_SGPR(info->num_user_sgprs) |  in radv_postprocess_config()
906 		config_out->rsrc2 |= S_00B12C_SO_BASE0_EN(!!info->so.strides[0]) |  in radv_postprocess_config()
913 	config_out->rsrc1 = S_00B848_VGPRS((num_vgprs - 1) /  in radv_postprocess_config()
916 			    S_00B848_FLOAT_MODE(config_out->float_mode);  in radv_postprocess_config()
919 		config_out->rsrc2 |= S_00B22C_USER_SGPR_MSB_GFX10(info->num_user_sgprs >> 5);  in radv_postprocess_config()
921 		config_out->rsrc1 |= S_00B228_SGPRS((num_sgprs - 1) / 8);  in radv_postprocess_config()
922 		config_out->rsrc2 |= S_00B22C_USER_SGPR_MSB_GFX9(info->num_user_sgprs >> 5);  in radv_postprocess_config()
928 			config_out->rsrc1 |= S_00B228_MEM_ORDERED(pdevice->rad_info.chip_class >= GFX10);  in radv_postprocess_config()
929 			config_out->rsrc2 |= S_00B22C_OC_LDS_EN(1) |  in radv_postprocess_config()
935 			config_out->rsrc2 |= S_00B12C_OC_LDS_EN(1) |  in radv_postprocess_config()
941 			config_out->rsrc1 |= S_00B128_MEM_ORDERED(pdevice->rad_info.chip_class >= GFX10);  in radv_postprocess_config()
942 			config_out->rsrc2 |= S_00B12C_OC_LDS_EN(1) |  in radv_postprocess_config()
945 		config_out->rsrc2 |= S_00B22C_SHARED_VGPR_CNT(num_shared_vgpr_blocks);  in radv_postprocess_config()
955 				config_out->rsrc2 |= S_00B42C_LDS_SIZE_GFX10(info->tcs.num_lds_blocks) |  in radv_postprocess_config()
959 				config_out->rsrc2 |= S_00B42C_LDS_SIZE_GFX9(info->tcs.num_lds_blocks) |  in radv_postprocess_config()
963 			config_out->rsrc2 |= S_00B12C_OC_LDS_EN(1) |  in radv_postprocess_config()
966 		config_out->rsrc1 |= S_00B428_MEM_ORDERED(pdevice->rad_info.chip_class >= GFX10) |  in radv_postprocess_config()
968 		config_out->rsrc2 |= S_00B42C_SHARED_VGPR_CNT(num_shared_vgpr_blocks);  in radv_postprocess_config()
972 			config_out->rsrc1 |= S_00B228_MEM_ORDERED(pdevice->rad_info.chip_class >= GFX10);  in radv_postprocess_config()
999 			config_out->rsrc1 |= S_00B128_MEM_ORDERED(pdevice->rad_info.chip_class >= GFX10);  in radv_postprocess_config()
1001 		config_out->rsrc2 |= S_00B12C_SHARED_VGPR_CNT(num_shared_vgpr_blocks) |  in radv_postprocess_config()
1005 		config_out->rsrc1 |= S_00B028_MEM_ORDERED(pdevice->rad_info.chip_class >= GFX10);  in radv_postprocess_config()
1006 		config_out->rsrc2 |= S_00B02C_SHARED_VGPR_CNT(num_shared_vgpr_blocks) |  in radv_postprocess_config()
1011 		config_out->rsrc1 |= S_00B228_MEM_ORDERED(pdevice->rad_info.chip_class >= GFX10) |  in radv_postprocess_config()
1013 		config_out->rsrc2 |= S_00B22C_SHARED_VGPR_CNT(num_shared_vgpr_blocks) |  in radv_postprocess_config()
1017 		config_out->rsrc1 |= S_00B848_MEM_ORDERED(pdevice->rad_info.chip_class >= GFX10) |  in radv_postprocess_config()
1019 		config_out->rsrc2 |=  in radv_postprocess_config()
1028 		config_out->rsrc3 |= S_00B8A0_SHARED_VGPR_CNT(num_shared_vgpr_blocks);  in radv_postprocess_config()
1064 		config_out->rsrc1 |= S_00B228_GS_VGPR_COMP_CNT(gs_vgpr_comp_cnt) |  in radv_postprocess_config()
1066 		config_out->rsrc2 |= S_00B22C_ES_VGPR_COMP_CNT(es_vgpr_comp_cnt) |  in radv_postprocess_config()
1100 		config_out->rsrc1 |= S_00B228_GS_VGPR_COMP_CNT(gs_vgpr_comp_cnt);  in radv_postprocess_config()
1101 		config_out->rsrc2 |= S_00B22C_ES_VGPR_COMP_CNT(es_vgpr_comp_cnt) |  in radv_postprocess_config()
1105 		config_out->rsrc1 |= S_00B428_LS_VGPR_COMP_CNT(vgpr_comp_cnt);  in radv_postprocess_config()
1107 		config_out->rsrc1 |= S_00B128_VGPR_COMP_CNT(vgpr_comp_cnt);  in radv_postprocess_config()