Lines Matching refs:IR3_REG_HALF
77 IR3_REG_HALF = 0x004, enumerator
665 unsigned type_reg1 = (reg1->flags & (IR3_REG_HIGH | IR3_REG_HALF)); in is_same_type_reg()
666 unsigned type_reg2 = (reg2->flags & (IR3_REG_HIGH | IR3_REG_HALF)); in is_same_type_reg()
772 return !!(instr->regs[0]->flags & IR3_REG_HALF); in is_half()
1357 if (src->regs[0]->flags & IR3_REG_HALF) in __ssa_src()
1358 flags |= IR3_REG_HALF; in __ssa_src()
1376 unsigned flags = (type_size(type) < 32) ? IR3_REG_HALF : 0; in create_immed_typed()
1397 unsigned flags = (type_size(type) < 32) ? IR3_REG_HALF : 0; in create_uniform_typed()
1435 unsigned flags = (type_size(type) < 32) ? IR3_REG_HALF : 0; in ir3_MOV()
1455 unsigned dst_flags = (type_size(dst_type) < 32) ? IR3_REG_HALF : 0; in ir3_COV()
1456 unsigned src_flags = (type_size(src_type) < 32) ? IR3_REG_HALF : 0; in ir3_COV()
1458 debug_assert((src->regs[0]->flags & IR3_REG_HALF) == src_flags); in ir3_COV()
1670 __ssa_src(sam, samp_tex, (flags & IR3_INSTR_B) ? 0 : IR3_REG_HALF); in INSTR0()
1750 bool half = reg->flags & IR3_REG_HALF; in regmask_set()
1764 bool half = reg->flags & IR3_REG_HALF; in regmask_get()