Lines Matching full:so
9 * Software is furnished to do so, subject to the following conditions:
48 * is executed, so max_regs from the shader instructions might not properly
396 /* Given an array of constlen's, decrease some of them so that the sum stays
450 * single stage, so it's always satisfied with the first variant. in ir3_trim_constlen()
495 static void dump_output(FILE *out, struct ir3_shader_variant *so, in dump_output() argument
499 regid = ir3_find_output_regid(so, slot); in dump_output()
504 input_name(struct ir3_shader_variant *so, int i) in input_name() argument
506 if (so->inputs[i].sysval) { in input_name()
507 return gl_system_value_name(so->inputs[i].slot); in input_name()
508 } else if (so->type == MESA_SHADER_VERTEX) { in input_name()
509 return gl_vert_attrib_name(so->inputs[i].slot); in input_name()
511 return gl_varying_slot_name(so->inputs[i].slot); in input_name()
516 output_name(struct ir3_shader_variant *so, int i) in output_name() argument
518 if (so->type == MESA_SHADER_FRAGMENT) { in output_name()
519 return gl_frag_result_name(so->outputs[i].slot); in output_name()
521 switch (so->outputs[i].slot) { in output_name()
529 return gl_varying_slot_name(so->outputs[i].slot); in output_name()
535 ir3_shader_disasm(struct ir3_shader_variant *so, uint32_t *bin, FILE *out) in ir3_shader_disasm() argument
537 struct ir3 *ir = so->ir; in ir3_shader_disasm()
539 const char *type = ir3_shader_stage(so); in ir3_shader_disasm()
556 for (i = 0; i < so->num_sampler_prefetch; i++) { in ir3_shader_disasm()
557 const struct ir3_sampler_prefetch *fetch = &so->sampler_prefetch[i]; in ir3_shader_disasm()
576 const struct ir3_const_state *const_state = ir3_const_state(so); in ir3_shader_disasm()
586 disasm_a3xx(bin, so->info.sizedwords, 0, out, ir->compiler->gpu_id); in ir3_shader_disasm()
589 for (i = 0; i < so->outputs_count; i++) { in ir3_shader_disasm()
590 uint8_t regid = so->outputs[i].regid; in ir3_shader_disasm()
591 const char *reg_type = so->outputs[i].half ? "hr" : "r"; in ir3_shader_disasm()
594 output_name(so, i)); in ir3_shader_disasm()
599 for (i = 0; i < so->inputs_count; i++) { in ir3_shader_disasm()
600 uint8_t regid = so->inputs[i].regid; in ir3_shader_disasm()
603 input_name(so, i), in ir3_shader_disasm()
604 so->inputs[i].slot, in ir3_shader_disasm()
605 so->inputs[i].compmask, in ir3_shader_disasm()
606 so->inputs[i].inloc, in ir3_shader_disasm()
607 so->inputs[i].bary); in ir3_shader_disasm()
613 type, so->shader->id, so->id, in ir3_shader_disasm()
614 so->info.instrs_count, in ir3_shader_disasm()
615 so->info.nops_count, in ir3_shader_disasm()
616 so->info.instrs_count - so->info.nops_count, in ir3_shader_disasm()
617 so->info.mov_count, so->info.cov_count, in ir3_shader_disasm()
618 so->info.sizedwords); in ir3_shader_disasm()
621 type, so->shader->id, so->id, in ir3_shader_disasm()
622 so->info.last_baryf, in ir3_shader_disasm()
623 so->info.max_half_reg + 1, in ir3_shader_disasm()
624 so->info.max_reg + 1, in ir3_shader_disasm()
625 so->constlen); in ir3_shader_disasm()
628 type, so->shader->id, so->id, in ir3_shader_disasm()
629 so->info.instrs_per_cat[0], in ir3_shader_disasm()
630 so->info.instrs_per_cat[1], in ir3_shader_disasm()
631 so->info.instrs_per_cat[2], in ir3_shader_disasm()
632 so->info.instrs_per_cat[3], in ir3_shader_disasm()
633 so->info.instrs_per_cat[4], in ir3_shader_disasm()
634 so->info.instrs_per_cat[5], in ir3_shader_disasm()
635 so->info.instrs_per_cat[6], in ir3_shader_disasm()
636 so->info.instrs_per_cat[7]); in ir3_shader_disasm()
639 type, so->shader->id, so->id, in ir3_shader_disasm()
640 so->info.sstall, in ir3_shader_disasm()
641 so->info.ss, in ir3_shader_disasm()
642 so->info.sy, in ir3_shader_disasm()
643 so->max_sun, in ir3_shader_disasm()
644 so->loops); in ir3_shader_disasm()
647 switch (so->type) { in ir3_shader_disasm()
649 dump_output(out, so, VARYING_SLOT_POS, "pos"); in ir3_shader_disasm()
650 dump_output(out, so, VARYING_SLOT_PSIZ, "psize"); in ir3_shader_disasm()
654 ir3_find_sysval_regid(so, SYSTEM_VALUE_BARYCENTRIC_PERSP_PIXEL)); in ir3_shader_disasm()
656 ir3_find_sysval_regid(so, SYSTEM_VALUE_BARYCENTRIC_PERSP_CENTROID)); in ir3_shader_disasm()
658 ir3_find_sysval_regid(so, SYSTEM_VALUE_BARYCENTRIC_PERSP_SIZE)); in ir3_shader_disasm()
659 dump_output(out, so, FRAG_RESULT_DEPTH, "posz"); in ir3_shader_disasm()
660 if (so->color0_mrt) { in ir3_shader_disasm()
661 dump_output(out, so, FRAG_RESULT_COLOR, "color"); in ir3_shader_disasm()
663 dump_output(out, so, FRAG_RESULT_DATA0, "data0"); in ir3_shader_disasm()
664 dump_output(out, so, FRAG_RESULT_DATA1, "data1"); in ir3_shader_disasm()
665 dump_output(out, so, FRAG_RESULT_DATA2, "data2"); in ir3_shader_disasm()
666 dump_output(out, so, FRAG_RESULT_DATA3, "data3"); in ir3_shader_disasm()
667 dump_output(out, so, FRAG_RESULT_DATA4, "data4"); in ir3_shader_disasm()
668 dump_output(out, so, FRAG_RESULT_DATA5, "data5"); in ir3_shader_disasm()
669 dump_output(out, so, FRAG_RESULT_DATA6, "data6"); in ir3_shader_disasm()
670 dump_output(out, so, FRAG_RESULT_DATA7, "data7"); in ir3_shader_disasm()
673 ir3_find_sysval_regid(so, SYSTEM_VALUE_FRAG_COORD)); in ir3_shader_disasm()
675 ir3_find_sysval_regid(so, SYSTEM_VALUE_FRONT_FACE)); in ir3_shader_disasm()
686 ir3_shader_outputs(const struct ir3_shader *so) in ir3_shader_outputs() argument
688 return so->nir->info.outputs_written; in ir3_shader_outputs()