818    const struct ir3_shader_variant *last_shader;  in tu6_emit_vpc()  local
820       last_shader = gs;  in tu6_emit_vpc()
822       last_shader = ds;  in tu6_emit_vpc()
824       last_shader = vs;  in tu6_emit_vpc()
827    const struct reg_config *cfg = &reg_config[last_shader->type];  in tu6_emit_vpc()
835       ir3_link_shaders(&linkage, last_shader, fs, true);  in tu6_emit_vpc()
837    if (last_shader->shader->stream_output.num_outputs)  in tu6_emit_vpc()
838       tu6_link_streamout(&linkage, last_shader);  in tu6_emit_vpc()
854       ir3_find_output_regid(last_shader, VARYING_SLOT_PSIZ);  in tu6_emit_vpc()
856       ir3_find_output_regid(last_shader, VARYING_SLOT_LAYER);  in tu6_emit_vpc()
858       ir3_find_output_regid(last_shader, VARYING_SLOT_VIEWPORT);  in tu6_emit_vpc()
860       ir3_find_output_regid(last_shader, VARYING_SLOT_CLIP_DIST0);  in tu6_emit_vpc()
862       ir3_find_output_regid(last_shader, VARYING_SLOT_CLIP_DIST1);  in tu6_emit_vpc()
882    for (unsigned i = 0; i < last_shader->outputs_count; i++) {  in tu6_emit_vpc()
883       if (last_shader->outputs[i].slot != VARYING_SLOT_POS)  in tu6_emit_vpc()
889       ir3_link_add(&linkage, last_shader->outputs[i].regid,  in tu6_emit_vpc()
890                    0xf, position_loc + 4 * last_shader->outputs[i].view);  in tu6_emit_vpc()
891       extra_pos = MAX2(extra_pos, last_shader->outputs[i].view);  in tu6_emit_vpc()
899    uint8_t clip_cull_mask = last_shader->clip_mask | last_shader->cull_mask;  in tu6_emit_vpc()
912    tu6_setup_streamout(cs, last_shader, &linkage);  in tu6_emit_vpc()
954    tu_cs_emit(cs, A6XX_GRAS_VS_CL_CNTL_CLIP_MASK(last_shader->clip_mask) |  in tu6_emit_vpc()
955                   A6XX_GRAS_VS_CL_CNTL_CULL_MASK(last_shader->cull_mask));  in tu6_emit_vpc()
2093    struct tu_shader *last_shader = builder->shaders[MESA_SHADER_GEOMETRY];  in tu_pipeline_builder_compile_shaders()  local
2094    if (!last_shader)  in tu_pipeline_builder_compile_shaders()
2095       last_shader = builder->shaders[MESA_SHADER_TESS_EVAL];  in tu_pipeline_builder_compile_shaders()
2096    if (!last_shader)  in tu_pipeline_builder_compile_shaders()
2097       last_shader = builder->shaders[MESA_SHADER_VERTEX];  in tu_pipeline_builder_compile_shaders()
2099    uint64_t outputs_written = last_shader->ir3_shader->nir->info.outputs_written;  in tu_pipeline_builder_compile_shaders()
2103    key.ucp_enables = MASK(last_shader->ir3_shader->nir->info.clip_distance_array_size);  in tu_pipeline_builder_compile_shaders()