Lines Matching refs:WriteMask
2346 if (inst->Dst[0].Register.WriteMask & (1 << chan)) { in exec_tex()
2390 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_X) { in exec_lodq()
2394 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Y) { in exec_lodq()
2407 if (inst->Dst[0].Register.WriteMask & (1 << chan)) { in exec_lodq()
2418 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_X) { in exec_lodq()
2422 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Y) { in exec_lodq()
2530 if (inst->Dst[0].Register.WriteMask & (1 << chan)) { in exec_txd()
2607 if (inst->Dst[0].Register.WriteMask & (1 << chan)) { in exec_txf()
2615 if (inst->Dst[0].Register.WriteMask & (1 << chan)) { in exec_txf()
2646 if (inst->Dst[0].Register.WriteMask & (1 << chan)) { in exec_txq()
2780 if (inst->Dst[0].Register.WriteMask & (1 << chan)) { in exec_sample()
2862 if (inst->Dst[0].Register.WriteMask & (1 << chan)) { in exec_sample_d()
3100 if (inst->Dst[0].Register.WriteMask & (1 << chan)) { in exec_scalar_unary()
3117 if (inst->Dst[0].Register.WriteMask & (1 << chan)) { in exec_vector_unary()
3125 if (inst->Dst[0].Register.WriteMask & (1 << chan)) { in exec_vector_unary()
3150 if (inst->Dst[0].Register.WriteMask & (1 << chan)) { in exec_scalar_binary()
3167 if (inst->Dst[0].Register.WriteMask & (1 << chan)) { in exec_vector_binary()
3176 if (inst->Dst[0].Register.WriteMask & (1 << chan)) { in exec_vector_binary()
3198 if (inst->Dst[0].Register.WriteMask & (1 << chan)) { in exec_vector_trinary()
3208 if (inst->Dst[0].Register.WriteMask & (1 << chan)) { in exec_vector_trinary()
3231 if (inst->Dst[0].Register.WriteMask & (1 << chan)) { in exec_vector_quaternary()
3242 if (inst->Dst[0].Register.WriteMask & (1 << chan)) { in exec_vector_quaternary()
3266 if (inst->Dst[0].Register.WriteMask & (1 << chan)) { in exec_dp3()
3290 if (inst->Dst[0].Register.WriteMask & (1 << chan)) { in exec_dp4()
3312 if (inst->Dst[0].Register.WriteMask & (1 << chan)) { in exec_dp2()
3332 if (inst->Dst[0].Register.WriteMask & (1 << chan)) { in exec_pk2h()
3351 if (inst->Dst[0].Register.WriteMask & (1 << chan)) { in exec_up2h()
3377 if (inst->Dst[0].Register.WriteMask & (1 << chan)) { in exec_ucmp()
3390 if (inst->Dst[0].Register.WriteMask & (1 << chan)) { in exec_ucmp()
3404 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Y) { in exec_dst()
3409 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Z) { in exec_dst()
3412 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_W) { in exec_dst()
3416 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_X) { in exec_dst()
3419 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Y) { in exec_dst()
3422 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Z) { in exec_dst()
3425 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_W) { in exec_dst()
3440 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_X) { in exec_log()
3443 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Y) { in exec_log()
3448 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Z) { in exec_log()
3451 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_W) { in exec_log()
3464 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_X) { in exec_exp()
3468 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Y) { in exec_exp()
3472 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Z) { in exec_exp()
3476 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_W) { in exec_exp()
3488 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_YZ) { in exec_lit()
3490 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Z) { in exec_lit()
3501 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Y) { in exec_lit()
3506 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_X) { in exec_lit()
3510 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_W) { in exec_lit()
3686 if ((inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_XY) == TGSI_WRITEMASK_XY) { in exec_double_unary()
3691 if ((inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_ZW) == TGSI_WRITEMASK_ZW) { in exec_double_unary()
3709 wmask = inst->Dst[0].Register.WriteMask; in exec_double_binary()
3748 if ((inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_XY) == TGSI_WRITEMASK_XY) { in exec_double_trinary()
3755 if ((inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_ZW) == TGSI_WRITEMASK_ZW) { in exec_double_trinary()
3773 wmask = inst->Dst[0].Register.WriteMask; in exec_dldexp()
3799 if ((inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_XY) == TGSI_WRITEMASK_XY) in exec_dfracexp()
3801 if ((inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_ZW) == TGSI_WRITEMASK_ZW) in exec_dfracexp()
3804 if (inst->Dst[1].Register.WriteMask & (1 << chan)) in exec_dfracexp()
3819 wmask = inst->Dst[0].Register.WriteMask; in exec_arg0_64_arg1_32()
3924 if (inst->Dst[0].Register.WriteMask & (1 << chan)) { in exec_load_img()
3957 if (inst->Dst[0].Register.WriteMask & (1 << chan)) { in exec_load_buf()
3982 if (inst->Dst[0].Register.WriteMask & (1 << chan)) { in exec_load_mem()
3989 if (inst->Dst[0].Register.WriteMask & (1 << chan)) { in exec_load_mem()
4100 params.writemask = inst->Dst[0].Register.WriteMask; in exec_store_buf()
4143 if (inst->Dst[0].Register.WriteMask & (1 << chan)) { in exec_store_mem()
4225 if (inst->Dst[0].Register.WriteMask & (1 << chan)) { in exec_atomop_img()
4248 params.writemask = inst->Dst[0].Register.WriteMask; in exec_atomop_buf()
4284 if (inst->Dst[0].Register.WriteMask & (1 << chan)) { in exec_atomop_buf()
4360 if (inst->Dst[0].Register.WriteMask & (1 << chan)) { in exec_atomop_mem()
4405 if (inst->Dst[0].Register.WriteMask & (1 << chan)) { in exec_resq_img()
4435 if (inst->Dst[0].Register.WriteMask & (1 << chan)) { in exec_resq_buf()
4561 if ((inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_XY) == TGSI_WRITEMASK_XY) { in exec_t_2_64()
4566 if ((inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_ZW) == TGSI_WRITEMASK_ZW) { in exec_t_2_64()
4581 int wm = inst->Dst[0].Register.WriteMask; in exec_64_2_t()
5142 if (!(inst->Dst[0].Register.WriteMask & (1 << chan))) in exec_interp_at_sample()
5182 if (!(inst->Dst[0].Register.WriteMask & (1 << chan))) in exec_interp_at_offset()
5205 if (!(inst->Dst[0].Register.WriteMask & (1 << chan))) in exec_interp_at_centroid()