Lines Matching refs:COND
75 COND(inst->sat, VIV_ISA_WORD_0_SAT) | in etna_assemble()
76 COND(inst->dst.use, VIV_ISA_WORD_0_DST_USE) | in etna_assemble()
83 COND(inst->src[0].use, VIV_ISA_WORD_1_SRC0_USE) | in etna_assemble()
85 COND(inst->type & 0x4, VIV_ISA_WORD_1_TYPE_BIT2) | in etna_assemble()
87 COND(inst->src[0].neg, VIV_ISA_WORD_1_SRC0_NEG) | in etna_assemble()
88 COND(inst->src[0].abs, VIV_ISA_WORD_1_SRC0_ABS); in etna_assemble()
91 COND(inst->src[1].use, VIV_ISA_WORD_2_SRC1_USE) | in etna_assemble()
93 COND(inst->opcode & 0x40, VIV_ISA_WORD_2_OPCODE_BIT6) | in etna_assemble()
95 COND(inst->src[1].neg, VIV_ISA_WORD_2_SRC1_NEG) | in etna_assemble()
96 COND(inst->src[1].abs, VIV_ISA_WORD_2_SRC1_ABS) | in etna_assemble()
100 COND(inst->src[2].use, VIV_ISA_WORD_3_SRC2_USE) | in etna_assemble()
103 COND(inst->src[2].neg, VIV_ISA_WORD_3_SRC2_NEG) | in etna_assemble()
104 COND(inst->src[2].abs, VIV_ISA_WORD_3_SRC2_ABS) | in etna_assemble()
107 COND(inst->sel_bit0, VIV_ISA_WORD_3_SEL_BIT0) | in etna_assemble()
108 COND(inst->sel_bit1, VIV_ISA_WORD_3_SEL_BIT1) | in etna_assemble()
109 COND(inst->dst_full, VIV_ISA_WORD_3_DST_FULL); in etna_assemble()