Lines Matching refs:GENX
476 iris_emit_cmd(batch, GENX(MI_LOAD_REGISTER_IMM), lri) { in _iris_emit_lri()
481 #define iris_emit_lri(b, r, v) _iris_emit_lri(b, GENX(r##_num), v)
486 iris_emit_cmd(batch, GENX(MI_LOAD_REGISTER_REG), lrr) { in _iris_emit_lrr()
530 iris_emit_cmd(batch, GENX(MI_LOAD_REGISTER_MEM), lrm) { in iris_load_register_mem32()
555 iris_emit_cmd(batch, GENX(MI_STORE_REGISTER_MEM), srm) { in iris_store_register_mem32()
578 iris_emit_cmd(batch, GENX(MI_STORE_DATA_IMM), sdi) { in iris_store_data_imm32()
595 _iris_pack_command(batch, GENX(MI_STORE_DATA_IMM), map, sdi) { in iris_store_data_imm64()
616 iris_emit_cmd(batch, GENX(MI_COPY_MEM_MEM), cp) { in iris_copy_mem_mem()
640 iris_emit_cmd(batch, GENX(3DSTATE_CC_STATE_POINTERS), t); in emit_pipeline_select()
668 iris_emit_cmd(batch, GENX(PIPELINE_SELECT), sel) { in emit_pipeline_select()
689 iris_pack_state(GENX(SLICE_COMMON_ECO_CHICKEN1), ®_val, reg) { in init_glk_barrier_mode()
711 iris_emit_cmd(batch, GENX(STATE_BASE_ADDRESS), sba) { in init_state_base_address()
752 #define L3_ALLOCATION_REG GENX(L3ALLOC) in iris_emit_l3_config()
753 #define L3_ALLOCATION_REG_num GENX(L3ALLOC_num) in iris_emit_l3_config()
755 #define L3_ALLOCATION_REG GENX(L3CNTLREG) in iris_emit_l3_config()
756 #define L3_ALLOCATION_REG_num GENX(L3CNTLREG_num) in iris_emit_l3_config()
797 iris_pack_state(GENX(CS_CHICKEN1), ®_val, reg) { in iris_enable_obj_preemption()
819 unsigned size = GENX(SLICE_HASH_TABLE_length) * 4; in iris_upload_slice_hashing_state()
827 struct GENX(SLICE_HASH_TABLE) table0 = { in iris_upload_slice_hashing_state()
848 struct GENX(SLICE_HASH_TABLE) table1 = { in iris_upload_slice_hashing_state()
869 const struct GENX(SLICE_HASH_TABLE) *table = in iris_upload_slice_hashing_state()
871 GENX(SLICE_HASH_TABLE_pack)(NULL, map, table); in iris_upload_slice_hashing_state()
873 iris_emit_cmd(batch, GENX(3DSTATE_SLICE_TABLE_STATE_POINTERS), ptr) { in iris_upload_slice_hashing_state()
878 iris_emit_cmd(batch, GENX(3DSTATE_3D_MODE), mode) { in iris_upload_slice_hashing_state()
897 iris_emit_cmd(batch, GENX(3DSTATE_PUSH_CONSTANT_ALLOC_VS), alloc) { in iris_alloc_push_constants()
921 iris_pack_state(GENX(SAMPLER_MODE), ®_val, reg) { in iris_init_common_context()
928 iris_pack_state(GENX(HALF_SLICE_CHICKEN7), ®_val, reg) { in iris_init_common_context()
959 iris_pack_state(GENX(CS_DEBUG_MODE2), ®_val, reg) { in iris_init_render_context()
965 iris_pack_state(GENX(INSTPM), ®_val, reg) { in iris_init_render_context()
973 iris_pack_state(GENX(CACHE_MODE_1), ®_val, reg) { in iris_init_render_context()
988 iris_pack_state(GENX(TCCNTLREG), ®_val, reg) { in iris_init_render_context()
1000 iris_pack_state(GENX(CACHE_MODE_0), ®_val, reg) { in iris_init_render_context()
1015 iris_emit_cmd(batch, GENX(3DSTATE_DRAWING_RECTANGLE), rect) { in iris_init_render_context()
1021 iris_emit_cmd(batch, GENX(3DSTATE_SAMPLE_PATTERN), pat) { in iris_init_render_context()
1032 iris_emit_cmd(batch, GENX(3DSTATE_AA_LINE_PARAMETERS), foo); in iris_init_render_context()
1035 iris_emit_cmd(batch, GENX(3DSTATE_WM_CHROMAKEY), foo); in iris_init_render_context()
1038 iris_emit_cmd(batch, GENX(3DSTATE_WM_HZ_OP), foo); in iris_init_render_context()
1042 iris_emit_cmd(batch, GENX(3DSTATE_POLY_STIPPLE_OFFSET), foo); in iris_init_render_context()
1095 uint32_t state[GENX(VERTEX_BUFFER_STATE_length)];
1105 uint32_t packets[GENX(3DSTATE_DEPTH_BUFFER_length) +
1106 GENX(3DSTATE_STENCIL_BUFFER_length) +
1107 GENX(3DSTATE_HIER_DEPTH_BUFFER_length) +
1108 GENX(3DSTATE_CLEAR_PARAMS_length) +
1109 GENX(MI_LOAD_REGISTER_IMM_length) * 2];
1120 uint32_t last_index_buffer[GENX(3DSTATE_INDEX_BUFFER_length)];
1124 uint32_t so_buffers[4 * GENX(3DSTATE_SO_BUFFER_length)];
1163 uint32_t ps_blend[GENX(3DSTATE_PS_BLEND_length)];
1166 uint32_t blend_state[GENX(BLEND_STATE_length) +
1167 BRW_MAX_DRAW_BUFFERS * GENX(BLEND_STATE_ENTRY_length)];
1205 uint32_t *blend_entry = cso->blend_state + GENX(BLEND_STATE_length); in iris_create_blend_state()
1238 iris_pack_state(GENX(BLEND_STATE_ENTRY), blend_entry, be) { in iris_create_blend_state()
1261 blend_entry += GENX(BLEND_STATE_ENTRY_length); in iris_create_blend_state()
1264 iris_pack_command(GENX(3DSTATE_PS_BLEND), cso->ps_blend, pb) { in iris_create_blend_state()
1285 iris_pack_state(GENX(BLEND_STATE), cso->blend_state, bs) { in iris_create_blend_state()
1344 uint32_t wmds[GENX(3DSTATE_WM_DEPTH_STENCIL_length)];
1347 uint32_t depth_bounds[GENX(3DSTATE_DEPTH_BOUNDS_length)];
1386 iris_pack_command(GENX(3DSTATE_WM_DEPTH_STENCIL), cso->wmds, wmds) { in iris_create_zsa_state()
1416 iris_pack_command(GENX(3DSTATE_DEPTH_BOUNDS), cso->depth_bounds, depth_bounds) { in iris_create_zsa_state()
1622 iris_pack_state(GENX(CACHE_MODE_1), ®_val, reg) { in genX()
1648 uint32_t sf[GENX(3DSTATE_SF_length)];
1649 uint32_t clip[GENX(3DSTATE_CLIP_length)];
1650 uint32_t raster[GENX(3DSTATE_RASTER_length)];
1651 uint32_t wm[GENX(3DSTATE_WM_length)];
1652 uint32_t line_stipple[GENX(3DSTATE_LINE_STIPPLE_length)];
1751 iris_pack_command(GENX(3DSTATE_SF), cso->sf, sf) { in iris_create_rasterizer_state()
1772 iris_pack_command(GENX(3DSTATE_RASTER), cso->raster, rr) { in iris_create_rasterizer_state()
1797 iris_pack_command(GENX(3DSTATE_CLIP), cso->clip, cl) { in iris_create_rasterizer_state()
1819 iris_pack_command(GENX(3DSTATE_WM), cso->wm, wm) { in iris_create_rasterizer_state()
1833 iris_pack_command(GENX(3DSTATE_LINE_STIPPLE), cso->line_stipple, line) { in iris_create_rasterizer_state()
1911 uint32_t sampler_state[GENX(SAMPLER_STATE_length)];
1954 iris_pack_state(GENX(SAMPLER_STATE), cso->sampler_state, samp) { in iris_create_sampler_state()
2059 unsigned size = count * 4 * GENX(SAMPLER_STATE_length); in iris_upload_sampler_states()
2083 memset(map, 0, 4 * GENX(SAMPLER_STATE_length)); in iris_upload_sampler_states()
2085 memcpy(map, state->sampler_state, 4 * GENX(SAMPLER_STATE_length)); in iris_upload_sampler_states()
2121 uint32_t dynamic[GENX(SAMPLER_STATE_length)]; in iris_upload_sampler_states()
2122 iris_pack_state(GENX(SAMPLER_STATE), dynamic, dyns) { in iris_upload_sampler_states()
2126 for (uint32_t j = 0; j < GENX(SAMPLER_STATE_length); j++) in iris_upload_sampler_states()
2130 map += GENX(SAMPLER_STATE_length); in iris_upload_sampler_states()
2201 const unsigned surf_size = 4 * GENX(RENDER_SURFACE_STATE_length); in alloc_surface_states()
2226 const unsigned surf_size = 4 * GENX(RENDER_SURFACE_STATE_length); in upload_surface_states()
2251 STATIC_ASSERT(GENX(RENDER_SURFACE_STATE_SurfaceBaseAddress_start) % 64 == 0); in update_surface_state_addrs()
2252 STATIC_ASSERT(GENX(RENDER_SURFACE_STATE_SurfaceBaseAddress_bits) == 64); in update_surface_state_addrs()
2254 …uint64_t *ss_addr = (uint64_t *) &surf_state->cpu[GENX(RENDER_SURFACE_STATE_SurfaceBaseAddress_sta… in update_surface_state_addrs()
3175 4 * GENX(RENDER_SURFACE_STATE_length), 64); in iris_set_framebuffer_state()
3446 iris_pack_state(GENX(VERTEX_BUFFER_STATE), state->state, vb) { in iris_set_vertex_buffers()
3469 uint32_t vertex_elements[1 + 33 * GENX(VERTEX_ELEMENT_STATE_length)];
3470 uint32_t vf_instancing[33 * GENX(3DSTATE_VF_INSTANCING_length)];
3471 uint32_t edgeflag_ve[GENX(VERTEX_ELEMENT_STATE_length)];
3472 uint32_t edgeflag_vfi[GENX(3DSTATE_VF_INSTANCING_length)];
3499 iris_pack_command(GENX(3DSTATE_VERTEX_ELEMENTS), cso->vertex_elements, ve) { in iris_create_vertex_elements()
3501 1 + GENX(VERTEX_ELEMENT_STATE_length) * MAX2(count, 1) - 2; in iris_create_vertex_elements()
3508 iris_pack_state(GENX(VERTEX_ELEMENT_STATE), ve_pack_dest, ve) { in iris_create_vertex_elements()
3517 iris_pack_command(GENX(3DSTATE_VF_INSTANCING), vfi_pack_dest, vi) { in iris_create_vertex_elements()
3536 iris_pack_state(GENX(VERTEX_ELEMENT_STATE), ve_pack_dest, ve) { in iris_create_vertex_elements()
3548 iris_pack_command(GENX(3DSTATE_VF_INSTANCING), vfi_pack_dest, vi) { in iris_create_vertex_elements()
3554 ve_pack_dest += GENX(VERTEX_ELEMENT_STATE_length); in iris_create_vertex_elements()
3555 vfi_pack_dest += GENX(3DSTATE_VF_INSTANCING_length); in iris_create_vertex_elements()
3565 iris_pack_state(GENX(VERTEX_ELEMENT_STATE), cso->edgeflag_ve, ve) { in iris_create_vertex_elements()
3576 iris_pack_command(GENX(3DSTATE_VF_INSTANCING), cso->edgeflag_vfi, vi) { in iris_create_vertex_elements()
3712 so_buffers += GENX(3DSTATE_SO_BUFFER_length)) { in iris_set_stream_output_targets()
3718 iris_pack_command(GENX(3DSTATE_SO_BUFFER), so_buffers, sob) { in iris_set_stream_output_targets()
3745 iris_pack_command(GENX(3DSTATE_SO_BUFFER), so_buffers, sob) { in iris_set_stream_output_targets()
3787 struct GENX(SO_DECL) so_decl[MAX_VERTEX_STREAMS][128]; in iris_create_so_decl_list()
3823 so_decl[stream_id][decls[stream_id]++] = (struct GENX(SO_DECL)) { in iris_create_so_decl_list()
3833 so_decl[stream_id][decls[stream_id]++] = (struct GENX(SO_DECL)) { in iris_create_so_decl_list()
3844 unsigned dwords = GENX(3DSTATE_STREAMOUT_length) + (3 + 2 * max_decls); in iris_create_so_decl_list()
3846 uint32_t *so_decl_map = map + GENX(3DSTATE_STREAMOUT_length); in iris_create_so_decl_list()
3848 iris_pack_command(GENX(3DSTATE_STREAMOUT), map, sol) { in iris_create_so_decl_list()
3873 iris_pack_command(GENX(3DSTATE_SO_DECL_LIST), so_decl_map, list) { in iris_create_so_decl_list()
3886 iris_pack_state(GENX(SO_DECL_ENTRY), so_decl_map + 3 + i * 2, entry) { in iris_create_so_decl_list()
3972 struct GENX(SF_OUTPUT_ATTRIBUTE_DETAIL) attr_overrides[16] = {}; in iris_emit_sbe_swiz()
3986 struct GENX(SF_OUTPUT_ATTRIBUTE_DETAIL) *attr = in iris_emit_sbe_swiz()
4062 iris_emit_cmd(batch, GENX(3DSTATE_SBE_SWIZ), sbes) { in iris_emit_sbe_swiz()
4127 iris_emit_cmd(batch, GENX(3DSTATE_SBE), sbe) { in iris_emit_sbe()
4292 iris_pack_command(GENX(3DSTATE_VS), shader->derived_data, vs) { in iris_store_vs_state()
4313 iris_pack_command(GENX(3DSTATE_HS), shader->derived_data, hs) { in iris_store_tcs_state()
4359 uint32_t *ds_state = te_state + GENX(3DSTATE_TE_length); in iris_store_tes_state()
4361 iris_pack_command(GENX(3DSTATE_TE), te_state, te) { in iris_store_tes_state()
4370 iris_pack_command(GENX(3DSTATE_DS), ds_state, ds) { in iris_store_tes_state()
4396 iris_pack_command(GENX(3DSTATE_GS), shader->derived_data, gs) { in iris_store_gs_state()
4444 uint32_t *psx_state = ps_state + GENX(3DSTATE_PS_length); in iris_store_fs_state()
4446 iris_pack_command(GENX(3DSTATE_PS), ps_state, ps) { in iris_store_fs_state()
4481 iris_pack_command(GENX(3DSTATE_PS_EXTRA), psx_state, psx) { in iris_store_fs_state()
4511 iris_pack_state(GENX(INTERFACE_DESCRIPTOR_DATA), map, desc) { in iris_store_cs_state()
4537 [IRIS_CACHE_VS] = GENX(3DSTATE_VS_length), in iris_derived_program_state_size()
4538 [IRIS_CACHE_TCS] = GENX(3DSTATE_HS_length), in iris_derived_program_state_size()
4539 [IRIS_CACHE_TES] = GENX(3DSTATE_TE_length) + GENX(3DSTATE_DS_length), in iris_derived_program_state_size()
4540 [IRIS_CACHE_GS] = GENX(3DSTATE_GS_length), in iris_derived_program_state_size()
4542 GENX(3DSTATE_PS_length) + GENX(3DSTATE_PS_EXTRA_length), in iris_derived_program_state_size()
4543 [IRIS_CACHE_CS] = GENX(INTERFACE_DESCRIPTOR_DATA_length), in iris_derived_program_state_size()
5242 iris_emit_cmd(batch, GENX(STATE_BASE_ADDRESS), sba) { in iris_update_surface_base_address()
5314 iris_load_register_imm32(batch, GENX(GFX_CCS_AUX_INV_num), 1); in genX()
5329 iris_load_register_imm64(batch, GENX(GFX_AUX_TABLE_BASE_ADDR_num), in init_aux_map_state()
5404 iris_emit_cmd(batch, GENX(3DSTATE_CONSTANT_VS), pkt) { in emit_push_constant_packets()
5443 iris_emit_cmd(batch, GENX(3DSTATE_CONSTANT_ALL), pc) { in emit_push_constant_packet_all()
5456 iris_pack_command(GENX(3DSTATE_CONSTANT_ALL), dw, all) { in emit_push_constant_packet_all()
5465 _iris_pack_state(batch, GENX(3DSTATE_CONSTANT_ALL_DATA), in emit_push_constant_packet_all()
5501 GENX(CC_VIEWPORT_length), 32, &cc_vp_address); in iris_upload_dirty_render_state()
5512 iris_pack_state(GENX(CC_VIEWPORT), cc_vp_map, ccv) { in iris_upload_dirty_render_state()
5517 cc_vp_map += GENX(CC_VIEWPORT_length); in iris_upload_dirty_render_state()
5520 iris_emit_cmd(batch, GENX(3DSTATE_VIEWPORT_STATE_POINTERS_CC), ptr) { in iris_upload_dirty_render_state()
5532 GENX(SF_CLIP_VIEWPORT_length), 64, &sf_cl_vp_address); in iris_upload_dirty_render_state()
5548 iris_pack_state(GENX(SF_CLIP_VIEWPORT), vp_map, vp) { in iris_upload_dirty_render_state()
5565 vp_map += GENX(SF_CLIP_VIEWPORT_length); in iris_upload_dirty_render_state()
5568 iris_emit_cmd(batch, GENX(3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP), ptr) { in iris_upload_dirty_render_state()
5596 iris_emit_cmd(batch, GENX(3DSTATE_URB_VS), urb) { in iris_upload_dirty_render_state()
5609 const int header_dwords = GENX(BLEND_STATE_length); in iris_upload_dirty_render_state()
5616 MAX2(cso_fb->nr_cbufs, 1) * GENX(BLEND_STATE_ENTRY_length); in iris_upload_dirty_render_state()
5625 iris_pack_state(GENX(BLEND_STATE), &blend_state_header, bs) { in iris_upload_dirty_render_state()
5633 iris_emit_cmd(batch, GENX(3DSTATE_BLEND_STATE_POINTERS), ptr) { in iris_upload_dirty_render_state()
5648 sizeof(uint32_t) * GENX(COLOR_CALC_STATE_length), in iris_upload_dirty_render_state()
5650 iris_pack_state(GENX(COLOR_CALC_STATE), cc_map, cc) { in iris_upload_dirty_render_state()
5662 iris_emit_cmd(batch, GENX(3DSTATE_CC_STATE_POINTERS), ptr) { in iris_upload_dirty_render_state()
5734 iris_emit_cmd(batch, GENX(3DSTATE_BINDING_TABLE_POINTERS_VS), ptr) { in iris_upload_dirty_render_state()
5778 iris_emit_cmd(batch, GENX(3DSTATE_SAMPLER_STATE_POINTERS_VS), ptr) { in iris_upload_dirty_render_state()
5789 iris_emit_cmd(batch, GENX(3DSTATE_MULTISAMPLE), ms) { in iris_upload_dirty_render_state()
5798 iris_emit_cmd(batch, GENX(3DSTATE_SAMPLE_MASK), ms) { in iris_upload_dirty_render_state()
5824 uint32_t ps_state[GENX(3DSTATE_PS_length)] = {0}; in iris_upload_dirty_render_state()
5825 iris_pack_command(GENX(3DSTATE_PS), ps_state, ps) { in iris_upload_dirty_render_state()
5859 uint32_t psx_state[GENX(3DSTATE_PS_EXTRA_length)] = {0}; in iris_upload_dirty_render_state()
5860 iris_pack_command(GENX(3DSTATE_PS_EXTRA), psx_state, psx) { in iris_upload_dirty_render_state()
5878 uint32_t *shader_psx = shader_ps + GENX(3DSTATE_PS_length); in iris_upload_dirty_render_state()
5880 GENX(3DSTATE_PS_length)); in iris_upload_dirty_render_state()
5882 GENX(3DSTATE_PS_EXTRA_length)); in iris_upload_dirty_render_state()
5889 iris_emit_cmd(batch, GENX(3DSTATE_HS), hs); in iris_upload_dirty_render_state()
5890 iris_emit_cmd(batch, GENX(3DSTATE_TE), te); in iris_upload_dirty_render_state()
5891 iris_emit_cmd(batch, GENX(3DSTATE_DS), ds); in iris_upload_dirty_render_state()
5893 iris_emit_cmd(batch, GENX(3DSTATE_GS), gs); in iris_upload_dirty_render_state()
5901 4 * 4 * GENX(3DSTATE_SO_BUFFER_length)); in iris_upload_dirty_render_state()
5917 ice->state.streamout + GENX(3DSTATE_STREAMOUT_length); in iris_upload_dirty_render_state()
5924 uint32_t dynamic_sol[GENX(3DSTATE_STREAMOUT_length)]; in iris_upload_dirty_render_state()
5925 iris_pack_command(GENX(3DSTATE_STREAMOUT), dynamic_sol, sol) { in iris_upload_dirty_render_state()
5937 GENX(3DSTATE_STREAMOUT_length)); in iris_upload_dirty_render_state()
5941 iris_emit_cmd(batch, GENX(3DSTATE_STREAMOUT), sol); in iris_upload_dirty_render_state()
5955 uint32_t dynamic_clip[GENX(3DSTATE_CLIP_length)]; in iris_upload_dirty_render_state()
5956 iris_pack_command(GENX(3DSTATE_CLIP), &dynamic_clip, cl) { in iris_upload_dirty_render_state()
5983 uint32_t dynamic_sf[GENX(3DSTATE_SF_length)]; in iris_upload_dirty_render_state()
5984 iris_pack_command(GENX(3DSTATE_SF), &dynamic_sf, sf) { in iris_upload_dirty_render_state()
5997 uint32_t dynamic_wm[GENX(3DSTATE_WM_length)]; in iris_upload_dirty_render_state()
5999 iris_pack_command(GENX(3DSTATE_WM), &dynamic_wm, wm) { in iris_upload_dirty_render_state()
6027 uint32_t dynamic_pb[GENX(3DSTATE_PS_BLEND_length)]; in iris_upload_dirty_render_state()
6028 iris_pack_command(GENX(3DSTATE_PS_BLEND), &dynamic_pb, pb) { in iris_upload_dirty_render_state()
6049 uint32_t stencil_refs[GENX(3DSTATE_WM_DEPTH_STENCIL_length)]; in iris_upload_dirty_render_state()
6050 iris_pack_command(GENX(3DSTATE_WM_DEPTH_STENCIL), &stencil_refs, wmds) { in iris_upload_dirty_render_state()
6073 uint32_t stencil_refs[GENX(3DSTATE_WM_DEPTH_STENCIL_length)]; in iris_upload_dirty_render_state()
6074 iris_pack_command(GENX(3DSTATE_WM_DEPTH_STENCIL), &stencil_refs, wmds) { in iris_upload_dirty_render_state()
6101 iris_emit_cmd(batch, GENX(3DSTATE_SCISSOR_STATE_POINTERS), ptr) { in iris_upload_dirty_render_state()
6112 uint32_t clear_length = GENX(3DSTATE_CLEAR_PARAMS_length) * 4; in iris_upload_dirty_render_state()
6155 uint32_t clear_params[GENX(3DSTATE_CLEAR_PARAMS_length)]; in iris_upload_dirty_render_state()
6156 iris_pack_command(GENX(3DSTATE_CLEAR_PARAMS), clear_params, clear) { in iris_upload_dirty_render_state()
6170 iris_emit_cmd(batch, GENX(3DSTATE_POLY_STIPPLE_PATTERN), poly) { in iris_upload_dirty_render_state()
6183 iris_emit_cmd(batch, GENX(3DSTATE_VF_TOPOLOGY), topo) { in iris_upload_dirty_render_state()
6201 iris_pack_state(GENX(VERTEX_BUFFER_STATE), state->state, vb) { in iris_upload_dirty_render_state()
6223 iris_pack_state(GENX(VERTEX_BUFFER_STATE), state->state, vb) { in iris_upload_dirty_render_state()
6286 const unsigned vb_dwords = GENX(VERTEX_BUFFER_STATE_length); in iris_upload_dirty_render_state()
6290 _iris_pack_command(batch, GENX(3DSTATE_VERTEX_BUFFERS), map, vb) { in iris_upload_dirty_render_state()
6312 (1 + entries * GENX(VERTEX_ELEMENT_STATE_length))); in iris_upload_dirty_render_state()
6314 uint32_t dynamic_ves[1 + 33 * GENX(VERTEX_ELEMENT_STATE_length)]; in iris_upload_dirty_render_state()
6319 iris_pack_command(GENX(3DSTATE_VERTEX_ELEMENTS), in iris_upload_dirty_render_state()
6322 1 + GENX(VERTEX_ELEMENT_STATE_length) * dyn_count - 2; in iris_upload_dirty_render_state()
6326 GENX(VERTEX_ELEMENT_STATE_length) * sizeof(uint32_t)); in iris_upload_dirty_render_state()
6329 GENX(VERTEX_ELEMENT_STATE_length)]; in iris_upload_dirty_render_state()
6334 iris_pack_state(GENX(VERTEX_ELEMENT_STATE), ve_pack_dest, ve) { in iris_upload_dirty_render_state()
6344 ve_pack_dest += GENX(VERTEX_ELEMENT_STATE_length); in iris_upload_dirty_render_state()
6347 iris_pack_state(GENX(VERTEX_ELEMENT_STATE), ve_pack_dest, ve) { in iris_upload_dirty_render_state()
6358 ve_pack_dest += GENX(VERTEX_ELEMENT_STATE_length); in iris_upload_dirty_render_state()
6361 for (int i = 0; i < GENX(VERTEX_ELEMENT_STATE_length); i++) in iris_upload_dirty_render_state()
6366 (1 + dyn_count * GENX(VERTEX_ELEMENT_STATE_length))); in iris_upload_dirty_render_state()
6371 entries * GENX(3DSTATE_VF_INSTANCING_length)); in iris_upload_dirty_render_state()
6375 uint32_t dynamic_vfi[33 * GENX(3DSTATE_VF_INSTANCING_length)]; in iris_upload_dirty_render_state()
6377 GENX(3DSTATE_VF_INSTANCING_length) * sizeof(uint32_t)); in iris_upload_dirty_render_state()
6380 edgeflag_index * GENX(3DSTATE_VF_INSTANCING_length); in iris_upload_dirty_render_state()
6381 iris_pack_command(GENX(3DSTATE_VF_INSTANCING), vfi_pack_dest, vi) { in iris_upload_dirty_render_state()
6386 for (int i = 0; i < GENX(3DSTATE_VF_INSTANCING_length); i++) in iris_upload_dirty_render_state()
6390 entries * GENX(3DSTATE_VF_INSTANCING_length)); in iris_upload_dirty_render_state()
6399 iris_emit_cmd(batch, GENX(3DSTATE_VF_SGVS), sgv) { in iris_upload_dirty_render_state()
6417 iris_emit_cmd(batch, GENX(3DSTATE_VF), vf) { in iris_upload_dirty_render_state()
6426 iris_emit_cmd(batch, GENX(3DSTATE_VF_STATISTICS), vf) { in iris_upload_dirty_render_state()
6489 uint32_t ib_packet[GENX(3DSTATE_INDEX_BUFFER_length)]; in iris_upload_render_state()
6490 iris_pack_command(GENX(3DSTATE_INDEX_BUFFER), ib_packet, ib) { in iris_upload_render_state()
6586 iris_emit_cmd(batch, GENX(MI_LOAD_REGISTER_MEM), lrm) { in iris_upload_render_state()
6590 iris_emit_cmd(batch, GENX(MI_LOAD_REGISTER_MEM), lrm) { in iris_upload_render_state()
6594 iris_emit_cmd(batch, GENX(MI_LOAD_REGISTER_MEM), lrm) { in iris_upload_render_state()
6599 iris_emit_cmd(batch, GENX(MI_LOAD_REGISTER_MEM), lrm) { in iris_upload_render_state()
6603 iris_emit_cmd(batch, GENX(MI_LOAD_REGISTER_MEM), lrm) { in iris_upload_render_state()
6608 iris_emit_cmd(batch, GENX(MI_LOAD_REGISTER_MEM), lrm) { in iris_upload_render_state()
6612 iris_emit_cmd(batch, GENX(MI_LOAD_REGISTER_IMM), lri) { in iris_upload_render_state()
6643 iris_emit_cmd(batch, GENX(3DPRIMITIVE), prim) { in iris_upload_render_state()
6680 iris_emit_cmd(batch, GENX(MI_LOAD_REGISTER_MEM), lrm) { in iris_load_indirect_location()
6684 iris_emit_cmd(batch, GENX(MI_LOAD_REGISTER_MEM), lrm) { in iris_load_indirect_location()
6688 iris_emit_cmd(batch, GENX(MI_LOAD_REGISTER_MEM), lrm) { in iris_load_indirect_location()
6729 iris_emit_cmd(batch, GENX(MEDIA_VFE_STATE), vfe) { in iris_upload_gpgpu_walker()
6774 iris_emit_cmd(batch, GENX(MEDIA_CURBE_LOAD), curbe) { in iris_upload_gpgpu_walker()
6793 uint32_t desc[GENX(INTERFACE_DESCRIPTOR_DATA_length)]; in iris_upload_gpgpu_walker()
6795 iris_pack_state(GENX(INTERFACE_DESCRIPTOR_DATA), desc, idd) { in iris_upload_gpgpu_walker()
6805 for (int i = 0; i < GENX(INTERFACE_DESCRIPTOR_DATA_length); i++) in iris_upload_gpgpu_walker()
6808 iris_emit_cmd(batch, GENX(MEDIA_INTERFACE_DESCRIPTOR_LOAD), load) { in iris_upload_gpgpu_walker()
6810 GENX(INTERFACE_DESCRIPTOR_DATA_length) * sizeof(uint32_t); in iris_upload_gpgpu_walker()
6822 iris_emit_cmd(batch, GENX(GPGPU_WALKER), ggw) { in iris_upload_gpgpu_walker()
6835 iris_emit_cmd(batch, GENX(MEDIA_STATE_FLUSH), msf); in iris_upload_gpgpu_walker()
6985 STATIC_ASSERT(GENX(VERTEX_BUFFER_STATE_BufferStartingAddress_start) == 32); in iris_rebind_buffer()
6986 STATIC_ASSERT(GENX(VERTEX_BUFFER_STATE_BufferStartingAddress_bits) == 64); in iris_rebind_buffer()
7552 iris_emit_cmd(batch, GENX(PIPE_CONTROL), pc) { in iris_emit_raw_pipe_control()
7676 iris_emit_cmd(batch, GENX(MI_REPORT_PERF_COUNT), mi_rpc) { in iris_emit_mi_report_perf_count()
7757 iris_pack_state(GENX(GT_MODE), >_mode, reg) { in genX()
7890 4 * GENX(RENDER_SURFACE_STATE_length), 64); in genX()