Lines Matching refs:rctx
247 static void r600_emit_polygon_offset(struct r600_context *rctx, struct r600_atom *a) in r600_emit_polygon_offset() argument
249 struct radeon_cmdbuf *cs = rctx->b.gfx.cs; in r600_emit_polygon_offset()
318 struct r600_context *rctx = (struct r600_context *)ctx; in r600_create_blend_state_mode() local
330 if (rctx->b.family > CHIP_R600) in r600_create_blend_state_mode()
387 if (rctx->b.family > CHIP_R600) { in r600_create_blend_state_mode()
459 struct r600_context *rctx = (struct r600_context *)ctx; in r600_create_rs_state() local
485 if (rctx->b.chip_class == R700) { in r600_create_rs_state()
509 S_028A4C_PS_ITER_SAMPLE(state->multisample && rctx->ps_iter_samples > 1); in r600_create_rs_state()
510 if (rctx->b.family == CHIP_RV770) { in r600_create_rs_state()
512 sc_mode_cntl |= S_028A4C_TILE_COVER_DISABLE(state->multisample && rctx->ps_iter_samples > 1); in r600_create_rs_state()
514 if (rctx->b.chip_class >= R700) { in r600_create_rs_state()
561 if (rctx->b.chip_class == R700) { in r600_create_rs_state()
564 if (rctx->b.chip_class == R600) { in r600_create_rs_state()
791 static void r600_emit_clip_state(struct r600_context *rctx, struct r600_atom *atom) in r600_emit_clip_state() argument
793 struct radeon_cmdbuf *cs = rctx->b.gfx.cs; in r600_emit_clip_state()
794 struct pipe_clip_state *state = &rctx->clip_state.state; in r600_emit_clip_state()
805 static void r600_init_color_surface(struct r600_context *rctx, in r600_init_color_surface() argument
809 struct r600_screen *rscreen = rctx->screen; in r600_init_color_surface()
822 r600_init_flushed_depth_texture(&rctx->b.b, surf->base.texture, NULL); in r600_init_color_surface()
878 format = r600_translate_colorformat(rctx->b.chip_class, surf->base.format, in r600_init_color_surface()
914 if (rctx->b.chip_class == R600) { in r600_init_color_surface()
983 if (!rctx->dummy_cmask || in r600_init_color_surface()
984 rctx->dummy_cmask->b.b.width0 < cmask.size || in r600_init_color_surface()
985 rctx->dummy_cmask->buf->alignment % cmask.alignment != 0) { in r600_init_color_surface()
989 r600_resource_reference(&rctx->dummy_cmask, NULL); in r600_init_color_surface()
990 rctx->dummy_cmask = (struct r600_resource*) in r600_init_color_surface()
995 if (unlikely(!rctx->dummy_cmask)) { in r600_init_color_surface()
1001 ptr = pipe_buffer_map(&rctx->b.b, &rctx->dummy_cmask->b.b, PIPE_MAP_WRITE, &transfer); in r600_init_color_surface()
1003 pipe_buffer_unmap(&rctx->b.b, transfer); in r600_init_color_surface()
1005 r600_resource_reference(&surf->cb_buffer_cmask, rctx->dummy_cmask); in r600_init_color_surface()
1008 if (!rctx->dummy_fmask || in r600_init_color_surface()
1009 rctx->dummy_fmask->b.b.width0 < fmask.size || in r600_init_color_surface()
1010 rctx->dummy_fmask->buf->alignment % fmask.alignment != 0) { in r600_init_color_surface()
1011 r600_resource_reference(&rctx->dummy_fmask, NULL); in r600_init_color_surface()
1012 rctx->dummy_fmask = (struct r600_resource*) in r600_init_color_surface()
1017 if (unlikely(!rctx->dummy_fmask)) { in r600_init_color_surface()
1022 r600_resource_reference(&surf->cb_buffer_fmask, rctx->dummy_fmask); in r600_init_color_surface()
1037 static void r600_init_depth_surface(struct r600_context *rctx, in r600_init_depth_surface() argument
1086 struct r600_context *rctx = (struct r600_context *)ctx; in r600_set_framebuffer_state() local
1096 rctx->b.flags |= R600_CONTEXT_WAIT_3D_IDLE | in r600_set_framebuffer_state()
1105 util_copy_framebuffer_state(&rctx->framebuffer.state, state); in r600_set_framebuffer_state()
1107 rctx->framebuffer.export_16bpc = state->nr_cbufs != 0; in r600_set_framebuffer_state()
1108 rctx->framebuffer.cb0_is_integer = state->nr_cbufs && state->cbufs[0] && in r600_set_framebuffer_state()
1110 rctx->framebuffer.compressed_cb_mask = 0; in r600_set_framebuffer_state()
1111 rctx->framebuffer.is_msaa_resolve = state->nr_cbufs == 2 && in r600_set_framebuffer_state()
1115 rctx->framebuffer.nr_samples = util_framebuffer_get_num_samples(state); in r600_set_framebuffer_state()
1120 bool force_cmask_fmask = rctx->b.chip_class == R600 && in r600_set_framebuffer_state()
1121 rctx->framebuffer.is_msaa_resolve && in r600_set_framebuffer_state()
1134 r600_init_color_surface(rctx, surf, force_cmask_fmask); in r600_set_framebuffer_state()
1142 rctx->framebuffer.export_16bpc = false; in r600_set_framebuffer_state()
1146 rctx->framebuffer.compressed_cb_mask |= 1 << i; in r600_set_framebuffer_state()
1160 if (rctx->alphatest_state.bypass != alphatest_bypass) { in r600_set_framebuffer_state()
1161 rctx->alphatest_state.bypass = alphatest_bypass; in r600_set_framebuffer_state()
1162 r600_mark_atom_dirty(rctx, &rctx->alphatest_state.atom); in r600_set_framebuffer_state()
1173 r600_init_depth_surface(rctx, surf); in r600_set_framebuffer_state()
1176 if (state->zsbuf->format != rctx->poly_offset_state.zs_format) { in r600_set_framebuffer_state()
1177 rctx->poly_offset_state.zs_format = state->zsbuf->format; in r600_set_framebuffer_state()
1178 r600_mark_atom_dirty(rctx, &rctx->poly_offset_state.atom); in r600_set_framebuffer_state()
1181 if (rctx->db_state.rsurf != surf) { in r600_set_framebuffer_state()
1182 rctx->db_state.rsurf = surf; in r600_set_framebuffer_state()
1183 r600_mark_atom_dirty(rctx, &rctx->db_state.atom); in r600_set_framebuffer_state()
1184 r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom); in r600_set_framebuffer_state()
1186 } else if (rctx->db_state.rsurf) { in r600_set_framebuffer_state()
1187 rctx->db_state.rsurf = NULL; in r600_set_framebuffer_state()
1188 r600_mark_atom_dirty(rctx, &rctx->db_state.atom); in r600_set_framebuffer_state()
1189 r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom); in r600_set_framebuffer_state()
1192 if (rctx->cb_misc_state.nr_cbufs != state->nr_cbufs || in r600_set_framebuffer_state()
1193 rctx->cb_misc_state.bound_cbufs_target_mask != target_mask) { in r600_set_framebuffer_state()
1194 rctx->cb_misc_state.bound_cbufs_target_mask = target_mask; in r600_set_framebuffer_state()
1195 rctx->cb_misc_state.nr_cbufs = state->nr_cbufs; in r600_set_framebuffer_state()
1196 r600_mark_atom_dirty(rctx, &rctx->cb_misc_state.atom); in r600_set_framebuffer_state()
1199 if (state->nr_cbufs == 0 && rctx->alphatest_state.bypass) { in r600_set_framebuffer_state()
1200 rctx->alphatest_state.bypass = false; in r600_set_framebuffer_state()
1201 r600_mark_atom_dirty(rctx, &rctx->alphatest_state.atom); in r600_set_framebuffer_state()
1205 rctx->framebuffer.atom.num_dw = in r600_set_framebuffer_state()
1208 if (rctx->framebuffer.state.nr_cbufs) { in r600_set_framebuffer_state()
1209 rctx->framebuffer.atom.num_dw += 15 * rctx->framebuffer.state.nr_cbufs; in r600_set_framebuffer_state()
1210 rctx->framebuffer.atom.num_dw += 3 * (2 + rctx->framebuffer.state.nr_cbufs); in r600_set_framebuffer_state()
1212 if (rctx->framebuffer.state.zsbuf) { in r600_set_framebuffer_state()
1213 rctx->framebuffer.atom.num_dw += 16; in r600_set_framebuffer_state()
1214 } else if (rctx->screen->b.info.drm_minor >= 18) { in r600_set_framebuffer_state()
1215 rctx->framebuffer.atom.num_dw += 3; in r600_set_framebuffer_state()
1217 if (rctx->b.family > CHIP_R600 && rctx->b.family < CHIP_RV770) { in r600_set_framebuffer_state()
1218 rctx->framebuffer.atom.num_dw += 2; in r600_set_framebuffer_state()
1221 r600_mark_atom_dirty(rctx, &rctx->framebuffer.atom); in r600_set_framebuffer_state()
1223 r600_set_sample_locations_constant_buffer(rctx); in r600_set_framebuffer_state()
1224 rctx->framebuffer.do_update_surf_dirtiness = true; in r600_set_framebuffer_state()
1283 static void r600_emit_msaa_state(struct r600_context *rctx, int nr_samples) in r600_emit_msaa_state() argument
1285 struct radeon_cmdbuf *cs = rctx->b.gfx.cs; in r600_emit_msaa_state()
1288 if (rctx->b.family == CHIP_R600) { in r600_emit_msaa_state()
1350 static void r600_emit_framebuffer_state(struct r600_context *rctx, struct r600_atom *atom) in r600_emit_framebuffer_state() argument
1352 struct radeon_cmdbuf *cs = rctx->b.gfx.cs; in r600_emit_framebuffer_state()
1353 struct pipe_framebuffer_state *state = &rctx->framebuffer.state; in r600_emit_framebuffer_state()
1364 if (rctx->framebuffer.dual_src_blend && i == 1 && cb[0]) { in r600_emit_framebuffer_state()
1382 reloc = radeon_add_to_buffer_list(&rctx->b, in r600_emit_framebuffer_state()
1383 &rctx->b.gfx, in r600_emit_framebuffer_state()
1395 reloc = radeon_add_to_buffer_list(&rctx->b, in r600_emit_framebuffer_state()
1396 &rctx->b.gfx, in r600_emit_framebuffer_state()
1408 reloc = radeon_add_to_buffer_list(&rctx->b, in r600_emit_framebuffer_state()
1409 &rctx->b.gfx, in r600_emit_framebuffer_state()
1438 if (rctx->b.family > CHIP_R600 && rctx->b.family < CHIP_RV770 && sbu) { in r600_emit_framebuffer_state()
1447 unsigned reloc = radeon_add_to_buffer_list(&rctx->b, in r600_emit_framebuffer_state()
1448 &rctx->b.gfx, in r600_emit_framebuffer_state()
1468 } else if (rctx->screen->b.info.drm_minor >= 18) { in r600_emit_framebuffer_state()
1475 if (rctx->b.family > CHIP_R600 && rctx->b.family < CHIP_RV770 && sbu) { in r600_emit_framebuffer_state()
1488 if (rctx->framebuffer.is_msaa_resolve) { in r600_emit_framebuffer_state()
1498 r600_emit_msaa_state(rctx, rctx->framebuffer.nr_samples); in r600_emit_framebuffer_state()
1503 struct r600_context *rctx = (struct r600_context *)ctx; in r600_set_min_samples() local
1505 if (rctx->ps_iter_samples == min_samples) in r600_set_min_samples()
1508 rctx->ps_iter_samples = min_samples; in r600_set_min_samples()
1509 if (rctx->framebuffer.nr_samples > 1) { in r600_set_min_samples()
1510 r600_mark_atom_dirty(rctx, &rctx->rasterizer_state.atom); in r600_set_min_samples()
1511 if (rctx->b.chip_class == R600) in r600_set_min_samples()
1512 r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom); in r600_set_min_samples()
1516 static void r600_emit_cb_misc_state(struct r600_context *rctx, struct r600_atom *atom) in r600_emit_cb_misc_state() argument
1518 struct radeon_cmdbuf *cs = rctx->b.gfx.cs; in r600_emit_cb_misc_state()
1523 if (rctx->b.chip_class == R600) { in r600_emit_cb_misc_state()
1546 static void r600_emit_db_state(struct r600_context *rctx, struct r600_atom *atom) in r600_emit_db_state() argument
1548 struct radeon_cmdbuf *cs = rctx->b.gfx.cs; in r600_emit_db_state()
1558 reloc_idx = radeon_add_to_buffer_list(&rctx->b, &rctx->b.gfx, &rtex->resource, in r600_emit_db_state()
1567 static void r600_emit_db_misc_state(struct r600_context *rctx, struct r600_atom *atom) in r600_emit_db_misc_state() argument
1569 struct radeon_cmdbuf *cs = rctx->b.gfx.cs; in r600_emit_db_misc_state()
1576 if (rctx->b.chip_class >= R700) { in r600_emit_db_misc_state()
1591 if (rctx->b.num_occlusion_queries > 0 && in r600_emit_db_misc_state()
1593 if (rctx->b.chip_class >= R700) { in r600_emit_db_misc_state()
1601 if (rctx->db_state.rsurf && rctx->db_state.rsurf->db_htile_surface) { in r600_emit_db_misc_state()
1608 if (rctx->alphatest_state.sx_alpha_test_control) { in r600_emit_db_misc_state()
1614 if (rctx->b.chip_class == R600 && rctx->framebuffer.nr_samples > 1 && rctx->ps_iter_samples > 0) { in r600_emit_db_misc_state()
1626 if (rctx->b.chip_class == R600) in r600_emit_db_misc_state()
1629 if (rctx->b.family == CHIP_RV610 || rctx->b.family == CHIP_RV630 || in r600_emit_db_misc_state()
1630 rctx->b.family == CHIP_RV620 || rctx->b.family == CHIP_RV635) in r600_emit_db_misc_state()
1642 if (rctx->b.family == CHIP_RV770 && a->log_samples == 3) { in r600_emit_db_misc_state()
1652 static void r600_emit_config_state(struct r600_context *rctx, struct r600_atom *atom) in r600_emit_config_state() argument
1654 struct radeon_cmdbuf *cs = rctx->b.gfx.cs; in r600_emit_config_state()
1661 static void r600_emit_vertex_buffers(struct r600_context *rctx, struct r600_atom *atom) in r600_emit_vertex_buffers() argument
1663 struct radeon_cmdbuf *cs = rctx->b.gfx.cs; in r600_emit_vertex_buffers()
1664 uint32_t dirty_mask = rctx->vertex_buffer_state.dirty_mask; in r600_emit_vertex_buffers()
1672 vb = &rctx->vertex_buffer_state.vb[buffer_index]; in r600_emit_vertex_buffers()
1692 radeon_emit(cs, radeon_add_to_buffer_list(&rctx->b, &rctx->b.gfx, rbuffer, in r600_emit_vertex_buffers()
1697 static void r600_emit_constant_buffers(struct r600_context *rctx, in r600_emit_constant_buffers() argument
1703 struct radeon_cmdbuf *cs = rctx->b.gfx.cs; in r600_emit_constant_buffers()
1724 radeon_emit(cs, radeon_add_to_buffer_list(&rctx->b, &rctx->b.gfx, rbuffer, in r600_emit_constant_buffers()
1741 radeon_emit(cs, radeon_add_to_buffer_list(&rctx->b, &rctx->b.gfx, rbuffer, in r600_emit_constant_buffers()
1749 static void r600_emit_vs_constant_buffers(struct r600_context *rctx, struct r600_atom *atom) in r600_emit_vs_constant_buffers() argument
1751 r600_emit_constant_buffers(rctx, &rctx->constbuf_state[PIPE_SHADER_VERTEX], in r600_emit_vs_constant_buffers()
1757 static void r600_emit_gs_constant_buffers(struct r600_context *rctx, struct r600_atom *atom) in r600_emit_gs_constant_buffers() argument
1759 r600_emit_constant_buffers(rctx, &rctx->constbuf_state[PIPE_SHADER_GEOMETRY], in r600_emit_gs_constant_buffers()
1765 static void r600_emit_ps_constant_buffers(struct r600_context *rctx, struct r600_atom *atom) in r600_emit_ps_constant_buffers() argument
1767 r600_emit_constant_buffers(rctx, &rctx->constbuf_state[PIPE_SHADER_FRAGMENT], in r600_emit_ps_constant_buffers()
1773 static void r600_emit_sampler_views(struct r600_context *rctx, in r600_emit_sampler_views() argument
1777 struct radeon_cmdbuf *cs = rctx->b.gfx.cs; in r600_emit_sampler_views()
1792 reloc = radeon_add_to_buffer_list(&rctx->b, &rctx->b.gfx, rview->tex_resource, in r600_emit_sampler_views()
1804 static void r600_emit_vs_sampler_views(struct r600_context *rctx, struct r600_atom *atom) in r600_emit_vs_sampler_views() argument
1806 …r600_emit_sampler_views(rctx, &rctx->samplers[PIPE_SHADER_VERTEX].views, R600_FETCH_CONSTANTS_OFFS… in r600_emit_vs_sampler_views()
1809 static void r600_emit_gs_sampler_views(struct r600_context *rctx, struct r600_atom *atom) in r600_emit_gs_sampler_views() argument
1811 …r600_emit_sampler_views(rctx, &rctx->samplers[PIPE_SHADER_GEOMETRY].views, R600_FETCH_CONSTANTS_OF… in r600_emit_gs_sampler_views()
1814 static void r600_emit_ps_sampler_views(struct r600_context *rctx, struct r600_atom *atom) in r600_emit_ps_sampler_views() argument
1816 …r600_emit_sampler_views(rctx, &rctx->samplers[PIPE_SHADER_FRAGMENT].views, R600_FETCH_CONSTANTS_OF… in r600_emit_ps_sampler_views()
1819 static void r600_emit_sampler_states(struct r600_context *rctx, in r600_emit_sampler_states() argument
1824 struct radeon_cmdbuf *cs = rctx->b.gfx.cs; in r600_emit_sampler_states()
1867 static void r600_emit_vs_sampler_states(struct r600_context *rctx, struct r600_atom *atom) in r600_emit_vs_sampler_states() argument
1869 …r600_emit_sampler_states(rctx, &rctx->samplers[PIPE_SHADER_VERTEX], 18, R_00A600_TD_VS_SAMPLER0_BO… in r600_emit_vs_sampler_states()
1872 static void r600_emit_gs_sampler_states(struct r600_context *rctx, struct r600_atom *atom) in r600_emit_gs_sampler_states() argument
1874 …r600_emit_sampler_states(rctx, &rctx->samplers[PIPE_SHADER_GEOMETRY], 36, R_00A800_TD_GS_SAMPLER0_… in r600_emit_gs_sampler_states()
1877 static void r600_emit_ps_sampler_states(struct r600_context *rctx, struct r600_atom *atom) in r600_emit_ps_sampler_states() argument
1879 …r600_emit_sampler_states(rctx, &rctx->samplers[PIPE_SHADER_FRAGMENT], 0, R_00A400_TD_PS_SAMPLER0_B… in r600_emit_ps_sampler_states()
1882 static void r600_emit_seamless_cube_map(struct r600_context *rctx, struct r600_atom *atom) in r600_emit_seamless_cube_map() argument
1884 struct radeon_cmdbuf *cs = rctx->b.gfx.cs; in r600_emit_seamless_cube_map()
1891 if (!rctx->seamless_cube_map.enabled) { in r600_emit_seamless_cube_map()
1897 static void r600_emit_sample_mask(struct r600_context *rctx, struct r600_atom *a) in r600_emit_sample_mask() argument
1902 radeon_set_context_reg(rctx->b.gfx.cs, R_028C48_PA_SC_AA_MASK, in r600_emit_sample_mask()
1906 static void r600_emit_vertex_fetch_shader(struct r600_context *rctx, struct r600_atom *a) in r600_emit_vertex_fetch_shader() argument
1908 struct radeon_cmdbuf *cs = rctx->b.gfx.cs; in r600_emit_vertex_fetch_shader()
1917 radeon_emit(cs, radeon_add_to_buffer_list(&rctx->b, &rctx->b.gfx, shader->buffer, in r600_emit_vertex_fetch_shader()
1922 static void r600_emit_shader_stages(struct r600_context *rctx, struct r600_atom *a) in r600_emit_shader_stages() argument
1924 struct radeon_cmdbuf *cs = rctx->b.gfx.cs; in r600_emit_shader_stages()
1929 if (rctx->vs_shader->current->shader.vs_as_gs_a) { in r600_emit_shader_stages()
1937 if (rctx->gs_shader->gs_max_out_vertices <= 128) in r600_emit_shader_stages()
1939 else if (rctx->gs_shader->gs_max_out_vertices <= 256) in r600_emit_shader_stages()
1941 else if (rctx->gs_shader->gs_max_out_vertices <= 512) in r600_emit_shader_stages()
1949 if (rctx->gs_shader->current->shader.gs_prim_id_input) in r600_emit_shader_stages()
1957 static void r600_emit_gs_rings(struct r600_context *rctx, struct r600_atom *a) in r600_emit_gs_rings() argument
1959 struct radeon_cmdbuf *cs = rctx->b.gfx.cs; in r600_emit_gs_rings()
1971 radeon_emit(cs, radeon_add_to_buffer_list(&rctx->b, &rctx->b.gfx, rbuffer, in r600_emit_gs_rings()
1980 radeon_emit(cs, radeon_add_to_buffer_list(&rctx->b, &rctx->b.gfx, rbuffer, in r600_emit_gs_rings()
1996 bool r600_adjust_gprs(struct r600_context *rctx) in r600_adjust_gprs() argument
2002 unsigned def_num_clause_temp_gprs = rctx->r6xx_num_clause_temp_gprs; in r600_adjust_gprs()
2011 def_gprs[i] = rctx->default_gprs[i]; in r600_adjust_gprs()
2015 cur_gprs[R600_HW_STAGE_PS] = G_008C04_NUM_PS_GPRS(rctx->config_state.sq_gpr_resource_mgmt_1); in r600_adjust_gprs()
2016 cur_gprs[R600_HW_STAGE_VS] = G_008C04_NUM_VS_GPRS(rctx->config_state.sq_gpr_resource_mgmt_1); in r600_adjust_gprs()
2017 cur_gprs[R600_HW_STAGE_GS] = G_008C08_NUM_GS_GPRS(rctx->config_state.sq_gpr_resource_mgmt_2); in r600_adjust_gprs()
2018 cur_gprs[R600_HW_STAGE_ES] = G_008C08_NUM_ES_GPRS(rctx->config_state.sq_gpr_resource_mgmt_2); in r600_adjust_gprs()
2020 num_gprs[R600_HW_STAGE_PS] = rctx->ps_shader->current->shader.bc.ngpr; in r600_adjust_gprs()
2021 if (rctx->gs_shader) { in r600_adjust_gprs()
2022 num_gprs[R600_HW_STAGE_ES] = rctx->vs_shader->current->shader.bc.ngpr; in r600_adjust_gprs()
2023 num_gprs[R600_HW_STAGE_GS] = rctx->gs_shader->current->shader.bc.ngpr; in r600_adjust_gprs()
2024 num_gprs[R600_HW_STAGE_VS] = rctx->gs_shader->current->gs_copy_shader->shader.bc.ngpr; in r600_adjust_gprs()
2028 num_gprs[R600_HW_STAGE_VS] = rctx->vs_shader->current->shader.bc.ngpr; in r600_adjust_gprs()
2078 …if (rctx->config_state.sq_gpr_resource_mgmt_1 != tmp || rctx->config_state.sq_gpr_resource_mgmt_2 … in r600_adjust_gprs()
2079 rctx->config_state.sq_gpr_resource_mgmt_1 = tmp; in r600_adjust_gprs()
2080 rctx->config_state.sq_gpr_resource_mgmt_2 = tmp2; in r600_adjust_gprs()
2081 r600_mark_atom_dirty(rctx, &rctx->config_state.atom); in r600_adjust_gprs()
2082 rctx->b.flags |= R600_CONTEXT_WAIT_3D_IDLE; in r600_adjust_gprs()
2087 void r600_init_atom_start_cs(struct r600_context *rctx) in r600_init_atom_start_cs() argument
2107 struct r600_command_buffer *cb = &rctx->start_cs_cmd; in r600_init_atom_start_cs()
2113 if (rctx->b.chip_class == R600) { in r600_init_atom_start_cs()
2132 family = rctx->b.family; in r600_init_atom_start_cs()
2252 rctx->default_gprs[R600_HW_STAGE_PS] = num_ps_gprs; in r600_init_atom_start_cs()
2253 rctx->default_gprs[R600_HW_STAGE_VS] = num_vs_gprs; in r600_init_atom_start_cs()
2254 rctx->default_gprs[R600_HW_STAGE_GS] = 0; in r600_init_atom_start_cs()
2255 rctx->default_gprs[R600_HW_STAGE_ES] = 0; in r600_init_atom_start_cs()
2257 rctx->r6xx_num_clause_temp_gprs = num_temp_gprs; in r600_init_atom_start_cs()
2305 if (rctx->b.chip_class >= R700) { in r600_init_atom_start_cs()
2386 if (rctx->b.chip_class >= R700) { in r600_init_atom_start_cs()
2419 if (rctx->b.chip_class == R700) in r600_init_atom_start_cs()
2421 if (rctx->b.chip_class == R700 && rctx->screen->b.has_streamout) in r600_init_atom_start_cs()
2425 if (rctx->screen->b.has_streamout) { in r600_init_atom_start_cs()
2436 struct r600_context *rctx = (struct r600_context *)ctx; in r600_update_ps_state() local
2444 unsigned sprite_coord_enable = rctx->rasterizer ? rctx->rasterizer->sprite_coord_enable : 0; in r600_update_ps_state()
2472 rctx->rasterizer && rctx->rasterizer->flatshade)) in r600_update_ps_state()
2502 rctx->framebuffer.nr_samples > 1 && rctx->ps_iter_samples > 0) in r600_update_ps_state()
2553 if (rctx->b.family == CHIP_R600) in r600_update_ps_state()
2583 if (rctx->rasterizer) in r600_update_ps_state()
2584 shader->flatshade = rctx->rasterizer->flatshade; in r600_update_ps_state()
2651 struct r600_context *rctx = (struct r600_context *)ctx; in r600_update_gs_state() local
2660 switch (rctx->b.family) { in r600_update_gs_state()
2680 if (rctx->b.chip_class >= R700) { in r600_update_gs_state()
2727 void *r600_create_resolve_blend(struct r600_context *rctx) in r600_create_resolve_blend() argument
2744 return r600_create_blend_state_mode(&rctx->b.b, &blend, V_028808_SPECIAL_RESOLVE_BOX); in r600_create_resolve_blend()
2747 void *r700_create_resolve_blend(struct r600_context *rctx) in r700_create_resolve_blend() argument
2754 return r600_create_blend_state_mode(&rctx->b.b, &blend, V_028808_SPECIAL_RESOLVE_BOX); in r700_create_resolve_blend()
2757 void *r600_create_decompress_blend(struct r600_context *rctx) in r600_create_decompress_blend() argument
2764 return r600_create_blend_state_mode(&rctx->b.b, &blend, V_028808_SPECIAL_EXPAND_SAMPLES); in r600_create_decompress_blend()
2767 void *r600_create_db_flush_dsa(struct r600_context *rctx) in r600_create_db_flush_dsa() argument
2772 if (rctx->b.family == CHIP_RV610 || rctx->b.family == CHIP_RV630 || in r600_create_db_flush_dsa()
2773 rctx->b.family == CHIP_RV620 || rctx->b.family == CHIP_RV635) in r600_create_db_flush_dsa()
2788 return rctx->b.b.create_depth_stencil_alpha_state(&rctx->b.b, &dsa); in r600_create_db_flush_dsa()
2791 void r600_update_db_shader_control(struct r600_context * rctx) in r600_update_db_shader_control() argument
2797 if (!rctx->ps_shader) { in r600_update_db_shader_control()
2801 dual_export = rctx->framebuffer.export_16bpc && in r600_update_db_shader_control()
2802 !rctx->ps_shader->current->ps_depth_export; in r600_update_db_shader_control()
2804 db_shader_control = rctx->ps_shader->current->db_shader_control | in r600_update_db_shader_control()
2807 ps_conservative_z = rctx->ps_shader->current->shader.ps_conservative_z; in r600_update_db_shader_control()
2816 if (rctx->alphatest_state.sx_alpha_test_control) { in r600_update_db_shader_control()
2822 if (db_shader_control != rctx->db_misc_state.db_shader_control || in r600_update_db_shader_control()
2823 ps_conservative_z != rctx->db_misc_state.ps_conservative_z) { in r600_update_db_shader_control()
2824 rctx->db_misc_state.db_shader_control = db_shader_control; in r600_update_db_shader_control()
2825 rctx->db_misc_state.ps_conservative_z = ps_conservative_z; in r600_update_db_shader_control()
2826 r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom); in r600_update_db_shader_control()
2842 static boolean r600_dma_copy_tile(struct r600_context *rctx, in r600_dma_copy_tile() argument
2857 struct radeon_cmdbuf *cs = rctx->b.dma.cs; in r600_dma_copy_tile()
2921 r600_need_dma_space(&rctx->b, ncopy * 7, &rdst->resource, &rsrc->resource); in r600_dma_copy_tile()
2927 radeon_add_to_buffer_list(&rctx->b, &rctx->b.dma, &rsrc->resource, RADEON_USAGE_READ, 0); in r600_dma_copy_tile()
2928 radeon_add_to_buffer_list(&rctx->b, &rctx->b.dma, &rdst->resource, RADEON_USAGE_WRITE, 0); in r600_dma_copy_tile()
2953 struct r600_context *rctx = (struct r600_context *)ctx; in r600_dma_copy() local
2961 if (rctx->b.dma.cs == NULL) { in r600_dma_copy()
2969 r600_dma_copy_buffer(rctx, dst, src, dst_x, src_box->x, src_box->width); in r600_dma_copy()
2974 !r600_prepare_for_dma_blit(&rctx->b, rdst, dst_level, dstx, dsty, in r600_dma_copy()
3021 r600_dma_copy_buffer(rctx, dst, src, dst_offset, src_offset, size); in r600_dma_copy()
3023 if (!r600_dma_copy_tile(rctx, dst, dst_level, dst_x, dst_y, dst_z, in r600_dma_copy()
3036 void r600_init_state_functions(struct r600_context *rctx) in r600_init_state_functions() argument
3050 r600_init_atom(rctx, &rctx->framebuffer.atom, id++, r600_emit_framebuffer_state, 0); in r600_init_state_functions()
3053 …r600_init_atom(rctx, &rctx->constbuf_state[PIPE_SHADER_VERTEX].atom, id++, r600_emit_vs_constant_b… in r600_init_state_functions()
3054 …r600_init_atom(rctx, &rctx->constbuf_state[PIPE_SHADER_GEOMETRY].atom, id++, r600_emit_gs_constant… in r600_init_state_functions()
3055 …r600_init_atom(rctx, &rctx->constbuf_state[PIPE_SHADER_FRAGMENT].atom, id++, r600_emit_ps_constant… in r600_init_state_functions()
3060 …r600_init_atom(rctx, &rctx->samplers[PIPE_SHADER_VERTEX].states.atom, id++, r600_emit_vs_sampler_s… in r600_init_state_functions()
3061 …r600_init_atom(rctx, &rctx->samplers[PIPE_SHADER_GEOMETRY].states.atom, id++, r600_emit_gs_sampler… in r600_init_state_functions()
3062 …r600_init_atom(rctx, &rctx->samplers[PIPE_SHADER_FRAGMENT].states.atom, id++, r600_emit_ps_sampler… in r600_init_state_functions()
3064 …r600_init_atom(rctx, &rctx->samplers[PIPE_SHADER_VERTEX].views.atom, id++, r600_emit_vs_sampler_vi… in r600_init_state_functions()
3065 …r600_init_atom(rctx, &rctx->samplers[PIPE_SHADER_GEOMETRY].views.atom, id++, r600_emit_gs_sampler_… in r600_init_state_functions()
3066 …r600_init_atom(rctx, &rctx->samplers[PIPE_SHADER_FRAGMENT].views.atom, id++, r600_emit_ps_sampler_… in r600_init_state_functions()
3067 r600_init_atom(rctx, &rctx->vertex_buffer_state.atom, id++, r600_emit_vertex_buffers, 0); in r600_init_state_functions()
3069 r600_init_atom(rctx, &rctx->vgt_state.atom, id++, r600_emit_vgt_state, 10); in r600_init_state_functions()
3071 r600_init_atom(rctx, &rctx->seamless_cube_map.atom, id++, r600_emit_seamless_cube_map, 3); in r600_init_state_functions()
3072 r600_init_atom(rctx, &rctx->sample_mask.atom, id++, r600_emit_sample_mask, 3); in r600_init_state_functions()
3073 rctx->sample_mask.sample_mask = ~0; in r600_init_state_functions()
3075 r600_init_atom(rctx, &rctx->alphatest_state.atom, id++, r600_emit_alphatest_state, 6); in r600_init_state_functions()
3076 r600_init_atom(rctx, &rctx->blend_color.atom, id++, r600_emit_blend_color, 6); in r600_init_state_functions()
3077 r600_init_atom(rctx, &rctx->blend_state.atom, id++, r600_emit_cso_state, 0); in r600_init_state_functions()
3078 r600_init_atom(rctx, &rctx->cb_misc_state.atom, id++, r600_emit_cb_misc_state, 7); in r600_init_state_functions()
3079 r600_init_atom(rctx, &rctx->clip_misc_state.atom, id++, r600_emit_clip_misc_state, 6); in r600_init_state_functions()
3080 r600_init_atom(rctx, &rctx->clip_state.atom, id++, r600_emit_clip_state, 26); in r600_init_state_functions()
3081 r600_init_atom(rctx, &rctx->db_misc_state.atom, id++, r600_emit_db_misc_state, 7); in r600_init_state_functions()
3082 r600_init_atom(rctx, &rctx->db_state.atom, id++, r600_emit_db_state, 11); in r600_init_state_functions()
3083 r600_init_atom(rctx, &rctx->dsa_state.atom, id++, r600_emit_cso_state, 0); in r600_init_state_functions()
3084 r600_init_atom(rctx, &rctx->poly_offset_state.atom, id++, r600_emit_polygon_offset, 9); in r600_init_state_functions()
3085 r600_init_atom(rctx, &rctx->rasterizer_state.atom, id++, r600_emit_cso_state, 0); in r600_init_state_functions()
3086 r600_add_atom(rctx, &rctx->b.scissors.atom, id++); in r600_init_state_functions()
3087 r600_add_atom(rctx, &rctx->b.viewports.atom, id++); in r600_init_state_functions()
3088 r600_init_atom(rctx, &rctx->config_state.atom, id++, r600_emit_config_state, 3); in r600_init_state_functions()
3089 r600_init_atom(rctx, &rctx->stencil_ref.atom, id++, r600_emit_stencil_ref, 4); in r600_init_state_functions()
3090 r600_init_atom(rctx, &rctx->vertex_fetch_shader.atom, id++, r600_emit_vertex_fetch_shader, 5); in r600_init_state_functions()
3091 r600_add_atom(rctx, &rctx->b.render_cond_atom, id++); in r600_init_state_functions()
3092 r600_add_atom(rctx, &rctx->b.streamout.begin_atom, id++); in r600_init_state_functions()
3093 r600_add_atom(rctx, &rctx->b.streamout.enable_atom, id++); in r600_init_state_functions()
3095 r600_init_atom(rctx, &rctx->hw_shader_stages[i].atom, id++, r600_emit_shader, 0); in r600_init_state_functions()
3096 r600_init_atom(rctx, &rctx->shader_stages.atom, id++, r600_emit_shader_stages, 0); in r600_init_state_functions()
3097 r600_init_atom(rctx, &rctx->gs_rings.atom, id++, r600_emit_gs_rings, 0); in r600_init_state_functions()
3099 rctx->b.b.create_blend_state = r600_create_blend_state; in r600_init_state_functions()
3100 rctx->b.b.create_depth_stencil_alpha_state = r600_create_dsa_state; in r600_init_state_functions()
3101 rctx->b.b.create_rasterizer_state = r600_create_rs_state; in r600_init_state_functions()
3102 rctx->b.b.create_sampler_state = r600_create_sampler_state; in r600_init_state_functions()
3103 rctx->b.b.create_sampler_view = r600_create_sampler_view; in r600_init_state_functions()
3104 rctx->b.b.set_framebuffer_state = r600_set_framebuffer_state; in r600_init_state_functions()
3105 rctx->b.b.set_polygon_stipple = r600_set_polygon_stipple; in r600_init_state_functions()
3106 rctx->b.b.set_min_samples = r600_set_min_samples; in r600_init_state_functions()
3107 rctx->b.b.get_sample_position = r600_get_sample_position; in r600_init_state_functions()
3108 rctx->b.dma_copy = r600_dma_copy; in r600_init_state_functions()