283     struct ureg_src aVtx;  member
370     vs->aVtx = build_vs_add_input(vs,  in nine_ff_build_vs()
441             ureg_MOV(ureg, oPos, vs->aVtx);  in nine_ff_build_vs()
449             ureg_MOV(ureg, tmp, vs->aVtx);  in nine_ff_build_vs()
492             ureg_MUL(ureg, tmp, _XXXX(vs->aVtx), cWM[0]);  in nine_ff_build_vs()
493             ureg_MAD(ureg, tmp, _YYYY(vs->aVtx), cWM[1], ureg_src(tmp));  in nine_ff_build_vs()
494             ureg_MAD(ureg, tmp, _ZZZZ(vs->aVtx), cWM[2], ureg_src(tmp));  in nine_ff_build_vs()
495             ureg_MAD(ureg, tmp, _WWWW(vs->aVtx), cWM[3], ureg_src(tmp));  in nine_ff_build_vs()
529             vs->aVtx = ureg_src(aVtx_dst);  in nine_ff_build_vs()
548             ureg_LRP(ureg, aVtx_dst, _XXXX(_CONST(30)), vs->aVtx1, vs->aVtx);  in nine_ff_build_vs()
549             vs->aVtx = ureg_src(aVtx_dst);  in nine_ff_build_vs()
558         ureg_MUL(ureg, tmp, _XXXX(vs->aVtx), _CONST(0));  in nine_ff_build_vs()
559         ureg_MAD(ureg, tmp, _YYYY(vs->aVtx), _CONST(1), ureg_src(tmp));  in nine_ff_build_vs()
560         ureg_MAD(ureg, tmp, _ZZZZ(vs->aVtx), _CONST(2), ureg_src(tmp));  in nine_ff_build_vs()
561         ureg_MAD(ureg, oPos, _WWWW(vs->aVtx), _CONST(3), ureg_src(tmp));  in nine_ff_build_vs()
566             ureg_MUL(ureg, aVtx_dst, _XXXX(vs->aVtx), _CONST(4));  in nine_ff_build_vs()
567             ureg_MAD(ureg, aVtx_dst, _YYYY(vs->aVtx), _CONST(5), ureg_src(aVtx_dst));  in nine_ff_build_vs()
568             ureg_MAD(ureg, aVtx_dst, _ZZZZ(vs->aVtx), _CONST(6), ureg_src(aVtx_dst));  in nine_ff_build_vs()
569             ureg_MAD(ureg, aVtx_dst, _WWWW(vs->aVtx), _CONST(7), ureg_src(aVtx_dst));  in nine_ff_build_vs()
570             vs->aVtx = ureg_src(aVtx_dst);  in nine_ff_build_vs()
603             ureg_DP3(ureg, tmp_x, vs->aVtx, vs->aVtx);  in nine_ff_build_vs()
652             ureg_MOV(ureg, ureg_writemask(input_coord, TGSI_WRITEMASK_XYZ), vs->aVtx);  in nine_ff_build_vs()
659             ureg_normalize3(ureg, aVtx_normed, vs->aVtx);  in nine_ff_build_vs()
674             ureg_normalize3(ureg, aVtx_normed, vs->aVtx);  in nine_ff_build_vs()
835             ureg_ADD(ureg, rHit, cLPos, ureg_negate(vs->aVtx));  in nine_ff_build_vs()
884                 ureg_normalize3(ureg, rMid, vs->aVtx);  in nine_ff_build_vs()
971             ureg_DP3(ureg, tmp_x, vs->aVtx, vs->aVtx);  in nine_ff_build_vs()
975             ureg_MOV(ureg, tmp_z, ureg_abs(_ZZZZ(vs->aVtx)));  in nine_ff_build_vs()
1051         ureg_MUL(ureg, tmp, _XXXX(vs->aVtx), _CONST(12));  in nine_ff_build_vs()
1052         ureg_MAD(ureg, tmp, _YYYY(vs->aVtx), _CONST(13),  ureg_src(tmp));  in nine_ff_build_vs()
1053         ureg_MAD(ureg, tmp, _ZZZZ(vs->aVtx), _CONST(14), ureg_src(tmp));  in nine_ff_build_vs()