Lines Matching refs:abld
1369 const fs_builder abld = bld.annotate("compute sample position"); in emit_samplepos_setup() local
1387 fetch_payload_reg(abld, payload.sample_pos_reg, BRW_REGISTER_TYPE_W); in emit_samplepos_setup()
1390 abld.MOV(int_sample_x, subscript(sample_pos_reg, BRW_REGISTER_TYPE_B, 0)); in emit_samplepos_setup()
1391 compute_sample_position(offset(pos, abld, 0), int_sample_x); in emit_samplepos_setup()
1394 abld.MOV(int_sample_y, subscript(sample_pos_reg, BRW_REGISTER_TYPE_B, 1)); in emit_samplepos_setup()
1395 compute_sample_position(offset(pos, abld, 1), int_sample_y); in emit_samplepos_setup()
1406 const fs_builder abld = bld.annotate("compute sample id"); in emit_sampleid_setup() local
1414 abld.MOV(*reg, brw_imm_d(0)); in emit_sampleid_setup()
1444 const fs_reg tmp = abld.vgrf(BRW_REGISTER_TYPE_UW); in emit_sampleid_setup()
1447 const fs_builder hbld = abld.group(MIN2(16, dispatch_width), i); in emit_sampleid_setup()
1454 abld.AND(*reg, tmp, brw_imm_w(0xf)); in emit_sampleid_setup()
1456 const fs_reg t1 = component(abld.vgrf(BRW_REGISTER_TYPE_UD), 0); in emit_sampleid_setup()
1457 const fs_reg t2 = abld.vgrf(BRW_REGISTER_TYPE_UW); in emit_sampleid_setup()
1482 abld.exec_all().group(1, 0) in emit_sampleid_setup()
1485 abld.exec_all().group(1, 0).SHR(t1, t1, brw_imm_d(5)); in emit_sampleid_setup()
1495 abld.exec_all().group(8, 0).MOV(t2, brw_imm_v(0x32103210)); in emit_sampleid_setup()
1500 abld.emit(FS_OPCODE_SET_SAMPLE_ID, *reg, t1, t2); in emit_sampleid_setup()
1529 const fs_builder abld = bld.annotate("compute gl_SampleMaskIn"); in emit_samplemaskin_setup() local
1536 abld.MOV(one, brw_imm_d(1)); in emit_samplemaskin_setup()
1537 abld.SHL(enabled_mask, one, nir_system_values[SYSTEM_VALUE_SAMPLE_ID]); in emit_samplemaskin_setup()
1538 abld.AND(*reg, enabled_mask, coverage_mask); in emit_samplemaskin_setup()
1569 const fs_builder abld = bld.annotate("thread end"); in emit_gs_thread_end() local
1591 fs_reg hdr = abld.vgrf(BRW_REGISTER_TYPE_UD, 1); in emit_gs_thread_end()
1592 abld.MOV(hdr, fs_reg(retype(brw_vec8_grf(1, 0), BRW_REGISTER_TYPE_UD))); in emit_gs_thread_end()
1593 inst = abld.emit(SHADER_OPCODE_URB_WRITE_SIMD8, reg_undef, hdr); in emit_gs_thread_end()
1596 fs_reg payload = abld.vgrf(BRW_REGISTER_TYPE_UD, 2); in emit_gs_thread_end()
1600 abld.LOAD_PAYLOAD(payload, sources, 2, 2); in emit_gs_thread_end()
1601 inst = abld.emit(SHADER_OPCODE_URB_WRITE_SIMD8, reg_undef, payload); in emit_gs_thread_end()
8287 const fs_builder abld = bld.annotate("initialize control data bits"); in run_gs() local
8288 abld.MOV(this->control_data_bits, brw_imm_ud(0u)); in run_gs()
8444 const fs_builder abld = bld.exec_all().group(1, 0); in run_cs() local
8445 abld.MOV(retype(brw_sr0_reg(1), BRW_REGISTER_TYPE_UW), in run_cs()