Lines Matching refs:surf
1610 struct isl_surf *surf, in isl_surf_init_s() argument
1754 *surf = (struct isl_surf) { in isl_surf_init_s()
1781 isl_surf_get_tile_info(const struct isl_surf *surf, in isl_surf_get_tile_info() argument
1784 const struct isl_format_layout *fmtl = isl_format_get_layout(surf->format); in isl_surf_get_tile_info()
1785 isl_tiling_get_info(surf->tiling, fmtl->bpb, tile_info); in isl_surf_get_tile_info()
1790 const struct isl_surf *surf, in isl_surf_get_hiz_surf() argument
1795 if (!isl_surf_usage_is_depth(surf->usage)) in isl_surf_get_hiz_surf()
1799 if (!isl_tiling_is_any_y(surf->tiling)) in isl_surf_get_hiz_surf()
1803 switch (surf->format) { in isl_surf_get_hiz_surf()
1805 if (isl_surf_usage_is_depth_and_stencil(surf->usage)) { in isl_surf_get_hiz_surf()
1815 assert(isl_surf_usage_is_depth_and_stencil(surf->usage)); in isl_surf_get_hiz_surf()
1824 assert(surf->msaa_layout == ISL_MSAA_LAYOUT_NONE || in isl_surf_get_hiz_surf()
1825 surf->msaa_layout == ISL_MSAA_LAYOUT_INTERLEAVED); in isl_surf_get_hiz_surf()
1882 const unsigned samples = ISL_DEV_GEN(dev) >= 9 ? 1 : surf->samples; in isl_surf_get_hiz_surf()
1885 .dim = surf->dim, in isl_surf_get_hiz_surf()
1887 .width = surf->logical_level0_px.width, in isl_surf_get_hiz_surf()
1888 .height = surf->logical_level0_px.height, in isl_surf_get_hiz_surf()
1889 .depth = surf->logical_level0_px.depth, in isl_surf_get_hiz_surf()
1890 .levels = surf->levels, in isl_surf_get_hiz_surf()
1891 .array_len = surf->logical_level0_px.array_len, in isl_surf_get_hiz_surf()
1899 const struct isl_surf *surf, in isl_surf_get_mcs_surf() argument
1903 if (surf->msaa_layout != ISL_MSAA_LAYOUT_ARRAY) in isl_surf_get_mcs_surf()
1910 assert(surf->samples > 1); in isl_surf_get_mcs_surf()
1911 assert(surf->dim == ISL_SURF_DIM_2D); in isl_surf_get_mcs_surf()
1912 assert(surf->levels == 1); in isl_surf_get_mcs_surf()
1913 assert(surf->logical_level0_px.depth == 1); in isl_surf_get_mcs_surf()
1926 if (ISL_DEV_GEN(dev) == 7 && isl_format_has_sint_channel(surf->format)) in isl_surf_get_mcs_surf()
1936 if (surf->samples == 16 && surf->logical_level0_px.width > 8192) in isl_surf_get_mcs_surf()
1940 switch (surf->samples) { in isl_surf_get_mcs_surf()
1952 .width = surf->logical_level0_px.width, in isl_surf_get_mcs_surf()
1953 .height = surf->logical_level0_px.height, in isl_surf_get_mcs_surf()
1956 .array_len = surf->logical_level0_px.array_len, in isl_surf_get_mcs_surf()
1964 const struct isl_surf *surf) in isl_surf_supports_ccs() argument
1970 if (surf->usage & ISL_SURF_USAGE_DISABLE_AUX_BIT) in isl_surf_supports_ccs()
1973 if (isl_format_is_compressed(surf->format)) in isl_surf_supports_ccs()
1976 if (!isl_is_pow2(isl_format_get_layout(surf->format)->bpb)) in isl_surf_supports_ccs()
1998 if (surf->tiling == ISL_TILING_LINEAR) in isl_surf_supports_ccs()
2002 if (isl_surf_usage_is_stencil(surf->usage) && surf->samples > 1) in isl_surf_supports_ccs()
2008 if (surf->row_pitch_B % 512 != 0) in isl_surf_supports_ccs()
2014 if (surf->dim == ISL_SURF_DIM_3D) { in isl_surf_supports_ccs()
2034 if (surf->tiling != ISL_TILING_Y0) in isl_surf_supports_ccs()
2038 if (surf->samples > 1) in isl_surf_supports_ccs()
2042 if (isl_surf_usage_is_depth_or_stencil(surf->usage)) in isl_surf_supports_ccs()
2049 if (ISL_DEV_GEN(dev) <= 8 && surf->dim != ISL_SURF_DIM_2D) in isl_surf_supports_ccs()
2067 (surf->levels > 1 || surf->logical_level0_px.array_len > 1)) in isl_surf_supports_ccs()
2076 if (isl_format_get_layout(surf->format)->bpb < 32) in isl_surf_supports_ccs()
2085 if (ISL_DEV_GEN(dev) >= 9 && !isl_tiling_is_any_y(surf->tiling)) in isl_surf_supports_ccs()
2094 const struct isl_surf *surf, in isl_surf_get_ccs_surf() argument
2111 if (!isl_surf_supports_ccs(dev, surf)) in isl_surf_get_ccs_surf()
2116 switch (isl_format_get_layout(surf->format)->bpb) { in isl_surf_get_ccs_surf()
2135 .width = isl_surf_get_row_pitch_el(surf), in isl_surf_get_ccs_surf()
2136 .height = surf->size_B / surf->row_pitch_B, in isl_surf_get_ccs_surf()
2144 assert(!ok || ccs_surf->size_B == surf->size_B / 256); in isl_surf_get_ccs_surf()
2149 switch (isl_format_get_layout(surf->format)->bpb) { in isl_surf_get_ccs_surf()
2156 } else if (surf->tiling == ISL_TILING_Y0) { in isl_surf_get_ccs_surf()
2157 switch (isl_format_get_layout(surf->format)->bpb) { in isl_surf_get_ccs_surf()
2163 } else if (surf->tiling == ISL_TILING_X) { in isl_surf_get_ccs_surf()
2164 switch (isl_format_get_layout(surf->format)->bpb) { in isl_surf_get_ccs_surf()
2175 .dim = surf->dim, in isl_surf_get_ccs_surf()
2177 .width = surf->logical_level0_px.width, in isl_surf_get_ccs_surf()
2178 .height = surf->logical_level0_px.height, in isl_surf_get_ccs_surf()
2179 .depth = surf->logical_level0_px.depth, in isl_surf_get_ccs_surf()
2180 .levels = surf->levels, in isl_surf_get_ccs_surf()
2181 .array_len = surf->logical_level0_px.array_len, in isl_surf_get_ccs_surf()
2243 if (info->surf->dim == ISL_SURF_DIM_3D) { in isl_surf_fill_state_s()
2245 info->surf->logical_level0_px.depth); in isl_surf_fill_state_s()
2248 info->surf->logical_level0_px.array_len); in isl_surf_fill_state_s()
2310 get_image_offset_sa_gen4_2d(const struct isl_surf *surf, in get_image_offset_sa_gen4_2d() argument
2315 assert(level < surf->levels); in get_image_offset_sa_gen4_2d()
2316 if (surf->dim == ISL_SURF_DIM_3D) in get_image_offset_sa_gen4_2d()
2317 assert(logical_array_layer < surf->logical_level0_px.depth); in get_image_offset_sa_gen4_2d()
2319 assert(logical_array_layer < surf->logical_level0_px.array_len); in get_image_offset_sa_gen4_2d()
2322 isl_surf_get_image_alignment_sa(surf); in get_image_offset_sa_gen4_2d()
2324 const uint32_t W0 = surf->phys_level0_sa.width; in get_image_offset_sa_gen4_2d()
2325 const uint32_t H0 = surf->phys_level0_sa.height; in get_image_offset_sa_gen4_2d()
2328 (surf->msaa_layout == ISL_MSAA_LAYOUT_ARRAY ? surf->samples : 1); in get_image_offset_sa_gen4_2d()
2331 uint32_t y = phys_layer * isl_surf_get_array_pitch_sa_rows(surf); in get_image_offset_sa_gen4_2d()
2352 get_image_offset_sa_gen4_3d(const struct isl_surf *surf, in get_image_offset_sa_gen4_3d() argument
2357 assert(level < surf->levels); in get_image_offset_sa_gen4_3d()
2358 if (surf->dim == ISL_SURF_DIM_3D) { in get_image_offset_sa_gen4_3d()
2359 assert(surf->phys_level0_sa.array_len == 1); in get_image_offset_sa_gen4_3d()
2360 assert(logical_z_offset_px < isl_minify(surf->phys_level0_sa.depth, level)); in get_image_offset_sa_gen4_3d()
2362 assert(surf->dim == ISL_SURF_DIM_2D); in get_image_offset_sa_gen4_3d()
2363 assert(surf->usage & ISL_SURF_USAGE_CUBE_BIT); in get_image_offset_sa_gen4_3d()
2364 assert(surf->phys_level0_sa.array_len == 6); in get_image_offset_sa_gen4_3d()
2365 assert(logical_z_offset_px < surf->phys_level0_sa.array_len); in get_image_offset_sa_gen4_3d()
2369 isl_surf_get_image_alignment_sa(surf); in get_image_offset_sa_gen4_3d()
2371 const uint32_t W0 = surf->phys_level0_sa.width; in get_image_offset_sa_gen4_3d()
2372 const uint32_t H0 = surf->phys_level0_sa.height; in get_image_offset_sa_gen4_3d()
2373 const uint32_t D0 = surf->phys_level0_sa.depth; in get_image_offset_sa_gen4_3d()
2374 const uint32_t AL = surf->phys_level0_sa.array_len; in get_image_offset_sa_gen4_3d()
2382 isl_align_npot(surf->dim == ISL_SURF_DIM_3D ? isl_minify(D0, l) : AL, in get_image_offset_sa_gen4_3d()
2392 isl_align_npot(surf->dim == ISL_SURF_DIM_3D ? isl_minify(D0, level) : AL, in get_image_offset_sa_gen4_3d()
2405 get_image_offset_sa_gen6_stencil_hiz(const struct isl_surf *surf, in get_image_offset_sa_gen6_stencil_hiz() argument
2411 assert(level < surf->levels); in get_image_offset_sa_gen6_stencil_hiz()
2412 assert(surf->logical_level0_px.depth == 1); in get_image_offset_sa_gen6_stencil_hiz()
2413 assert(logical_array_layer < surf->logical_level0_px.array_len); in get_image_offset_sa_gen6_stencil_hiz()
2415 const struct isl_format_layout *fmtl = isl_format_get_layout(surf->format); in get_image_offset_sa_gen6_stencil_hiz()
2418 isl_surf_get_image_alignment_sa(surf); in get_image_offset_sa_gen6_stencil_hiz()
2421 isl_tiling_get_info(surf->tiling, fmtl->bpb, &tile_info); in get_image_offset_sa_gen6_stencil_hiz()
2430 const uint32_t W0 = surf->phys_level0_sa.w; in get_image_offset_sa_gen6_stencil_hiz()
2431 const uint32_t H0 = surf->phys_level0_sa.h; in get_image_offset_sa_gen6_stencil_hiz()
2439 if (surf->phys_level0_sa.array_len > 1) in get_image_offset_sa_gen6_stencil_hiz()
2440 assert(surf->array_pitch_el_rows == isl_assert_div(H, fmtl->bh)); in get_image_offset_sa_gen6_stencil_hiz()
2447 const uint32_t h = isl_align(H * surf->phys_level0_sa.a, in get_image_offset_sa_gen6_stencil_hiz()
2468 get_image_offset_sa_gen9_1d(const struct isl_surf *surf, in get_image_offset_sa_gen9_1d() argument
2473 assert(level < surf->levels); in get_image_offset_sa_gen9_1d()
2474 assert(layer < surf->phys_level0_sa.array_len); in get_image_offset_sa_gen9_1d()
2475 assert(surf->phys_level0_sa.height == 1); in get_image_offset_sa_gen9_1d()
2476 assert(surf->phys_level0_sa.depth == 1); in get_image_offset_sa_gen9_1d()
2477 assert(surf->samples == 1); in get_image_offset_sa_gen9_1d()
2479 const uint32_t W0 = surf->phys_level0_sa.width; in get_image_offset_sa_gen9_1d()
2481 isl_surf_get_image_alignment_sa(surf); in get_image_offset_sa_gen9_1d()
2493 *y_offset_sa = layer * isl_surf_get_array_pitch_sa_rows(surf); in get_image_offset_sa_gen9_1d()
2505 isl_surf_get_image_offset_sa(const struct isl_surf *surf, in isl_surf_get_image_offset_sa() argument
2512 assert(level < surf->levels); in isl_surf_get_image_offset_sa()
2513 assert(logical_array_layer < surf->logical_level0_px.array_len); in isl_surf_get_image_offset_sa()
2515 < isl_minify(surf->logical_level0_px.depth, level)); in isl_surf_get_image_offset_sa()
2517 switch (surf->dim_layout) { in isl_surf_get_image_offset_sa()
2519 get_image_offset_sa_gen9_1d(surf, level, logical_array_layer, in isl_surf_get_image_offset_sa()
2523 get_image_offset_sa_gen4_2d(surf, level, logical_array_layer in isl_surf_get_image_offset_sa()
2528 get_image_offset_sa_gen4_3d(surf, level, logical_array_layer + in isl_surf_get_image_offset_sa()
2533 get_image_offset_sa_gen6_stencil_hiz(surf, level, logical_array_layer + in isl_surf_get_image_offset_sa()
2544 isl_surf_get_image_offset_el(const struct isl_surf *surf, in isl_surf_get_image_offset_el() argument
2551 const struct isl_format_layout *fmtl = isl_format_get_layout(surf->format); in isl_surf_get_image_offset_el()
2553 assert(level < surf->levels); in isl_surf_get_image_offset_el()
2554 assert(logical_array_layer < surf->logical_level0_px.array_len); in isl_surf_get_image_offset_el()
2556 < isl_minify(surf->logical_level0_px.depth, level)); in isl_surf_get_image_offset_el()
2559 isl_surf_get_image_offset_sa(surf, level, in isl_surf_get_image_offset_el()
2570 isl_surf_get_image_offset_B_tile_sa(const struct isl_surf *surf, in isl_surf_get_image_offset_B_tile_sa() argument
2578 const struct isl_format_layout *fmtl = isl_format_get_layout(surf->format); in isl_surf_get_image_offset_B_tile_sa()
2581 isl_surf_get_image_offset_el(surf, level, logical_array_layer, in isl_surf_get_image_offset_B_tile_sa()
2587 isl_tiling_get_intratile_offset_el(surf->tiling, fmtl->bpb, in isl_surf_get_image_offset_B_tile_sa()
2588 surf->row_pitch_B, in isl_surf_get_image_offset_B_tile_sa()
2609 isl_surf_get_image_range_B_tile(const struct isl_surf *surf, in isl_surf_get_image_range_B_tile() argument
2617 isl_surf_get_image_offset_el(surf, level, logical_array_layer, in isl_surf_get_image_range_B_tile()
2623 const uint32_t subimage_w_sa = isl_minify(surf->phys_level0_sa.w, level); in isl_surf_get_image_range_B_tile()
2624 const uint32_t subimage_h_sa = isl_minify(surf->phys_level0_sa.h, level); in isl_surf_get_image_range_B_tile()
2625 const struct isl_format_layout *fmtl = isl_format_get_layout(surf->format); in isl_surf_get_image_range_B_tile()
2634 isl_tiling_get_intratile_offset_el(surf->tiling, fmtl->bpb, in isl_surf_get_image_range_B_tile()
2635 surf->row_pitch_B, in isl_surf_get_image_range_B_tile()
2642 isl_tiling_get_intratile_offset_el(surf->tiling, fmtl->bpb, in isl_surf_get_image_range_B_tile()
2643 surf->row_pitch_B, in isl_surf_get_image_range_B_tile()
2655 assert(*end_tile_B <= surf->size_B); in isl_surf_get_image_range_B_tile()
2660 const struct isl_surf *surf, in isl_surf_get_image_surf() argument
2669 isl_surf_get_image_offset_B_tile_sa(surf, in isl_surf_get_image_surf()
2681 surf->usage & (~ISL_SURF_USAGE_CUBE_BIT); in isl_surf_get_image_surf()
2686 .format = surf->format, in isl_surf_get_image_surf()
2687 .width = isl_minify(surf->logical_level0_px.w, level), in isl_surf_get_image_surf()
2688 .height = isl_minify(surf->logical_level0_px.h, level), in isl_surf_get_image_surf()
2692 .samples = surf->samples, in isl_surf_get_image_surf()
2693 .row_pitch_B = surf->row_pitch_B, in isl_surf_get_image_surf()
2695 .tiling_flags = (1 << surf->tiling)); in isl_surf_get_image_surf()
2750 const struct isl_surf *surf) in isl_surf_get_depth_format() argument
2762 bool has_stencil = surf->usage & ISL_SURF_USAGE_STENCIL_BIT; in isl_surf_get_depth_format()
2764 assert(surf->usage & ISL_SURF_USAGE_DEPTH_BIT); in isl_surf_get_depth_format()
2769 switch (surf->format) { in isl_surf_get_depth_format()