Lines Matching refs:xfer
769 struct drm_virtgpu_3d_transfer_from_host xfer = { 0 }; in virgl_bo_invalidate() local
793 xfer.bo_handle = mapping->vma->handle; in virgl_bo_invalidate()
801 xfer.offset = in virgl_bo_invalidate()
816 xfer.level = bo->meta.strides[0]; in virgl_bo_invalidate()
830 xfer.box.x = xfer_params.xfer_boxes[i].x; in virgl_bo_invalidate()
831 xfer.box.y = xfer_params.xfer_boxes[i].y; in virgl_bo_invalidate()
832 xfer.box.w = xfer_params.xfer_boxes[i].width; in virgl_bo_invalidate()
833 xfer.box.h = xfer_params.xfer_boxes[i].height; in virgl_bo_invalidate()
834 xfer.box.d = 1; in virgl_bo_invalidate()
836 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_VIRTGPU_TRANSFER_FROM_HOST, &xfer); in virgl_bo_invalidate()
861 struct drm_virtgpu_3d_transfer_to_host xfer = { 0 }; in virgl_bo_flush() local
875 xfer.bo_handle = mapping->vma->handle; in virgl_bo_flush()
883 xfer.offset = in virgl_bo_flush()
893 xfer.level = bo->meta.strides[0]; in virgl_bo_flush()
906 xfer.box.x = xfer_params.xfer_boxes[i].x; in virgl_bo_flush()
907 xfer.box.y = xfer_params.xfer_boxes[i].y; in virgl_bo_flush()
908 xfer.box.w = xfer_params.xfer_boxes[i].width; in virgl_bo_flush()
909 xfer.box.h = xfer_params.xfer_boxes[i].height; in virgl_bo_flush()
910 xfer.box.d = 1; in virgl_bo_flush()
912 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_VIRTGPU_TRANSFER_TO_HOST, &xfer); in virgl_bo_flush()