Lines Matching refs:b_shift
9037 uint8x16_t b_shift; variable
9041 b_shift = vshrq_n_u8( b, c); // c zeros on the left in b due to logical shift
9042 return _mm_or_si128 (a_masked, b_shift); //combine (insert b into a)
9049 uint16x8_t b_shift; variable
9051 b_shift = vshrq_n_u16( b, c); // c zeros on the left in b due to logical shift
9054 return _mm_or_si128 (a_c, b_shift); //combine (insert b into a)
9061 uint32x4_t b_shift; variable
9063 b_shift = vshrq_n_u32( b, c); // c zeros on the left in b due to logical shift
9066 return _mm_or_si128 (a_c, b_shift); //combine (insert b into a)
9073 uint64x2_t b_shift; variable
9075 b_shift = _mm_srli_epi64(b, c); // c zeros on the left in b due to logical shift
9078 return _mm_or_si128 (a_c, b_shift); //combine (insert b into a)
9157 int8x16_t b_shift; variable
9160 b_shift = vshlq_n_s8( b, c);
9162 return _mm_or_si128 (b_shift, a_masked); //combine (insert b into a)
9169 int16x8_t b_shift; variable
9171 b_shift = vshlq_n_s16( b, c);
9174 return _mm_or_si128 (b_shift, a_c); //combine (insert b into a)
9182 int32x4_t b_shift; variable
9184 b_shift = vshlq_n_s32( b, c);
9187 return _mm_or_si128 (b_shift, a_c); //combine (insert b into a)
9195 int64x2_t b_shift; variable
9197 b_shift = vshlq_n_s64( b, c);
9200 return _mm_or_si128 (b_shift, a_c); //combine (insert b into a)