602 #define VREG        __m256i  macro
604 #define LOAD(x)     _mm256_load_si256((const VREG*)(x))
605 #define LOADU(x)    _mm256_loadu_si256((const VREG*)(x))
606 #define STORE(x,y)  _mm256_store_si256((VREG*)(x),(y))
607 #define STOREU(x,y) _mm256_storeu_si256((VREG*)(x),(y))
612 #define VREG        __m128i  macro
614 #define LOAD(x)     _mm_load_si128((const VREG*)(x))
615 #define LOADU(x)    _mm_loadu_si128((const VREG*)(x))
616 #define STORE(x,y)  _mm_store_si128((VREG*)(x),(y))
617 #define STOREU(x,y) _mm_storeu_si128((VREG*)(x),(y))
658     VREG d1c_0, d1n_0, s1n_0, s0c_0, s0n_0;  in opj_idwt53_v_cas0_mcols_SSE2_OR_AVX2()
659     VREG d1c_1, d1n_1, s1n_1, s0c_1, s0n_1;  in opj_idwt53_v_cas0_mcols_SSE2_OR_AVX2()
660     const VREG two = LOAD_CST(2);  in opj_idwt53_v_cas0_mcols_SSE2_OR_AVX2()
715         VREG tmp_len_minus_1;  in opj_idwt53_v_cas0_mcols_SSE2_OR_AVX2()
757     VREG s1_0, s2_0, dc_0, dn_0;  in opj_idwt53_v_cas1_mcols_SSE2_OR_AVX2()
758     VREG s1_1, s2_1, dc_1, dn_1;  in opj_idwt53_v_cas1_mcols_SSE2_OR_AVX2()
759     const VREG two = LOAD_CST(2);  in opj_idwt53_v_cas1_mcols_SSE2_OR_AVX2()
843 #undef VREG