Lines Matching refs:Dm
1204 IValueT Dm, bool UseQRegs, bool IsFloatTy) { in emitSIMDBase() argument
1210 (getYInRegYXXXX(Dm) << 5) | getXXXXInRegYXXXX(Dm); in emitSIMDBase()
1215 IValueT Dn, IValueT Dm, bool UseQRegs) { in emitSIMD() argument
1219 emitSIMDBase(Opcode | (ElmtSize << ElmtShift), Dd, Dn, Dm, UseQRegs, in emitSIMD()
1272 IValueT Dd, IValueT Dn, IValueT Dm) { in emitVFPddd() argument
1275 assert(Dm < RegARM32::getNumDRegs()); in emitVFPddd()
1282 (getYInRegYXXXX(Dm) << 5) | getXXXXInRegYXXXX(Dm); in emitVFPddd()
1291 IValueT Dm = encodeDRegister(OpDm, "Dm", InstName); in emitVFPddd() local
1292 emitVFPddd(Cond, Opcode, Dd, Dn, Dm); in emitVFPddd()
2348 const IValueT Dm = encodeDRegister(OpDm, "Dm", Vabsd); in vabsd() local
2351 emitVFPddd(Cond, VabsdOpcode, Dd, D0, Dm); in vabsd()
2364 const IValueT Dm = mapQRegToDReg(encodeQRegister(OpQm, "Qm", Vabsq)); in vabsq() local
2369 emitSIMDBase(VabsqOpcode, Dd, Dn, Dm, UseQRegs, isFloatingType(ElmtTy)); in vabsq()
2547 IValueT Dm = encodeDRegister(OpDm, "Dm", Vcmpd); in vcmpd() local
2550 emitVFPddd(Cond, VcmpdOpcode, Dd, Dn, Dm); in vcmpd()
2558 constexpr IValueT Dm = 0; in vcmpdz() local
2559 emitVFPddd(Cond, VcmpdzOpcode, Dd, Dn, Dm); in vcmpdz()
2582 IValueT Dm) { in emitVFPsd() argument
2584 assert(Dm < RegARM32::getNumDRegs()); in emitVFPsd()
2590 (getYInRegYXXXX(Dm) << 5) | getXXXXInRegYXXXX(Dm); in emitVFPsd()
2626 IValueT Dm = encodeDRegister(OpDm, "Dm", Vcvtsd); in vcvtsd() local
2629 emitVFPsd(Cond, VcvtsdOpcode, Sd, Dm); in vcvtsd()
2656 IValueT Dm = encodeDRegister(OpDm, "Dm", Vcvtid); in vcvtid() local
2659 emitVFPsd(Cond, VcvtidOpcode, Sd, Dm); in vcvtid()
2701 IValueT Dm = encodeDRegister(OpDm, "Dm", Vcvtud); in vcvtud() local
2703 emitVFPsd(Cond, VcvtudOpcode, Sd, Dm); in vcvtud()
2820 IValueT Dm = encodeDRegister(OpDm, "Dm", Veord); in veord() local
2826 (getYInRegYXXXX(Dm) << 5) | getXXXXInRegYXXXX(Dm); in veord()
3082 IValueT Dm = encodeSRegister(OpDm, "Dm", Vmovdd); in vmovdd() local
3085 emitVFPddd(Cond, VmovddOpcode, Dd, D0, Dm); in vmovdd()
3097 IValueT Dm = encodeDRegister(OpDm, "Dm", Vmovdrr); in vmovdrr() local
3108 (Rt << 12) | (getYInRegYXXXX(Dm) << 5) | in vmovdrr()
3109 getXXXXInRegYXXXX(Dm); in vmovdrr()
3151 IValueT Dm = encodeDRegister(OpDm, "Dm", Vmovrrd); in vmovrrd() local
3160 (Rt << 12) | (getYInRegYXXXX(Dm) << 5) | in vmovrrd()
3161 getXXXXInRegYXXXX(Dm); in vmovrrd()
3366 const IValueT Dm = mapQRegToDReg(Qm); in vmulh() local
3370 emitSIMDBase(VmullOpcode | (ElmtSize << ElmtShift), Dd, Dn, Dm, UseQRegs, in vmulh()
3406 const IValueT Dm = mapQRegToDReg(encodeQRegister(OpQm, "Qm", Vmull)); in vmlap() local
3410 emitSIMDBase(VmullOpcode | (ElmtSize << ElmtShift), Dd, Dn, Dm, UseQRegs, in vmlap()
3483 const IValueT Dm = mapQRegToDReg(encodeQRegister(OpQm, "Qm", Vzip)); in vzip() local
3493 emitSIMDBase(VmovOpcode, Dd + 1, Dm, Dm, UseQRegs, IsFloatTy); in vzip()
3558 const IValueT Dm = mapQRegToDReg(encodeQRegister(OpQm, "Qm", Vmov)); in vmovlq() local
3565 if (Dd != Dm) in vmovlq()
3566 emitSIMDBase(VmovOpcode, Dd, Dm, Dm, UseQRegs, IsFloat); in vmovlq()
3584 const IValueT Dm = mapQRegToDReg(encodeQRegister(OpQm, "Qm", Vmov)); in vmovhq() local
3593 if (Dd + 1 != Dm + 1) in vmovhq()
3594 emitSIMDBase(VmovOpcode, Dd + 1, Dm + 1, Dm + 1, UseQRegs, IsFloat); in vmovhq()
3610 const IValueT Dm = mapQRegToDReg(encodeQRegister(OpQm, "Qm", Vmov)); in vmovhlq() local
3617 if (Dd != Dm + 1) in vmovhlq()
3618 emitSIMDBase(VmovOpcode, Dd, Dm + 1, Dm + 1, UseQRegs, IsFloat); in vmovhlq()
3636 const IValueT Dm = mapQRegToDReg(encodeQRegister(OpQm, "Qm", Vmov)); in vmovlhq() local
3643 if (Dd + 1 != Dm) in vmovlhq()
3644 emitSIMDBase(VmovOpcode, Dd + 1, Dm, Dm, UseQRegs, IsFloat); in vmovlhq()
3922 const IValueT Dm = mapQRegToDReg(Qm); in vqmovn2() local
3935 emitSIMDBase(VqmovnOpcode, Dd + 0, 0, Dm, UseQRegs, IsFloatTy); in vqmovn2()
3938 emitSIMDBase(VqmovnOpcode, Dd + 0, 0, Dm, UseQRegs, IsFloatTy); in vqmovn2()
3943 emitSIMDBase(VqmovnOpcode, Dd, 0, Dm, UseQRegs, IsFloatTy); in vqmovn2()
4080 IValueT Dm = encodeDRegister(OpDm, "Dm", Vsqrtd); in vsqrtd() local
4083 emitVFPddd(Cond, VsqrtdOpcode, Dd, D0, Dm); in vsqrtd()