948                                IValueT Rt, const Operand *OpAddress,  in emitMemOp()  argument
951   switch (encodeAddress(OpAddress, Address, TInfo, Imm12Address)) {  in emitMemOp()
1005                                    IValueT Rt, const Operand *OpAddress,  in emitMemOpEnc3()  argument
1009   switch (encodeAddress(OpAddress, Address, TInfo, RotatedImm8Enc3Address)) {  in emitMemOpEnc3()
1549 void AssemblerARM32::ldr(const Operand *OpRt, const Operand *OpAddress,  in ldr()  argument
1583     emitMemOp(Cond, IsLoad, IsByte, Rt, OpAddress, TInfo, LdrName);  in ldr()
1596     emitMemOpEnc3(Cond, L | B7 | B5 | B4, Rt, OpAddress, TInfo, Ldrh);  in ldr()
1615     emitMemOp(Cond, IsLoad, IsByte, Rt, OpAddress, TInfo, LdrName);  in ldr()
1623                                  const Operand *OpAddress,  in emitMemExOp()  argument
1645   if (encodeAddress(OpAddress, AddressRn, TInfo, NoImmOffsetAddress) !=  in emitMemExOp()
1660 void AssemblerARM32::ldrex(const Operand *OpRt, const Operand *OpAddress,  in ldrex()  argument
1685   emitMemExOp(Cond, Ty, IsLoad, OpRt, Rm, OpAddress, TInfo, LdrexName);  in ldrex()
1894 void AssemblerARM32::str(const Operand *OpRt, const Operand *OpAddress,  in str()  argument
1920     emitMemOp(Cond, IsLoad, IsByte, Rt, OpAddress, TInfo, StrName);  in str()
1933     emitMemOpEnc3(Cond, B7 | B5 | B4, Rt, OpAddress, TInfo, Strh);  in str()
1948     emitMemOp(Cond, IsLoad, IsByte, Rt, OpAddress, TInfo, StrName);  in str()
1955                            const Operand *OpAddress, CondARM32::Cond Cond,  in strex()  argument
1985   emitMemExOp(Cond, Ty, !IsLoad, OpRd, Rt, OpAddress, TInfo, StrexName);  in strex()
2841 void AssemblerARM32::vldrd(const Operand *OpDd, const Operand *OpAddress,  in vldrd()  argument
2853       encodeAddress(OpAddress, Address, TInfo, RotatedImm8Div4Address);  in vldrd()
2863 void AssemblerARM32::vldrq(const Operand *OpQd, const Operand *OpAddress,  in vldrq()  argument
2878       encodeAddress(OpAddress, Address, TInfo, RotatedImm8Div4Address);  in vldrq()
2888 void AssemblerARM32::vldrs(const Operand *OpSd, const Operand *OpAddress,  in vldrs()  argument
2900       encodeAddress(OpAddress, Address, TInfo, RotatedImm8Div4Address);  in vldrs()
2976                             const Operand *OpAddress, const TargetInfo &TInfo) {  in vld1qr()  argument
2987   if (encodeAddress(OpAddress, Address, TInfo, NoImmOffsetAddress) !=  in vld1qr()
2998                           const Operand *OpAddress, const TargetInfo &TInfo) {  in vld1()  argument
3003     return vldrq(OpQd, OpAddress, Ice::CondARM32::AL, TInfo);  in vld1()
3017   if (encodeAddress(OpAddress, Address, TInfo, NoImmOffsetAddress) !=  in vld1()
3685 void AssemblerARM32::vstrd(const Operand *OpDd, const Operand *OpAddress,  in vstrd()  argument
3697       encodeAddress(OpAddress, Address, TInfo, RotatedImm8Div4Address);  in vstrd()
3707 void AssemblerARM32::vstrq(const Operand *OpQd, const Operand *OpAddress,  in vstrq()  argument
3722       encodeAddress(OpAddress, Address, TInfo, RotatedImm8Div4Address);  in vstrq()
3732 void AssemblerARM32::vstrs(const Operand *OpSd, const Operand *OpAddress,  in vstrs()  argument
3744       encodeAddress(OpAddress, Address, TInfo, RotatedImm8Div4Address);  in vstrs()
3754                             const Operand *OpAddress, const TargetInfo &TInfo) {  in vst1qr()  argument
3765   if (encodeAddress(OpAddress, Address, TInfo, NoImmOffsetAddress) !=  in vst1qr()
3776                           const Operand *OpAddress, const TargetInfo &TInfo) {  in vst1()  argument
3782     return vstrq(OpQd, OpAddress, Ice::CondARM32::AL, TInfo);  in vst1()
3796   if (encodeAddress(OpAddress, Address, TInfo, NoImmOffsetAddress) !=  in vst1()