Lines Matching refs:OpQd
1223 void AssemblerARM32::emitSIMDqqqBase(IValueT Opcode, const Operand *OpQd, in emitSIMDqqqBase() argument
1226 const IValueT Qd = encodeQRegister(OpQd, "Qd", OpcodeName); in emitSIMDqqqBase()
1235 const Operand *OpQd, const Operand *OpQn, in emitSIMDqqq() argument
1240 emitSIMDqqqBase(Opcode | (ElmtSize << ElmtShift), OpQd, OpQn, OpQm, in emitSIMDqqq()
1244 void AssemblerARM32::emitSIMDShiftqqc(IValueT Opcode, const Operand *OpQd, in emitSIMDShiftqqc() argument
1247 const IValueT Qd = encodeQRegister(OpQd, "Qd", OpcodeName); in emitSIMDShiftqqc()
1257 void AssemblerARM32::emitSIMDCvtqq(IValueT Opcode, const Operand *OpQd, in emitSIMDCvtqq() argument
1264 const IValueT Qd = encodeQRegister(OpQd, "Qd", OpcodeName); in emitSIMDCvtqq()
2354 void AssemblerARM32::vabsq(const Operand *OpQd, const Operand *OpQm) { in vabsq() argument
2360 const Type ElmtTy = typeElementType(OpQd->getType()); in vabsq()
2363 const IValueT Dd = mapQRegToDReg(encodeQRegister(OpQd, "Qd", Vabsq)); in vabsq()
2384 void AssemblerARM32::vaddqi(Type ElmtTy, const Operand *OpQd, in vaddqi() argument
2395 emitSIMDqqq(VaddqiOpcode, ElmtTy, OpQd, OpQm, OpQn, Vaddqi); in vaddqi()
2398 void AssemblerARM32::vaddqf(const Operand *OpQd, const Operand *OpQn, in vaddqf() argument
2404 assert(OpQd->getType() == IceType_v4f32 && "vaddqf expects type <4 x float>"); in vaddqf()
2408 emitSIMDqqqBase(VaddqfOpcode, OpQd, OpQn, OpQm, IsFloatTy, Vaddqf); in vaddqf()
2423 void AssemblerARM32::vandq(const Operand *OpQd, const Operand *OpQm, in vandq() argument
2432 emitSIMDqqq(VandqOpcode, ElmtTy, OpQd, OpQm, OpQn, Vandq); in vandq()
2435 void AssemblerARM32::vbslq(const Operand *OpQd, const Operand *OpQm, in vbslq() argument
2444 emitSIMDqqq(VbslqOpcode, ElmtTy, OpQd, OpQm, OpQn, Vbslq); in vbslq()
2447 void AssemblerARM32::vceqqi(const Type ElmtTy, const Operand *OpQd, in vceqqi() argument
2456 emitSIMDqqq(VceqOpcode, ElmtTy, OpQd, OpQm, OpQn, Vceq); in vceqqi()
2459 void AssemblerARM32::vceqqs(const Operand *OpQd, const Operand *OpQm, in vceqqs() argument
2468 emitSIMDqqq(VceqOpcode, ElmtTy, OpQd, OpQm, OpQn, Vceq); in vceqqs()
2471 void AssemblerARM32::vcgeqi(const Type ElmtTy, const Operand *OpQd, in vcgeqi() argument
2480 emitSIMDqqq(VcgeOpcode, ElmtTy, OpQd, OpQm, OpQn, Vcge); in vcgeqi()
2483 void AssemblerARM32::vcugeqi(const Type ElmtTy, const Operand *OpQd, in vcugeqi() argument
2492 emitSIMDqqq(VcgeOpcode, ElmtTy, OpQd, OpQm, OpQn, Vcge); in vcugeqi()
2495 void AssemblerARM32::vcgeqs(const Operand *OpQd, const Operand *OpQm, in vcgeqs() argument
2504 emitSIMDqqq(VcgeOpcode, ElmtTy, OpQd, OpQm, OpQn, Vcge); in vcgeqs()
2507 void AssemblerARM32::vcgtqi(const Type ElmtTy, const Operand *OpQd, in vcgtqi() argument
2516 emitSIMDqqq(VcgeOpcode, ElmtTy, OpQd, OpQm, OpQn, Vcge); in vcgtqi()
2519 void AssemblerARM32::vcugtqi(const Type ElmtTy, const Operand *OpQd, in vcugtqi() argument
2528 emitSIMDqqq(VcgeOpcode, ElmtTy, OpQd, OpQm, OpQn, Vcge); in vcugtqi()
2531 void AssemblerARM32::vcgtqs(const Operand *OpQd, const Operand *OpQm, in vcgtqs() argument
2540 emitSIMDqqq(VcgeOpcode, ElmtTy, OpQd, OpQm, OpQn, Vcge); in vcgtqs()
2721 void AssemblerARM32::vcvtqsi(const Operand *OpQd, const Operand *OpQm) { in vcvtqsi() argument
2729 emitSIMDCvtqq(VcvtqsiOpcode, OpQd, OpQm, Vcvtqsi); in vcvtqsi()
2732 void AssemblerARM32::vcvtqsu(const Operand *OpQd, const Operand *OpQm) { in vcvtqsu() argument
2740 emitSIMDCvtqq(VcvtqsuOpcode, OpQd, OpQm, Vcvtqsu); in vcvtqsu()
2743 void AssemblerARM32::vcvtqis(const Operand *OpQd, const Operand *OpQm) { in vcvtqis() argument
2751 emitSIMDCvtqq(VcvtqisOpcode, OpQd, OpQm, Vcvtqis); in vcvtqis()
2754 void AssemblerARM32::vcvtqus(const Operand *OpQd, const Operand *OpQm) { in vcvtqus() argument
2762 emitSIMDCvtqq(VcvtqusOpcode, OpQd, OpQm, Vcvtqus); in vcvtqus()
2830 void AssemblerARM32::veorq(const Operand *OpQd, const Operand *OpQn, in veorq() argument
2838 emitSIMDqqq(VeorqOpcode, IceType_i8, OpQd, OpQn, OpQm, Veorq); in veorq()
2863 void AssemblerARM32::vldrq(const Operand *OpQd, const Operand *OpAddress, in vldrq() argument
2874 IValueT Dd = mapQRegToDReg(encodeQRegister(OpQd, "Qd", Vldrd)); in vldrq()
2975 void AssemblerARM32::vld1qr(size_t ElmtSize, const Operand *OpQd, in vld1qr() argument
2984 const IValueT Qd = encodeQRegister(OpQd, "Qd", Vld1qr); in vld1qr()
2997 void AssemblerARM32::vld1(size_t ElmtSize, const Operand *OpQd, in vld1() argument
3003 return vldrq(OpQd, OpAddress, Ice::CondARM32::AL, TInfo); in vld1()
3014 const IValueT Qd = encodeQRegister(OpQd, "Qd", Vld1qr); in vld1()
3027 bool AssemblerARM32::vmovqc(const Operand *OpQd, const ConstantInteger32 *Imm) { in vmovqc() argument
3033 const IValueT Dd = mapQRegToDReg(encodeQRegister(OpQd, "Qd", Vmovc)); in vmovqc()
3035 const Type VecTy = OpQd->getType(); in vmovqc()
3122 void AssemblerARM32::vmovqis(const Operand *OpQd, uint32_t Index, in vmovqis() argument
3126 IValueT Sd = mapQRegToSReg(encodeQRegister(OpQd, "Qd", Vmovqis)) + Index; in vmovqis()
3323 void AssemblerARM32::vmulqi(Type ElmtTy, const Operand *OpQd, in vmulqi() argument
3335 emitSIMDqqq(VmulqiOpcode, ElmtTy, OpQd, OpQn, OpQm, Vmulqi); in vmulqi()
3338 void AssemblerARM32::vmulh(Type ElmtTy, const Operand *OpQd, in vmulh() argument
3360 const IValueT Qd = encodeQRegister(OpQd, "Qd", Vmull); in vmulh()
3382 void AssemblerARM32::vmlap(Type ElmtTy, const Operand *OpQd, in vmlap() argument
3404 const IValueT Dd = mapQRegToDReg(encodeQRegister(OpQd, "Qd", Vmull)); in vmlap()
3424 void AssemblerARM32::vdup(Type ElmtTy, const Operand *OpQd, const Operand *OpQn, in vdup() argument
3435 const IValueT Dd = mapQRegToDReg(encodeQRegister(OpQd, "Qd", Vdup)); in vdup()
3468 void AssemblerARM32::vzip(Type ElmtTy, const Operand *OpQd, const Operand *OpQn, in vzip() argument
3481 const IValueT Dd = mapQRegToDReg(encodeQRegister(OpQd, "Qd", Vzip)); in vzip()
3515 void AssemblerARM32::vmulqf(const Operand *OpQd, const Operand *OpQn, in vmulqf() argument
3521 assert(OpQd->getType() == IceType_v4f32 && "vmulqf expects type <4 x float>"); in vmulqf()
3525 emitSIMDqqqBase(VmulqfOpcode, OpQd, OpQn, OpQm, IsFloatTy, Vmulqf); in vmulqf()
3528 void AssemblerARM32::vmvnq(const Operand *OpQd, const Operand *OpQm) { in vmvnq() argument
3536 const IValueT Qd = encodeQRegister(OpQd, "Qd", Vmvn); in vmvnq()
3545 void AssemblerARM32::vmovlq(const Operand *OpQd, const Operand *OpQn, in vmovlq() argument
3556 const IValueT Dd = mapQRegToDReg(encodeQRegister(OpQd, "Qd", Vmov)); in vmovlq()
3571 void AssemblerARM32::vmovhq(const Operand *OpQd, const Operand *OpQn, in vmovhq() argument
3582 const IValueT Dd = mapQRegToDReg(encodeQRegister(OpQd, "Qd", Vmov)); in vmovhq()
3597 void AssemblerARM32::vmovhlq(const Operand *OpQd, const Operand *OpQn, in vmovhlq() argument
3608 const IValueT Dd = mapQRegToDReg(encodeQRegister(OpQd, "Qd", Vmov)); in vmovhlq()
3623 void AssemblerARM32::vmovlhq(const Operand *OpQd, const Operand *OpQn, in vmovlhq() argument
3634 const IValueT Dd = mapQRegToDReg(encodeQRegister(OpQd, "Qd", Vmov)); in vmovlhq()
3649 void AssemblerARM32::vnegqs(Type ElmtTy, const Operand *OpQd, in vnegqs() argument
3661 const IValueT Qd = encodeQRegister(OpQd, "Qd", Vneg); in vnegqs()
3673 void AssemblerARM32::vorrq(const Operand *OpQd, const Operand *OpQm, in vorrq() argument
3682 emitSIMDqqq(VorrqOpcode, ElmtTy, OpQd, OpQm, OpQn, Vorrq); in vorrq()
3707 void AssemblerARM32::vstrq(const Operand *OpQd, const Operand *OpAddress, in vstrq() argument
3718 IValueT Dd = mapQRegToDReg(encodeQRegister(OpQd, "Dd", Vstrd)); in vstrq()
3753 void AssemblerARM32::vst1qr(size_t ElmtSize, const Operand *OpQd, in vst1qr() argument
3762 const IValueT Qd = encodeQRegister(OpQd, "Qd", Vst1qr); in vst1qr()
3775 void AssemblerARM32::vst1(size_t ElmtSize, const Operand *OpQd, in vst1() argument
3782 return vstrq(OpQd, OpAddress, Ice::CondARM32::AL, TInfo); in vst1()
3793 const IValueT Qd = encodeQRegister(OpQd, "Qd", Vst1qr); in vst1()
3830 void AssemblerARM32::vqaddqi(Type ElmtTy, const Operand *OpQd, in vqaddqi() argument
3841 emitSIMDqqq(VqaddqiOpcode, ElmtTy, OpQd, OpQm, OpQn, Vqaddqi); in vqaddqi()
3844 void AssemblerARM32::vqaddqu(Type ElmtTy, const Operand *OpQd, in vqaddqu() argument
3855 emitSIMDqqq(VqaddquOpcode, ElmtTy, OpQd, OpQm, OpQn, Vqaddqu); in vqaddqu()
3858 void AssemblerARM32::vqsubqi(Type ElmtTy, const Operand *OpQd, in vqsubqi() argument
3869 emitSIMDqqq(VqsubqiOpcode, ElmtTy, OpQd, OpQm, OpQn, Vqsubqi); in vqsubqi()
3872 void AssemblerARM32::vqsubqu(Type ElmtTy, const Operand *OpQd, in vqsubqu() argument
3883 emitSIMDqqq(VqsubquOpcode, ElmtTy, OpQd, OpQm, OpQn, Vqsubqu); in vqsubqu()
3886 void AssemblerARM32::vsubqi(Type ElmtTy, const Operand *OpQd, in vsubqi() argument
3897 emitSIMDqqq(VsubqiOpcode, ElmtTy, OpQd, OpQm, OpQn, Vsubqi); in vsubqi()
3900 void AssemblerARM32::vqmovn2(Type DestElmtTy, const Operand *OpQd, in vqmovn2() argument
3918 const IValueT Qd = encodeQRegister(OpQd, "Qd", Vqmovn); in vqmovn2()
3953 void AssemblerARM32::vsubqf(const Operand *OpQd, const Operand *OpQn, in vsubqf() argument
3959 assert(OpQd->getType() == IceType_v4f32 && "vsubqf expects type <4 x float>"); in vsubqf()
3962 emitSIMDqqq(VsubqfOpcode, IceType_f32, OpQd, OpQn, OpQm, Vsubqf); in vsubqf()
4011 void AssemblerARM32::vshlqi(Type ElmtTy, const Operand *OpQd, in vshlqi() argument
4022 emitSIMDqqq(VshlOpcode, ElmtTy, OpQd, OpQn, OpQm, Vshl); in vshlqi()
4025 void AssemblerARM32::vshlqc(Type ElmtTy, const Operand *OpQd, in vshlqc() argument
4037 emitSIMDShiftqqc(VshlOpcode, OpQd, OpQm, in vshlqc()
4041 void AssemblerARM32::vshrqc(Type ElmtTy, const Operand *OpQd, in vshrqc() argument
4054 emitSIMDShiftqqc(VshrOpcode, OpQd, OpQm, in vshrqc()
4058 void AssemblerARM32::vshlqu(Type ElmtTy, const Operand *OpQd, in vshlqu() argument
4069 emitSIMDqqq(VshlOpcode, ElmtTy, OpQd, OpQn, OpQm, Vshl); in vshlqu()