Lines Matching refs:OpQn
1077 const Operand *OpQn, uint32_t Index, in emitInsertExtractInt() argument
1081 IValueT Dn = mapQRegToDReg(encodeQRegister(OpQn, "Qn", InstName)); in emitInsertExtractInt()
1224 const Operand *OpQn, const Operand *OpQm, in emitSIMDqqqBase() argument
1227 const IValueT Qn = encodeQRegister(OpQn, "Qn", OpcodeName); in emitSIMDqqqBase()
1235 const Operand *OpQd, const Operand *OpQn, in emitSIMDqqq() argument
1240 emitSIMDqqqBase(Opcode | (ElmtSize << ElmtShift), OpQd, OpQn, OpQm, in emitSIMDqqq()
2385 const Operand *OpQm, const Operand *OpQn) { in vaddqi() argument
2395 emitSIMDqqq(VaddqiOpcode, ElmtTy, OpQd, OpQm, OpQn, Vaddqi); in vaddqi()
2398 void AssemblerARM32::vaddqf(const Operand *OpQd, const Operand *OpQn, in vaddqf() argument
2408 emitSIMDqqqBase(VaddqfOpcode, OpQd, OpQn, OpQm, IsFloatTy, Vaddqf); in vaddqf()
2424 const Operand *OpQn) { in vandq() argument
2432 emitSIMDqqq(VandqOpcode, ElmtTy, OpQd, OpQm, OpQn, Vandq); in vandq()
2436 const Operand *OpQn) { in vbslq() argument
2444 emitSIMDqqq(VbslqOpcode, ElmtTy, OpQd, OpQm, OpQn, Vbslq); in vbslq()
2448 const Operand *OpQm, const Operand *OpQn) { in vceqqi() argument
2456 emitSIMDqqq(VceqOpcode, ElmtTy, OpQd, OpQm, OpQn, Vceq); in vceqqi()
2460 const Operand *OpQn) { in vceqqs() argument
2468 emitSIMDqqq(VceqOpcode, ElmtTy, OpQd, OpQm, OpQn, Vceq); in vceqqs()
2472 const Operand *OpQm, const Operand *OpQn) { in vcgeqi() argument
2480 emitSIMDqqq(VcgeOpcode, ElmtTy, OpQd, OpQm, OpQn, Vcge); in vcgeqi()
2484 const Operand *OpQm, const Operand *OpQn) { in vcugeqi() argument
2492 emitSIMDqqq(VcgeOpcode, ElmtTy, OpQd, OpQm, OpQn, Vcge); in vcugeqi()
2496 const Operand *OpQn) { in vcgeqs() argument
2504 emitSIMDqqq(VcgeOpcode, ElmtTy, OpQd, OpQm, OpQn, Vcge); in vcgeqs()
2508 const Operand *OpQm, const Operand *OpQn) { in vcgtqi() argument
2516 emitSIMDqqq(VcgeOpcode, ElmtTy, OpQd, OpQm, OpQn, Vcge); in vcgtqi()
2520 const Operand *OpQm, const Operand *OpQn) { in vcugtqi() argument
2528 emitSIMDqqq(VcgeOpcode, ElmtTy, OpQd, OpQm, OpQn, Vcge); in vcugtqi()
2532 const Operand *OpQn) { in vcgtqs() argument
2540 emitSIMDqqq(VcgeOpcode, ElmtTy, OpQd, OpQm, OpQn, Vcge); in vcgtqs()
2830 void AssemblerARM32::veorq(const Operand *OpQd, const Operand *OpQn, in veorq() argument
2838 emitSIMDqqq(VeorqOpcode, IceType_i8, OpQd, OpQn, OpQm, Veorq); in veorq()
3113 void AssemblerARM32::vmovqir(const Operand *OpQn, uint32_t Index, in vmovqir() argument
3119 emitInsertExtractInt(Cond, OpQn, Index, OpRt, !IsExtract, Vmovdr); in vmovqir()
3131 void AssemblerARM32::vmovrqi(const Operand *OpRt, const Operand *OpQn, in vmovrqi() argument
3137 emitInsertExtractInt(Cond, OpQn, Index, OpRt, IsExtract, Vmovrd); in vmovrqi()
3324 const Operand *OpQn, const Operand *OpQm) { in vmulqi() argument
3335 emitSIMDqqq(VmulqiOpcode, ElmtTy, OpQd, OpQn, OpQm, Vmulqi); in vmulqi()
3339 const Operand *OpQn, const Operand *OpQm, in vmulh() argument
3361 const IValueT Qn = encodeQRegister(OpQn, "Qn", Vmull); in vmulh()
3383 const Operand *OpQn, const Operand *OpQm) { in vmlap() argument
3405 const IValueT Dn = mapQRegToDReg(encodeQRegister(OpQn, "Qn", Vmull)); in vmlap()
3424 void AssemblerARM32::vdup(Type ElmtTy, const Operand *OpQd, const Operand *OpQn, in vdup() argument
3436 const IValueT Dn = mapQRegToDReg(encodeQRegister(OpQn, "Qn", Vdup)); in vdup()
3468 void AssemblerARM32::vzip(Type ElmtTy, const Operand *OpQd, const Operand *OpQn, in vzip() argument
3482 const IValueT Dn = mapQRegToDReg(encodeQRegister(OpQn, "Qn", Vzip)); in vzip()
3515 void AssemblerARM32::vmulqf(const Operand *OpQd, const Operand *OpQn, in vmulqf() argument
3525 emitSIMDqqqBase(VmulqfOpcode, OpQd, OpQn, OpQm, IsFloatTy, Vmulqf); in vmulqf()
3545 void AssemblerARM32::vmovlq(const Operand *OpQd, const Operand *OpQn, in vmovlq() argument
3557 const IValueT Dn = mapQRegToDReg(encodeQRegister(OpQn, "Qn", Vmov)); in vmovlq()
3571 void AssemblerARM32::vmovhq(const Operand *OpQd, const Operand *OpQn, in vmovhq() argument
3583 const IValueT Dn = mapQRegToDReg(encodeQRegister(OpQn, "Qn", Vmov)); in vmovhq()
3597 void AssemblerARM32::vmovhlq(const Operand *OpQd, const Operand *OpQn, in vmovhlq() argument
3609 const IValueT Dn = mapQRegToDReg(encodeQRegister(OpQn, "Qn", Vmov)); in vmovhlq()
3623 void AssemblerARM32::vmovlhq(const Operand *OpQd, const Operand *OpQn, in vmovlhq() argument
3635 const IValueT Dn = mapQRegToDReg(encodeQRegister(OpQn, "Qn", Vmov)); in vmovlhq()
3674 const Operand *OpQn) { in vorrq() argument
3682 emitSIMDqqq(VorrqOpcode, ElmtTy, OpQd, OpQm, OpQn, Vorrq); in vorrq()
3831 const Operand *OpQm, const Operand *OpQn) { in vqaddqi() argument
3841 emitSIMDqqq(VqaddqiOpcode, ElmtTy, OpQd, OpQm, OpQn, Vqaddqi); in vqaddqi()
3845 const Operand *OpQm, const Operand *OpQn) { in vqaddqu() argument
3855 emitSIMDqqq(VqaddquOpcode, ElmtTy, OpQd, OpQm, OpQn, Vqaddqu); in vqaddqu()
3859 const Operand *OpQm, const Operand *OpQn) { in vqsubqi() argument
3869 emitSIMDqqq(VqsubqiOpcode, ElmtTy, OpQd, OpQm, OpQn, Vqsubqi); in vqsubqi()
3873 const Operand *OpQm, const Operand *OpQn) { in vqsubqu() argument
3883 emitSIMDqqq(VqsubquOpcode, ElmtTy, OpQd, OpQm, OpQn, Vqsubqu); in vqsubqu()
3887 const Operand *OpQm, const Operand *OpQn) { in vsubqi() argument
3897 emitSIMDqqq(VsubqiOpcode, ElmtTy, OpQd, OpQm, OpQn, Vsubqi); in vsubqi()
3901 const Operand *OpQm, const Operand *OpQn, in vqmovn2() argument
3920 const IValueT Qn = encodeQRegister(OpQn, "Qn", Vqmovn); in vqmovn2()
3953 void AssemblerARM32::vsubqf(const Operand *OpQd, const Operand *OpQn, in vsubqf() argument
3962 emitSIMDqqq(VsubqfOpcode, IceType_f32, OpQd, OpQn, OpQm, Vsubqf); in vsubqf()
4012 const Operand *OpQm, const Operand *OpQn) { in vshlqi() argument
4022 emitSIMDqqq(VshlOpcode, ElmtTy, OpQd, OpQn, OpQm, Vshl); in vshlqi()
4059 const Operand *OpQm, const Operand *OpQn) { in vshlqu() argument
4069 emitSIMDqqq(VshlOpcode, ElmtTy, OpQd, OpQn, OpQm, Vshl); in vshlqu()