1203 void AssemblerARM32::emitSIMDBase(IValueT Opcode, IValueT Dd, IValueT Dn,  in emitSIMDBase()  function in Ice::ARM32::AssemblerARM32
1219   emitSIMDBase(Opcode | (ElmtSize << ElmtShift), Dd, Dn, Dm, UseQRegs,  in emitSIMD()
1230   emitSIMDBase(Opcode, mapQRegToDReg(Qd), mapQRegToDReg(Qn), mapQRegToDReg(Qm),  in emitSIMDqqqBase()
1253   emitSIMDBase(Opcode | (Imm6 << ElmtShift), mapQRegToDReg(Qd),  in emitSIMDShiftqqc()
1267   emitSIMDBase(SIMDOpcode, mapQRegToDReg(Qd), mapQRegToDReg(Qn),  in emitSIMDCvtqq()
2369   emitSIMDBase(VabsqOpcode, Dd, Dn, Dm, UseQRegs, isFloatingType(ElmtTy));  in vabsq()
3370   emitSIMDBase(VmullOpcode | (ElmtSize << ElmtShift), Dd, Dn, Dm, UseQRegs,  in vmulh()
3378   emitSIMDBase(VshrnOpcode | (Imm6 << ImmShift), Dd, 0, Dd, UseQRegs,  in vmulh()
3410   emitSIMDBase(VmullOpcode | (ElmtSize << ElmtShift), Dd, Dn, Dm, UseQRegs,  in vmlap()
3421   emitSIMDBase(VpaddOpcode, Dd, Dd, Dd + 1, UseQRegs, IsFloatTy);  in vmlap()
3465   emitSIMDBase(VdupOpcode, Dd, Imm4, Dn + (Lower ? 0 : 1), UseQRegs, IsFloatTy);  in vdup()
3493   emitSIMDBase(VmovOpcode, Dd + 1, Dm, Dm, UseQRegs, IsFloatTy);  in vzip()
3497     emitSIMDBase(VmovOpcode, Dd, Dn, Dn, UseQRegs, IsFloatTy);  in vzip()
3506     emitSIMDBase(VzipOpcode | (ElmtSize << ElmtShift), Dd, 0, Dd + 1, UseQRegs,  in vzip()
3510     emitSIMDBase(VtrnOpcode | (ElmtSize << ElmtShift), Dd, 0, Dd + 1, UseQRegs,  in vzip()
3541   emitSIMDBase(VmvnOpcode, mapQRegToDReg(Qd), mapQRegToDReg(Qn),  in vmvnq()
3566     emitSIMDBase(VmovOpcode, Dd, Dm, Dm, UseQRegs, IsFloat);  in vmovlq()
3568     emitSIMDBase(VmovOpcode, Dd + 1, Dn + 1, Dn + 1, UseQRegs, IsFloat);  in vmovlq()
3592     emitSIMDBase(VmovOpcode, Dd, Dn, Dn, UseQRegs, IsFloat);  in vmovhq()
3594     emitSIMDBase(VmovOpcode, Dd + 1, Dm + 1, Dm + 1, UseQRegs, IsFloat);  in vmovhq()
3618     emitSIMDBase(VmovOpcode, Dd, Dm + 1, Dm + 1, UseQRegs, IsFloat);  in vmovhlq()
3620     emitSIMDBase(VmovOpcode, Dd + 1, Dn + 1, Dn + 1, UseQRegs, IsFloat);  in vmovhlq()
3644     emitSIMDBase(VmovOpcode, Dd + 1, Dm, Dm, UseQRegs, IsFloat);  in vmovlhq()
3646     emitSIMDBase(VmovOpcode, Dd, Dn, Dn, UseQRegs, IsFloat);  in vmovlhq()
3668   emitSIMDBase(VnegOpcode | (ElmtSize << ElmtShift), mapQRegToDReg(Qd),  in vnegqs()
3933     emitSIMDBase(VqmovnOpcode, Dd + 1, 0, Dn, UseQRegs, IsFloatTy);  in vqmovn2()
3935     emitSIMDBase(VqmovnOpcode, Dd + 0, 0, Dm, UseQRegs, IsFloatTy);  in vqmovn2()
3938     emitSIMDBase(VqmovnOpcode, Dd + 0, 0, Dm, UseQRegs, IsFloatTy);  in vqmovn2()
3940     emitSIMDBase(VqmovnOpcode, Dd + 1, 0, Dn, UseQRegs, IsFloatTy);  in vqmovn2()
3943     emitSIMDBase(VqmovnOpcode, Dd, 0, Dm, UseQRegs, IsFloatTy);  in vqmovn2()
3949     emitSIMDBase(VmovOpcode, Dd + 1, Dd, Dd, UseQRegs, IsFloatTy);  in vqmovn2()