Lines Matching refs:IValueT
121 constexpr SizeT InstSize = sizeof(IValueT); in alignFunction()
211 void dmb(IValueT Option); // Option is a 4-bit value.
265 void popList(const IValueT Registers, CondARM32::Cond Cond);
270 void pushList(const IValueT Registers, CondARM32::Cond Cond);
550 void vdup(Type ElmtTy, const Operand *OpQd, const Operand *OpQn, IValueT Idx);
710 static IValueT encodeElmtType(Type ElmtTy);
712 void emitInst(IValueT Value) { in emitInst()
714 Buffer.emit<IValueT>(Value); in emitInst()
723 void emitType01(CondARM32::Cond Cond, IValueT InstType, IValueT Opcode,
724 bool SetFlags, IValueT Rn, IValueT Rd, IValueT imm12,
729 void emitType01(CondARM32::Cond Cond, IValueT Opcode, const Operand *OpRd,
735 void emitType01(CondARM32::Cond Cond, IValueT Opcode, IValueT OpRd,
736 IValueT OpRn, const Operand *OpSrc1, bool SetFlags,
745 void emitMemOp(CondARM32::Cond Cond, IValueT InstType, bool IsLoad,
746 bool IsByte, IValueT Rt, IValueT Address);
750 void emitRdRm(CondARM32::Cond Cond, IValueT Opcode, const Operand *OpRd,
754 void emitMemOp(CondARM32::Cond Cond, bool IsLoad, bool IsByte, IValueT Rt,
759 void emitMemOpEnc3(CondARM32::Cond Cond, IValueT Opcode, IValueT Rt,
766 IValueT Rt, const Operand *OpAddress,
773 bool IsLoad, IValueT BaseReg, IValueT Registers);
777 void emitVStackOp(CondARM32::Cond Cond, IValueT Opcode,
782 void emitVFPsd(CondARM32::Cond Cond, IValueT Opcode, IValueT Sd, IValueT Dm);
786 void emitVFPds(CondARM32::Cond Cond, IValueT Opcode, IValueT Dd, IValueT Sm);
791 void emitVMem1Op(IValueT Opcode, IValueT Dd, IValueT Rn, IValueT Rm,
792 DRegListSize NumDRegs, size_t ElmtSize, IValueT Align,
797 void emitVMem1Op(IValueT Opcode, IValueT Dd, IValueT Rn, IValueT Rm,
798 size_t ElmtSize, IValueT Align, const char *InstName);
802 void emitDivOp(CondARM32::Cond Cond, IValueT Opcode, IValueT Rd, IValueT Rn,
803 IValueT Rm);
814 void emitMoveSS(CondARM32::Cond Cond, IValueT Sd, IValueT Sm);
818 void emitMulOp(CondARM32::Cond Cond, IValueT Opcode, IValueT Rd, IValueT Rn,
819 IValueT Rm, IValueT Rs, bool SetFlags);
832 void emitSignExtend(CondARM32::Cond, IValueT Opcode, const Operand *OpRd,
838 void emitSIMDBase(IValueT Opcode, IValueT Dd, IValueT Dn, IValueT Dm,
843 void emitSIMD(IValueT Opcode, Type ElmtTy, IValueT Dd, IValueT Dn, IValueT Dm,
850 void emitSIMDqqqBase(IValueT Opcode, const Operand *OpQd, const Operand *OpQn,
856 void emitSIMDqqq(IValueT Opcode, Type ElmtTy, const Operand *OpQd,
863 void emitSIMDShiftqqc(IValueT Opcode, const Operand *OpQd,
864 const Operand *OpQm, const IValueT Imm6,
871 void emitSIMDCvtqq(IValueT Opcode, const Operand *OpQd, const Operand *OpQm,
877 void emitCompareOp(CondARM32::Cond Cond, IValueT Opcode, const Operand *OpRn,
883 static IOffsetT decodeBranchOffset(IValueT Inst);
892 void emitVFPddd(CondARM32::Cond Cond, IValueT Opcode, const Operand *OpDd,
896 void emitVFPddd(CondARM32::Cond Cond, IValueT Opcode, IValueT Dd, IValueT Dn,
897 IValueT Dm);
900 void emitVFPsss(CondARM32::Cond Cond, IValueT Opcode, IValueT Sd, IValueT Sn,
901 IValueT Sm);
903 void emitVFPsss(CondARM32::Cond Cond, IValueT Opcode, const Operand *OpSd,