Lines Matching refs:Src1R
2320 Variable *Src1R = legalizeToReg(Src1); in lowerIDivRem() local
2322 Variable *T1R = Src1R; in lowerIDivRem()
2327 (this->*ExtFunc)(T1R, Src1R, CondARM32::AL); in lowerIDivRem()
3162 Variable *Src1R = legalizeToReg(Src1Producer->getSrc(0)); in lowerArithmetic() local
3164 _vmla(Src0R, Src1R, Src2R); in lowerArithmetic()
3169 Variable *Src1R = legalizeToReg(Src1); in lowerArithmetic() local
3170 _vadd(T, Src0R, Src1R); in lowerArithmetic()
3177 Variable *Src1R = legalizeToReg(Src1Producer->getSrc(0)); in lowerArithmetic() local
3179 _vmls(Src0R, Src1R, Src2R); in lowerArithmetic()
3183 Variable *Src1R = legalizeToReg(Src1); in lowerArithmetic() local
3184 _vsub(T, Src0R, Src1R); in lowerArithmetic()
3190 Variable *Src1R = legalizeToReg(Src1); in lowerArithmetic() local
3191 _vmul(T, Src0R, Src1R); in lowerArithmetic()
3197 Variable *Src1R = legalizeToReg(Src1); in lowerArithmetic() local
3198 _vdiv(T, Src0R, Src1R); in lowerArithmetic()
3214 Variable *Src1R = legalizeToReg(Src1Producer->getSrc(0)); in lowerArithmetic() local
3216 _mla(T, Src1R, Src2R, Src0R); in lowerArithmetic()
3238 Variable *Src1R = legalizeToReg(Src1); in lowerArithmetic() local
3239 _vadd(T, Src0R, Src1R); in lowerArithmetic()
3261 Variable *Src1R = legalizeToReg(Src1); in lowerArithmetic() local
3262 _vand(T, Src0R, Src1R); in lowerArithmetic()
3274 Variable *Src1R = legalizeToReg(Src1); in lowerArithmetic() local
3275 _vorr(T, Src0R, Src1R); in lowerArithmetic()
3287 Variable *Src1R = legalizeToReg(Src1); in lowerArithmetic() local
3288 _veor(T, Src0R, Src1R); in lowerArithmetic()
3300 Variable *Src1R = legalizeToReg(Src1Producer->getSrc(0)); in lowerArithmetic() local
3302 _mls(T, Src1R, Src2R, Src0R); in lowerArithmetic()
3329 Variable *Src1R = Srcs.unswappedSrc1R(this); in lowerArithmetic() local
3331 _vsub(T, Src0R, Src1R); in lowerArithmetic()
3333 _sub(T, Src0R, Src1R); in lowerArithmetic()
3419 Variable *Src1R = Srcs.unswappedSrc1R(this); in lowerArithmetic() local
3421 _vmul(T, Src0R, Src1R); in lowerArithmetic()
3423 _mul(T, Src0R, Src1R); in lowerArithmetic()
3434 Operand *Src1R = Srcs.unswappedSrc1RShAmtImm(this); in lowerArithmetic() local
3435 _lsl(T, Src0R, Src1R); in lowerArithmetic()
3442 auto *Src1R = Srcs.unswappedSrc1R(this); in lowerArithmetic() local
3443 _vshl(T, Src0R, Src1R)->setSignType(InstARM32::FS_Unsigned); in lowerArithmetic()
3458 Operand *Src1R = Srcs.unswappedSrc1RShAmtImm(this); in lowerArithmetic() local
3459 _lsr(T, Src0R, Src1R); in lowerArithmetic()
3466 auto *Src1R = Srcs.unswappedSrc1R(this); in lowerArithmetic() local
3467 auto *Src1RNeg = makeReg(Src1R->getType()); in lowerArithmetic()
3468 _vneg(Src1RNeg, Src1R); in lowerArithmetic()
3491 auto *Src1R = Srcs.unswappedSrc1R(this); in lowerArithmetic() local
3492 auto *Src1RNeg = makeReg(Src1R->getType()); in lowerArithmetic()
3493 _vneg(Src1RNeg, Src1R); in lowerArithmetic()
4614 Variable *Src1R = legalizeToReg(Src1); in lowerInt8AndInt16IcmpCond() local
4615 auto *Src1F = OperandARM32FlexReg::create(Func, IceType_i32, Src1R, in lowerInt8AndInt16IcmpCond()
6002 Variable *Src1R = legalizeToReg(Src1); in lowerShuffleVector() local
6003 _vzip(T, Src0R, Src1R); in lowerShuffleVector()
6031 Variable *Src1R = legalizeToReg(Src1); in lowerShuffleVector() local
6032 _vzip(T, Src0R, Src1R); in lowerShuffleVector()
6053 Variable *Src1R = legalizeToReg(Src1); in lowerShuffleVector() local
6054 _vzip(T, Src0R, Src1R); in lowerShuffleVector()
6061 Variable *Src1R = legalizeToReg(Src1); in lowerShuffleVector() local
6062 _vmovlh(T, Src0R, Src1R); in lowerShuffleVector()
6076 Variable *Src1R = legalizeToReg(Src1); in lowerShuffleVector() local
6077 _vmovhl(T, Src1R, Src0R); in lowerShuffleVector()