Lines Matching refs:TargetX86Base
399 void TargetX86Base<TraitsType>::initNodeForLowering(CfgNode *Node) {
405 TargetX86Base<TraitsType>::TargetX86Base(Cfg *Func)
422 void TargetX86Base<TraitsType>::staticInit(GlobalContext *Ctx) {
435 bool TargetX86Base<TraitsType>::shouldBePooled(const Constant *C) {
446 ::Ice::Type TargetX86Base<TraitsType>::getPointerType() {
454 template <typename TraitsType> void TargetX86Base<TraitsType>::translateO2() {
595 template <typename TraitsType> void TargetX86Base<TraitsType>::translateOm1() {
680 llvm::dyn_cast<typename TargetX86Base<TraitsType>::X86OperandMem>(
683 llvm::dyn_cast<typename TargetX86Base<TraitsType>::X86OperandMem>(
695 template <typename TraitsType> void TargetX86Base<TraitsType>::findRMW() {
814 template <typename TraitsType> void TargetX86Base<TraitsType>::doLoadOpt() {
909 bool TargetX86Base<TraitsType>::doBranchOpt(Inst *I, const CfgNode *NextNode) {
917 Variable *TargetX86Base<TraitsType>::getPhysicalRegister(RegNumT RegNum,
941 const char *TargetX86Base<TraitsType>::getRegName(RegNumT RegNum,
947 void TargetX86Base<TraitsType>::emitVariable(const Variable *Var) const {
980 typename TargetX86Base<TraitsType>::X86Address
981 TargetX86Base<TraitsType>::stackVarToAsmOperand(const Variable *Var) const {
1007 void TargetX86Base<TraitsType>::addProlog(CfgNode *Node) {
1331 void TargetX86Base<TraitsType>::finishArgumentLowering(
1369 void TargetX86Base<TraitsType>::addEpilog(CfgNode *Node) {
1426 template <typename TraitsType> Type TargetX86Base<TraitsType>::stackSlotType() {
1433 TargetX86Base<TraitsType>::loOperand(Operand *Operand) {
1462 TargetX86Base<TraitsType>::hiOperand(Operand *Operand) {
1500 TargetX86Base<TraitsType>::getRegisterSet(RegSetMask Include,
1506 void TargetX86Base<TraitsType>::lowerAlloca(const InstAlloca *Instr) {
1586 void TargetX86Base<TraitsType>::lowerArguments() {
1668 bool TargetX86Base<TraitsType>::optimizeScalarMul(Variable *Dest, Operand *Src0,
1764 void TargetX86Base<TraitsType>::lowerShift64(InstArithmetic::OpKind Op,
1977 void TargetX86Base<TraitsType>::lowerArithmetic(const InstArithmetic *Instr) {
2609 void TargetX86Base<TraitsType>::lowerAssign(const InstAssign *Instr) {
2621 void TargetX86Base<TraitsType>::lowerBr(const InstBr *Br) {
2662 void TargetX86Base<TraitsType>::lowerCall(const InstCall *Instr) {
2884 void TargetX86Base<TraitsType>::lowerCast(const InstCast *Instr) {
3317 void TargetX86Base<TraitsType>::lowerExtractElement(
3398 void TargetX86Base<TraitsType>::lowerFcmp(const InstFcmp *Fcmp) {
3410 void TargetX86Base<TraitsType>::lowerFcmpAndConsumer(const InstFcmp *Fcmp,
3516 void TargetX86Base<TraitsType>::lowerFcmpVector(const InstFcmp *Fcmp) {
3588 void TargetX86Base<TraitsType>::lowerIcmpAndConsumer(const InstIcmp *Icmp,
3626 void TargetX86Base<TraitsType>::lowerIcmpVector(const InstIcmp *Icmp) {
3744 TargetX86Base<TraitsType>::lowerIcmp64(const InstIcmp *Icmp,
3889 void TargetX86Base<TraitsType>::setccOrConsumer(BrCond Condition,
3911 void TargetX86Base<TraitsType>::movOrConsumer(bool IcmpResult, Variable *Dest,
3941 void TargetX86Base<TraitsType>::lowerArithAndConsumer(
3980 void TargetX86Base<TraitsType>::lowerInsertElement(
4115 void TargetX86Base<TraitsType>::lowerIntrinsic(const InstIntrinsic *Instr) {
4721 void TargetX86Base<TraitsType>::lowerAtomicCmpxchg(Variable *DestPrev,
4773 bool TargetX86Base<TraitsType>::tryOptimizedCmpxchgCmpBr(Variable *Dest,
4849 void TargetX86Base<TraitsType>::lowerAtomicRMW(Variable *Dest,
4864 Op_Lo = &TargetX86Base<TraitsType>::_add;
4865 Op_Hi = &TargetX86Base<TraitsType>::_adc;
4879 Op_Lo = &TargetX86Base<TraitsType>::_sub;
4880 Op_Hi = &TargetX86Base<TraitsType>::_sbb;
4899 Op_Lo = &TargetX86Base<TraitsType>::_or;
4900 Op_Hi = &TargetX86Base<TraitsType>::_or;
4904 Op_Lo = &TargetX86Base<TraitsType>::_and;
4905 Op_Hi = &TargetX86Base<TraitsType>::_and;
4909 Op_Lo = &TargetX86Base<TraitsType>::_xor;
4910 Op_Hi = &TargetX86Base<TraitsType>::_xor;
4935 void TargetX86Base<TraitsType>::expandAtomicRMWAsCmpxchg(LowerBinOp Op_Lo,
5061 void TargetX86Base<TraitsType>::lowerCountZeros(bool Cttz, Type Ty,
5157 void TargetX86Base<TraitsType>::typedLoad(Type Ty, Variable *Dest,
5175 void TargetX86Base<TraitsType>::typedStore(Type Ty, Variable *Value,
5193 void TargetX86Base<TraitsType>::copyMemory(Type Ty, Variable *Dest,
5204 void TargetX86Base<TraitsType>::lowerMemcpy(Operand *Dest, Operand *Src,
5258 void TargetX86Base<TraitsType>::lowerMemmove(Operand *Dest, Operand *Src,
5330 void TargetX86Base<TraitsType>::lowerMemset(Operand *Dest, Operand *Val,
5807 typename TargetX86Base<TypeTraits>::X86OperandMem *
5808 TargetX86Base<TypeTraits>::computeAddressOpt(const Inst *Instr, Type MemType,
6019 void TargetX86Base<TraitsType>::doMockBoundsCheck(Operand *Opnd) {
6048 void TargetX86Base<TraitsType>::lowerLoad(const InstLoad *Load) {
6062 void TargetX86Base<TraitsType>::doAddressOptOther() {
6095 void TargetX86Base<TraitsType>::doAddressOptLoad() {
6106 void TargetX86Base<TraitsType>::doAddressOptLoadSubVector() {
6122 void TargetX86Base<TraitsType>::lowerPhi(const InstPhi * /*Instr*/) {
6127 void TargetX86Base<TraitsType>::lowerRet(const InstRet *Instr) {
6154 Variable *TargetX86Base<TraitsType>::lowerShuffleVector_AllFromSameSrc(
6172 Variable *TargetX86Base<TraitsType>::lowerShuffleVector_TwoFromSameSrc(
6193 Variable *TargetX86Base<TraitsType>::lowerShuffleVector_UnifyFromDifferentSrcs(
6210 GlobalString TargetX86Base<TraitsType>::lowerShuffleVector_NewMaskName() {
6224 TargetX86Base<TraitsType>::lowerShuffleVector_CreatePshufbMask(
6252 void TargetX86Base<TraitsType>::lowerShuffleVector_UsingPshufb(
6311 void TargetX86Base<TraitsType>::lowerShuffleVector(
6678 void TargetX86Base<TraitsType>::lowerSelect(const InstSelect *Select) {
6715 void TargetX86Base<TraitsType>::lowerSelectMove(Variable *Dest, BrCond Cond,
6757 void TargetX86Base<TraitsType>::lowerSelectIntMove(Variable *Dest, BrCond Cond,
6769 void TargetX86Base<TraitsType>::lowerMove(Variable *Dest, Operand *Src,
6805 bool TargetX86Base<TraitsType>::lowerOptimizeFcmpSelect(
6857 void TargetX86Base<TraitsType>::lowerIcmp(const InstIcmp *Icmp) {
6868 void TargetX86Base<TraitsType>::lowerSelectVector(const InstSelect *Instr) {
6937 void TargetX86Base<TraitsType>::lowerStore(const InstStore *Instr) {
6959 void TargetX86Base<TraitsType>::doAddressOptStore() {
6972 void TargetX86Base<TraitsType>::doAddressOptStoreSubVector() {
6989 Operand *TargetX86Base<TraitsType>::lowerCmpRange(Operand *Comparison,
7009 void TargetX86Base<TraitsType>::lowerCaseCluster(const CaseCluster &Case,
7102 void TargetX86Base<TraitsType>::lowerSwitch(const InstSwitch *Instr) {
7246 void TargetX86Base<TraitsType>::eliminateNextVectorSextInstruction(
7261 void TargetX86Base<TraitsType>::lowerUnreachable(
7270 void TargetX86Base<TraitsType>::lowerBreakpoint(
7276 void TargetX86Base<TraitsType>::lowerRMW(const InstX86FakeRMW *RMW) {
7353 void TargetX86Base<TraitsType>::lowerOther(const Inst *Instr) {
7365 template <typename TraitsType> void TargetX86Base<TraitsType>::prelowerPhis() {
7394 PhiLowering::prelowerPhis32Bit<TargetX86Base<TraitsType>>(
7399 void TargetX86Base<TraitsType>::genTargetHelperCallFor(Inst *Instr) {
7644 uint32_t TargetX86Base<TraitsType>::getCallStackArgumentsSizeBytes(
7689 uint32_t TargetX86Base<TraitsType>::getCallStackArgumentsSizeBytes(
7709 Variable *TargetX86Base<TraitsType>::makeZeroedRegister(Type Ty,
7744 Variable *TargetX86Base<TraitsType>::makeVectorOfZeros(Type Ty,
7750 Variable *TargetX86Base<TraitsType>::makeVectorOfMinusOnes(Type Ty,
7767 Variable *TargetX86Base<TraitsType>::makeVectorOfOnes(Type Ty, RegNumT RegNum) {
7775 Variable *TargetX86Base<TraitsType>::makeVectorOfHighOrderBits(Type Ty,
7803 Variable *TargetX86Base<TraitsType>::makeVectorOfFabsMask(Type Ty,
7811 typename TargetX86Base<TraitsType>::X86OperandMem *
7812 TargetX86Base<TraitsType>::getMemoryOperandForStackSlot(Type Ty, Variable *Slot,
7857 Variable *TargetX86Base<TraitsType>::copyToReg8(Operand *Src, RegNumT RegNum) {
7892 Variable *TargetX86Base<TraitsType>::copyToReg(Operand *Src, RegNumT RegNum) {
7904 Operand *TargetX86Base<TraitsType>::legalize(Operand *From, LegalMask Allowed,
8068 Variable *TargetX86Base<TraitsType>::legalizeToReg(Operand *From,
8075 Operand *TargetX86Base<TraitsType>::legalizeUndef(Operand *From,
8103 Operand *TargetX86Base<TraitsType>::legalizeSrc0ForCmp(Operand *Src0,
8116 typename TargetX86Base<TraitsType>::X86OperandMem *
8117 TargetX86Base<TraitsType>::formMemoryOperand(Operand *Opnd, Type Ty,
8148 Variable *TargetX86Base<TraitsType>::makeReg(Type Type, RegNumT RegNum) {
8163 Type TargetX86Base<TraitsType>::largestTypeInSize(uint32_t Size,
8174 Type TargetX86Base<TraitsType>::firstTypeThatFitsSize(uint32_t Size,
8186 template <typename TraitsType> void TargetX86Base<TraitsType>::postLower() {
8194 void TargetX86Base<TraitsType>::emit(const ConstantInteger32 *C) const {
8202 void TargetX86Base<TraitsType>::emit(const ConstantInteger64 *C) const {
8214 void TargetX86Base<TraitsType>::emit(const ConstantFloat *C) const {
8222 void TargetX86Base<TraitsType>::emit(const ConstantDouble *C) const {
8230 void TargetX86Base<TraitsType>::emit(const ConstantUndef *) const {
8235 void TargetX86Base<Machine>::emit(const ConstantRelocatable *C) const {
8246 void TargetX86Base<TraitsType>::emitJumpTable(