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Lines Matching refs:Inst1

709 #define TestImplRegReg(Inst0, Inst1, Dst0, Dst1, Value0, Src0, Src1, Value1,   \  in TEST_F()  argument
715 "(" #Inst0 ", " #Inst1 ", " #Dst0 ", " #Dst1 ", " #Value0 ", " #Src0 \ in TEST_F()
726 __ Inst1(IceType_i##Size, Encoded_GPR_##Dst1(), Encoded_GPR_##Src1()); \ in TEST_F()
740 #define TestImplRegAddr(Inst0, Inst1, Dst0, Dst1, Value0, Value1, Op, Size) \ in TEST_F() argument
745 "(" #Inst0 ", " #Inst1 ", " #Dst0 ", " #Dst1 ", " #Value0 \ in TEST_F()
756 __ Inst1(IceType_i##Size, Encoded_GPR_##Dst1(), dwordAddress(T1)); \ in TEST_F()
772 #define TestImplRegImm(Inst0, Inst1, Dst0, Dst1, Value0, Imm, Op, Size) \ in TEST_F() argument
777 "(" #Inst0 ", " #Inst1 ", " #Dst0 ", " #Dst1 ", " #Value0 \ in TEST_F()
785 __ Inst1(IceType_i##Size, Encoded_GPR_##Dst1(), \ in TEST_F()
800 #define TestImplAddrReg(Inst0, Inst1, Value0, Src0, Src1, Value1, Op, Size) \ in TEST_F() argument
805 "(" #Inst0 ", " #Inst1 ", Addr, " #Value0 ", " #Src0 ", " #Src1 \ in TEST_F()
816 __ Inst1(IceType_i##Size, dwordAddress(T1), Encoded_GPR_##Src1()); \ in TEST_F()
832 #define TestImplAddrImm(Inst0, Inst1, Value0, Imm, Op, Size) \ in TEST_F() argument
837 "(" #Inst0 ", " #Inst1 ", Addr, " #Value0 ", Imm(" #Imm "), " #Op \ in TEST_F()
845 __ Inst1(IceType_i##Size, dwordAddress(T1), \ in TEST_F()
862 #define TestImplOp(Inst0, Inst1, Dst0, Dst1, Value0, Src0, Src1, Value1, Op, \ in TEST_F() argument
865 TestImplRegReg(Inst0, Inst1, Dst0, Dst1, Value0, Src0, Src1, Value1, Op, \ in TEST_F()
867 TestImplRegAddr(Inst0, Inst1, Dst0, Dst1, Value0, Value1, Op, Size); \ in TEST_F()
868 TestImplRegImm(Inst0, Inst1, Dst0, Dst1, Value0, Value1, Op, Size); \ in TEST_F()
869 TestImplAddrReg(Inst0, Inst1, Value0, Src0, Src1, Value1, Op, Size); \ in TEST_F()
870 TestImplAddrImm(Inst0, Inst1, Value0, Value1, Op, Size); \ in TEST_F()