Lines Matching refs:EncodingSize

291     virtual DisassemblerStream& operator<<(const EncodingSize& size) {
611            EncodingSize size,
617             EncodingSize size,
623            EncodingSize size,
631             EncodingSize size,
640   void adr(Condition cond, EncodingSize size, Register rd, Location* location);
643             EncodingSize size,
649             EncodingSize size,
655            EncodingSize size,
661             EncodingSize size,
666   void b(Condition cond, EncodingSize size, Location* location);
674            EncodingSize size,
680             EncodingSize size,
706            EncodingSize size,
711            EncodingSize size,
732            EncodingSize size,
738             EncodingSize size,
789            EncodingSize size,
820              EncodingSize size,
831            EncodingSize size,
835   void ldr(Condition cond, EncodingSize size, Register rt, Location* location);
838             EncodingSize size,
863             EncodingSize size,
870              EncodingSize size,
877              EncodingSize size,
884            EncodingSize size,
890             EncodingSize size,
896            EncodingSize size,
902             EncodingSize size,
914            EncodingSize size,
919             EncodingSize size,
934       Condition cond, EncodingSize size, Register rd, Register rn, Register rm);
939            EncodingSize size,
944             EncodingSize size,
948   void nop(Condition cond, EncodingSize size);
955            EncodingSize size,
961             EncodingSize size,
980   void pop(Condition cond, EncodingSize size, RegisterList registers);
982   void pop(Condition cond, EncodingSize size, Register rt);
984   void push(Condition cond, EncodingSize size, RegisterList registers);
986   void push(Condition cond, EncodingSize size, Register rt);
1010   void rev(Condition cond, EncodingSize size, Register rd, Register rm);
1012   void rev16(Condition cond, EncodingSize size, Register rd, Register rm);
1014   void revsh(Condition cond, EncodingSize size, Register rd, Register rm);
1017            EncodingSize size,
1023             EncodingSize size,
1033            EncodingSize size,
1039             EncodingSize size,
1055            EncodingSize size,
1061             EncodingSize size,
1225            EncodingSize size,
1236              EncodingSize size,
1242              EncodingSize size,
1268            EncodingSize size,
1273             EncodingSize size,
1304             EncodingSize size,
1309            EncodingSize size,
1317             EncodingSize size,
1338             EncodingSize size,
1345             EncodingSize size,
1356            EncodingSize size,
1369   void udf(Condition cond, EncodingSize size, uint32_t imm);
1437             EncodingSize size,
1444             EncodingSize size,
2625   void yield(Condition cond, EncodingSize size);