Lines Matching refs:rs_
57 : imm_(immediate), rm_(NoReg), shift_(LSL), amount_(0), rs_(NoReg) {} in Operand()
59 : imm_(immediate), rm_(NoReg), shift_(LSL), amount_(0), rs_(NoReg) {} in Operand()
66 : imm_(0), rm_(rm), shift_(LSL), amount_(0), rs_(NoReg) { in Operand()
74 : imm_(0), rm_(rm), shift_(shift), amount_(0), rs_(NoReg) { in Operand()
84 : imm_(0), rm_(rm), shift_(shift), amount_(amount), rs_(NoReg) { in Operand()
112 : imm_(0), rm_(rm), shift_(shift), amount_(0), rs_(rs) { in Operand()
113 VIXL_ASSERT(rm_.IsValid() && rs_.IsValid()); in Operand()
145 return rm_.IsValid() && !shift_.IsRRX() && !rs_.IsValid() && (amount_ == 0); in IsPlainRegister()
149 return rm_.IsValid() && !rs_.IsValid(); in IsImmediateShiftedRegister()
153 return rm_.IsValid() && rs_.IsValid(); in IsRegisterShiftedRegister()
185 return rs_; in GetShiftRegister()
219 Register rs_; variable