• Home
  • Raw
  • Download

Lines Matching refs:zda

1292 void Assembler::fcmla(const ZRegister& zda,  in fcmla()  argument
1302 VIXL_ASSERT(AreSameLaneSize(zda, zn, zm)); in fcmla()
1303 VIXL_ASSERT(zda.GetLaneSizeInBytes() != kBRegSizeInBytes); in fcmla()
1307 Emit(FCMLA_z_p_zzz | rotate_bit | SVESize(zda) | Rd(zda) | PgLow8(pg) | in fcmla()
1313 void Assembler::fcmla(const ZRegister& zda, in fcmla() argument
1319 VIXL_ASSERT(AreSameLaneSize(zda, zn, zm)); in fcmla()
1323 int lane_size = zda.GetLaneSizeInBytes(); in fcmla()
1340 Emit(op | zm_and_idx | rotate_bit | Rd(zda) | Rn(zn)); in fcmla()
1437 void Assembler::fmla(const ZRegister& zda, in fmla() argument
1446 VIXL_ASSERT(AreSameLaneSize(zda, zn, zm)); in fmla()
1447 VIXL_ASSERT(zda.GetLaneSizeInBytes() != kBRegSizeInBytes); in fmla()
1449 Emit(FMLA_z_p_zzz | SVESize(zda) | Rd(zda) | PgLow8(pg) | Rn(zn) | Rm(zm)); in fmla()
1452 void Assembler::fmls(const ZRegister& zda, in fmls() argument
1461 VIXL_ASSERT(AreSameLaneSize(zda, zn, zm)); in fmls()
1462 VIXL_ASSERT(zda.GetLaneSizeInBytes() != kBRegSizeInBytes); in fmls()
1464 Emit(FMLS_z_p_zzz | SVESize(zda) | Rd(zda) | PgLow8(pg) | Rn(zn) | Rm(zm)); in fmls()
1497 void Assembler::fnmla(const ZRegister& zda, in fnmla() argument
1506 VIXL_ASSERT(AreSameLaneSize(zda, zn, zm)); in fnmla()
1507 VIXL_ASSERT(zda.GetLaneSizeInBytes() != kBRegSizeInBytes); in fnmla()
1509 Emit(FNMLA_z_p_zzz | SVESize(zda) | Rd(zda) | PgLow8(pg) | Rn(zn) | Rm(zm)); in fnmla()
1512 void Assembler::fnmls(const ZRegister& zda, in fnmls() argument
1521 VIXL_ASSERT(AreSameLaneSize(zda, zn, zm)); in fnmls()
1522 VIXL_ASSERT(zda.GetLaneSizeInBytes() != kBRegSizeInBytes); in fnmls()
1524 Emit(FNMLS_z_p_zzz | SVESize(zda) | Rd(zda) | PgLow8(pg) | Rn(zn) | Rm(zm)); in fnmls()
1587 void Assembler::fmla(const ZRegister& zda, in fmla() argument
1592 VIXL_ASSERT(AreSameLaneSize(zda, zn, zm)); in fmla()
1596 Instr synthesized_op = SVEFPMulIndexHelper(zda.GetLaneSizeInBytesLog2(), in fmla()
1603 Emit(synthesized_op | Rd(zda) | Rn(zn)); in fmla()
1606 void Assembler::fmls(const ZRegister& zda, in fmls() argument
1611 VIXL_ASSERT(AreSameLaneSize(zda, zn, zm)); in fmls()
1615 Instr synthesized_op = SVEFPMulIndexHelper(zda.GetLaneSizeInBytesLog2(), in fmls()
1622 Emit(synthesized_op | Rd(zda) | Rn(zn)); in fmls()
3167 void Assembler::mla(const ZRegister& zda, in mla() argument
3176 VIXL_ASSERT(AreSameLaneSize(zda, zn, zm)); in mla()
3178 Emit(MLA_z_p_zzz | SVESize(zda) | Rd(zda) | PgLow8(pg) | Rn(zn) | Rm(zm)); in mla()
3181 void Assembler::mls(const ZRegister& zda, in mls() argument
3190 VIXL_ASSERT(AreSameLaneSize(zda, zn, zm)); in mls()
3192 Emit(MLS_z_p_zzz | SVESize(zda) | Rd(zda) | PgLow8(pg) | Rn(zn) | Rm(zm)); in mls()
3211 void Assembler::sdot(const ZRegister& zda, in sdot() argument
3215 VIXL_ASSERT(zda.IsLaneSizeS() || zda.IsLaneSizeD()); in sdot()
3216 VIXL_ASSERT(zda.GetLaneSizeInBytes() == (zn.GetLaneSizeInBytes() * 4)); in sdot()
3219 Emit(SDOT_z_zzz | SVESize(zda) | Rd(zda) | Rn(zn) | Rm(zm)); in sdot()
3222 void Assembler::udot(const ZRegister& zda, in udot() argument
3226 VIXL_ASSERT(zda.IsLaneSizeS() || zda.IsLaneSizeD()); in udot()
3227 VIXL_ASSERT(zda.GetLaneSizeInBytes() == (zn.GetLaneSizeInBytes() * 4)); in udot()
3230 Emit(UDOT_z_zzz | SVESize(zda) | Rd(zda) | Rn(zn) | Rm(zm)); in udot()
5228 void Assembler::sdot(const ZRegister& zda, in sdot() argument
5233 VIXL_ASSERT(zda.GetLaneSizeInBytes() == (zn.GetLaneSizeInBytes() * 4)); in sdot()
5237 switch (zda.GetLaneSizeInBits()) { in sdot()
5240 op = SDOT_z_zzzi_s | Rx<18, 16>(zm) | (index << 19) | Rd(zda) | Rn(zn); in sdot()
5244 op = SDOT_z_zzzi_d | Rx<19, 16>(zm) | (index << 20) | Rd(zda) | Rn(zn); in sdot()
5254 void Assembler::udot(const ZRegister& zda, in udot() argument
5259 VIXL_ASSERT(zda.GetLaneSizeInBytes() == (zn.GetLaneSizeInBytes() * 4)); in udot()
5263 switch (zda.GetLaneSizeInBits()) { in udot()
5266 op = UDOT_z_zzzi_s | Rx<18, 16>(zm) | (index << 19) | Rd(zda) | Rn(zn); in udot()
5270 op = UDOT_z_zzzi_d | Rx<19, 16>(zm) | (index << 20) | Rd(zda) | Rn(zn); in udot()