Lines Matching refs:uxtl2
1756 LogicVRegister extendedreg = uxtl2(vform, temp2, src); in ushll2()
3104 LogicVRegister Simulator::uxtl2(VectorFormat vform, in uxtl2() function in vixl::aarch64::Simulator
3475 uxtl2(vform, temp1, src1); in uaddl2()
3476 uxtl2(vform, temp2, src2); in uaddl2()
3498 uxtl2(vform, temp, src2); in uaddw2()
3567 uxtl2(vform, temp1, src1); in usubl2()
3568 uxtl2(vform, temp2, src2); in usubl2()
3590 uxtl2(vform, temp, src2); in usubw2()
3659 uxtl2(vform, temp1, src1); in uabal2()
3660 uxtl2(vform, temp2, src2); in uabal2()
3707 uxtl2(vform, temp1, src1); in uabdl2()
3708 uxtl2(vform, temp2, src2); in uabdl2()
3755 uxtl2(vform, temp1, src1); in umull2()
3756 uxtl2(vform, temp2, src2); in umull2()
3803 uxtl2(vform, temp1, src1); in umlsl2()
3804 uxtl2(vform, temp2, src2); in umlsl2()
3851 uxtl2(vform, temp1, src1); in umlal2()
3852 uxtl2(vform, temp2, src2); in umlal2()