Lines Matching refs:rdn
3997 void Decb(const Register& rdn, int pattern = SVE_ALL, int multiplier = 1) {
4000 decb(rdn, pattern, multiplier);
4002 void Decd(const Register& rdn, int pattern = SVE_ALL, int multiplier = 1) {
4005 decd(rdn, pattern, multiplier);
4012 void Dech(const Register& rdn, int pattern = SVE_ALL, int multiplier = 1) {
4015 dech(rdn, pattern, multiplier);
4022 void Decp(const Register& rdn, const PRegisterWithLaneSize& pg) { in Decp() argument
4025 decp(rdn, pg); in Decp()
4035 void Decw(const Register& rdn, int pattern = SVE_ALL, int multiplier = 1) {
4038 decw(rdn, pattern, multiplier);
4721 void Incb(const Register& rdn, int pattern = SVE_ALL, int multiplier = 1) {
4724 incb(rdn, pattern, multiplier);
4726 void Incd(const Register& rdn, int pattern = SVE_ALL, int multiplier = 1) {
4729 incd(rdn, pattern, multiplier);
4736 void Inch(const Register& rdn, int pattern = SVE_ALL, int multiplier = 1) {
4739 inch(rdn, pattern, multiplier);
4746 void Incp(const Register& rdn, const PRegisterWithLaneSize& pg) { in Incp() argument
4749 incp(rdn, pg); in Incp()
4759 void Incw(const Register& rdn, int pattern = SVE_ALL, int multiplier = 1) {
4762 incw(rdn, pattern, multiplier);
5684 void Sqdecb(const Register& rdn, int pattern = SVE_ALL, int multiplier = 1) {
5687 sqdecb(rdn, pattern, multiplier);
5697 void Sqdecd(const Register& rdn, int pattern = SVE_ALL, int multiplier = 1) {
5700 sqdecd(rdn, pattern, multiplier);
5715 void Sqdech(const Register& rdn, int pattern = SVE_ALL, int multiplier = 1) {
5718 sqdech(rdn, pattern, multiplier);
5755 void Sqdecw(const Register& rdn, int pattern = SVE_ALL, int multiplier = 1) {
5758 sqdecw(rdn, pattern, multiplier);
5773 void Sqincb(const Register& rdn, int pattern = SVE_ALL, int multiplier = 1) {
5776 sqincb(rdn, pattern, multiplier);
5786 void Sqincd(const Register& rdn, int pattern = SVE_ALL, int multiplier = 1) {
5789 sqincd(rdn, pattern, multiplier);
5804 void Sqinch(const Register& rdn, int pattern = SVE_ALL, int multiplier = 1) {
5807 sqinch(rdn, pattern, multiplier);
5844 void Sqincw(const Register& rdn, int pattern = SVE_ALL, int multiplier = 1) {
5847 sqincw(rdn, pattern, multiplier);
6117 void Uqdecb(const Register& rdn, int pattern = SVE_ALL, int multiplier = 1) {
6120 uqdecb(rdn, pattern, multiplier);
6122 void Uqdecd(const Register& rdn, int pattern = SVE_ALL, int multiplier = 1) {
6125 uqdecd(rdn, pattern, multiplier);
6132 void Uqdech(const Register& rdn, int pattern = SVE_ALL, int multiplier = 1) {
6135 uqdech(rdn, pattern, multiplier);
6158 void Uqdecp(const Register& rdn, const PRegisterWithLaneSize& pg) { in Uqdecp() argument
6159 Uqdecp(rdn, pg, rdn); in Uqdecp()
6171 void Uqdecw(const Register& rdn, int pattern = SVE_ALL, int multiplier = 1) {
6174 uqdecw(rdn, pattern, multiplier);
6181 void Uqincb(const Register& rdn, int pattern = SVE_ALL, int multiplier = 1) {
6184 uqincb(rdn, pattern, multiplier);
6186 void Uqincd(const Register& rdn, int pattern = SVE_ALL, int multiplier = 1) {
6189 uqincd(rdn, pattern, multiplier);
6196 void Uqinch(const Register& rdn, int pattern = SVE_ALL, int multiplier = 1) {
6199 uqinch(rdn, pattern, multiplier);
6222 void Uqincp(const Register& rdn, const PRegisterWithLaneSize& pg) { in Uqincp() argument
6223 Uqincp(rdn, pg, rdn); in Uqincp()
6235 void Uqincw(const Register& rdn, int pattern = SVE_ALL, int multiplier = 1) {
6238 uqincw(rdn, pattern, multiplier);