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Lines Matching refs:IsPlainRegister

983   VIXL_CHECK(Operand(x0).IsPlainRegister());  in TEST()
984 VIXL_CHECK(Operand(x1, LSL, 0).IsPlainRegister()); in TEST()
985 VIXL_CHECK(Operand(x2, LSR, 0).IsPlainRegister()); in TEST()
986 VIXL_CHECK(Operand(x3, ASR, 0).IsPlainRegister()); in TEST()
987 VIXL_CHECK(Operand(x4, ROR, 0).IsPlainRegister()); in TEST()
988 VIXL_CHECK(Operand(x5, UXTX).IsPlainRegister()); in TEST()
989 VIXL_CHECK(Operand(x6, SXTX).IsPlainRegister()); in TEST()
990 VIXL_CHECK(Operand(w7).IsPlainRegister()); in TEST()
991 VIXL_CHECK(Operand(w8, LSL, 0).IsPlainRegister()); in TEST()
992 VIXL_CHECK(Operand(w9, LSR, 0).IsPlainRegister()); in TEST()
993 VIXL_CHECK(Operand(w10, ASR, 0).IsPlainRegister()); in TEST()
994 VIXL_CHECK(Operand(w11, ROR, 0).IsPlainRegister()); in TEST()
996 VIXL_CHECK(!Operand(x0, LSL, 1).IsPlainRegister()); in TEST()
997 VIXL_CHECK(!Operand(x1, LSR, 2).IsPlainRegister()); in TEST()
998 VIXL_CHECK(!Operand(x2, ASR, 3).IsPlainRegister()); in TEST()
999 VIXL_CHECK(!Operand(x3, ROR, 4).IsPlainRegister()); in TEST()
1000 VIXL_CHECK(!Operand(x5, UXTX, 1).IsPlainRegister()); in TEST()
1001 VIXL_CHECK(!Operand(x6, SXTX, 2).IsPlainRegister()); in TEST()
1002 VIXL_CHECK(!Operand(w7, LSL, 1).IsPlainRegister()); in TEST()
1003 VIXL_CHECK(!Operand(w8, LSR, 2).IsPlainRegister()); in TEST()
1004 VIXL_CHECK(!Operand(w9, ASR, 3).IsPlainRegister()); in TEST()
1005 VIXL_CHECK(!Operand(w10, ROR, 4).IsPlainRegister()); in TEST()
1006 VIXL_CHECK(!Operand(w11, UXTB).IsPlainRegister()); in TEST()
1007 VIXL_CHECK(!Operand(w12, SXTB).IsPlainRegister()); in TEST()
1008 VIXL_CHECK(!Operand(w13, UXTH).IsPlainRegister()); in TEST()
1009 VIXL_CHECK(!Operand(w14, SXTH).IsPlainRegister()); in TEST()
1012 VIXL_CHECK(!Operand(w15, UXTW).IsPlainRegister()); in TEST()
1013 VIXL_CHECK(!Operand(w16, SXTW).IsPlainRegister()); in TEST()
1018 VIXL_CHECK(MemOperand(x0).IsPlainRegister()); in TEST()
1019 VIXL_CHECK(MemOperand(sp).IsPlainRegister()); in TEST()
1020 VIXL_CHECK(MemOperand(x1, 0).IsPlainRegister()); in TEST()
1022 VIXL_CHECK(!MemOperand(x2, xzr).IsPlainRegister()); in TEST()
1023 VIXL_CHECK(!MemOperand(x3, xzr, SXTX).IsPlainRegister()); in TEST()
1024 VIXL_CHECK(!MemOperand(x4, xzr, SXTX, 2).IsPlainRegister()); in TEST()
1025 VIXL_CHECK(!MemOperand(x5, wzr, UXTW).IsPlainRegister()); in TEST()
1026 VIXL_CHECK(!MemOperand(x6, wzr, UXTW, 3).IsPlainRegister()); in TEST()
1028 VIXL_CHECK(!MemOperand(x7, 0, PostIndex).IsPlainRegister()); in TEST()
1029 VIXL_CHECK(!MemOperand(x8, 0, PreIndex).IsPlainRegister()); in TEST()
1030 VIXL_CHECK(!MemOperand(x9, xzr, PostIndex).IsPlainRegister()); in TEST()
1032 VIXL_CHECK(!MemOperand(x20, 1).IsPlainRegister()); in TEST()
1033 VIXL_CHECK(!MemOperand(x21, x30).IsPlainRegister()); in TEST()