Lines Matching refs:hardware
73 const hardware::hidl_vec<V1_0::RequestArgument>& arguments, in updateForArguments()
110 const hardware::hidl_vec<uint8_t>* mModelOperandValues) { in initializeRunTimeInfo()
156 static Subgraph* Create(const hardware::hidl_vec<V1_3::Operation>& operations, in Create()
563 const hardware::hidl_vec<uint32_t>& ins = operation.inputs; in VisitAbsNode()
564 const hardware::hidl_vec<uint32_t>& outs = operation.outputs; in VisitAbsNode()
583 const hardware::hidl_vec<uint32_t>& ins = operation.inputs; in VisitAddNode()
584 const hardware::hidl_vec<uint32_t>& outs = operation.outputs; in VisitAddNode()
614 const hardware::hidl_vec<uint32_t>& ins = operation.inputs; in VisitAveragePool2DNode()
615 const hardware::hidl_vec<uint32_t>& outs = operation.outputs; in VisitAveragePool2DNode()
697 const hardware::hidl_vec<uint32_t>& ins = operation.inputs; in VisitConv2DNode()
698 const hardware::hidl_vec<uint32_t>& outs = operation.outputs; in VisitConv2DNode()
796 const hardware::hidl_vec<uint32_t>& ins = operation.inputs; in VisitDepthwiseConv2DNode()
797 const hardware::hidl_vec<uint32_t>& outs = operation.outputs; in VisitDepthwiseConv2DNode()
896 const hardware::hidl_vec<uint32_t>& ins = operation.inputs; in VisitDivNode()
897 const hardware::hidl_vec<uint32_t>& outs = operation.outputs; in VisitDivNode()
927 const hardware::hidl_vec<uint32_t>& ins = operation.inputs; in VisitFullyConnectedNode()
928 const hardware::hidl_vec<uint32_t>& outs = operation.outputs; in VisitFullyConnectedNode()
963 const hardware::hidl_vec<uint32_t>& ins = operation.inputs; in VisitFloorNode()
964 const hardware::hidl_vec<uint32_t>& outs = operation.outputs; in VisitFloorNode()
985 const hardware::hidl_vec<uint32_t>& ins = operation.inputs; in VisitHardSwishNode()
986 const hardware::hidl_vec<uint32_t>& outs = operation.outputs; in VisitHardSwishNode()
1006 const hardware::hidl_vec<uint32_t>& ins = operation.inputs; in VisitLogisticNode()
1007 const hardware::hidl_vec<uint32_t>& outs = operation.outputs; in VisitLogisticNode()
1027 const hardware::hidl_vec<uint32_t>& ins = operation.inputs; in VisitMaxPool2DNode()
1028 const hardware::hidl_vec<uint32_t>& outs = operation.outputs; in VisitMaxPool2DNode()
1111 const hardware::hidl_vec<uint32_t>& ins = operation.inputs; in VisitMaximumNode()
1112 const hardware::hidl_vec<uint32_t>& outs = operation.outputs; in VisitMaximumNode()
1142 const hardware::hidl_vec<uint32_t>& ins = operation.inputs; in VisitMeanNode()
1143 const hardware::hidl_vec<uint32_t>& outs = operation.outputs; in VisitMeanNode()
1186 const hardware::hidl_vec<uint32_t>& ins = operation.inputs; in VisitMinimumNode()
1187 const hardware::hidl_vec<uint32_t>& outs = operation.outputs; in VisitMinimumNode()
1216 const hardware::hidl_vec<uint32_t>& ins = operation.inputs; in VisitMulNode()
1217 const hardware::hidl_vec<uint32_t>& outs = operation.outputs; in VisitMulNode()
1246 const hardware::hidl_vec<uint32_t>& ins = operation.inputs; in VisitNegNode()
1247 const hardware::hidl_vec<uint32_t>& outs = operation.outputs; in VisitNegNode()
1268 const hardware::hidl_vec<uint32_t>& ins = operation.inputs; in VisitPreluNode()
1269 const hardware::hidl_vec<uint32_t>& outs = operation.outputs; in VisitPreluNode()
1295 const hardware::hidl_vec<uint32_t>& ins = operation.inputs; in VisitPadNode()
1296 const hardware::hidl_vec<uint32_t>& outs = operation.outputs; in VisitPadNode()
1332 const hardware::hidl_vec<uint32_t>& ins = operation.inputs; in VisitPadV2Node()
1344 const hardware::hidl_vec<uint32_t>& ins = operation.inputs; in VisitReshapeNode()
1345 const hardware::hidl_vec<uint32_t>& outs = operation.outputs; in VisitReshapeNode()
1376 const hardware::hidl_vec<uint32_t>& ins = operation.inputs; in VisitResizeBilinearNode()
1377 const hardware::hidl_vec<uint32_t>& outs = operation.outputs; in VisitResizeBilinearNode()
1447 const hardware::hidl_vec<uint32_t>& ins = operation.inputs; in VisitReluNode()
1448 const hardware::hidl_vec<uint32_t>& outs = operation.outputs; in VisitReluNode()
1469 const hardware::hidl_vec<uint32_t>& ins = operation.inputs; in VisitSqrtNode()
1470 const hardware::hidl_vec<uint32_t>& outs = operation.outputs; in VisitSqrtNode()
1490 const hardware::hidl_vec<uint32_t>& ins = operation.inputs; in VisitSubNode()
1491 const hardware::hidl_vec<uint32_t>& outs = operation.outputs; in VisitSubNode()
1521 const hardware::hidl_vec<uint32_t>& ins = operation.inputs; in VisitSoftmaxNode()
1522 const hardware::hidl_vec<uint32_t>& outs = operation.outputs; in VisitSoftmaxNode()
1582 hardware::Return<V1_0::ErrorStatus> execute(
1584 hardware::Return<V1_0::ErrorStatus> execute_1_2(
1587 hardware::Return<V1_3::ErrorStatus> execute_1_3(
1592 hardware::Return<void> executeSynchronously(const V1_0::Request& request,
1595 hardware::Return<void> executeSynchronously_1_3(
1600 hardware::Return<void> configureExecutionBurst(
1605 hardware::Return<void> executeFenced(const V1_3::Request& request,
1606 const hardware::hidl_vec<hardware::hidl_handle>& wait_for,
1619 hardware::Return<void> SamplePreparedModelXNNPACK::configureExecutionBurst( in configureExecutionBurst()
1626 return hardware::Void(); in configureExecutionBurst()
1700 hardware::Return<V1_0::ErrorStatus> SamplePreparedModelXNNPACK::execute( in execute()
1709 hardware::Return<V1_0::ErrorStatus> SamplePreparedModelXNNPACK::execute_1_2( in execute_1_2()
1718 hardware::Return<V1_3::ErrorStatus> SamplePreparedModelXNNPACK::execute_1_3( in execute_1_3()
1728 static std::tuple<V1_3::ErrorStatus, hardware::hidl_vec<V1_2::OutputShape>, V1_2::Timing>
1762 hardware::Return<void> SamplePreparedModelXNNPACK::executeSynchronously( in executeSynchronously()
1768 return hardware::Void(); in executeSynchronously()
1771 hardware::Return<void> SamplePreparedModelXNNPACK::executeSynchronously_1_3( in executeSynchronously_1_3()
1779 return hardware::Void(); in executeSynchronously_1_3()
1783 hardware::Return<void> SamplePreparedModelXNNPACK::executeFenced( in executeFenced()
1784 const V1_3::Request& request, const hardware::hidl_vec<hardware::hidl_handle>& waitFor, in executeFenced()
1791 cb(V1_3::ErrorStatus::INVALID_ARGUMENT, hardware::hidl_handle(nullptr), nullptr); in executeFenced()
1792 return hardware::Void(); in executeFenced()
1796 cb(V1_3::ErrorStatus::MISSED_DEADLINE_PERSISTENT, hardware::hidl_handle(nullptr), nullptr); in executeFenced()
1797 return hardware::Void(); in executeFenced()
1803 cb(V1_3::ErrorStatus::INVALID_ARGUMENT, hardware::hidl_handle(nullptr), nullptr); in executeFenced()
1804 return hardware::Void(); in executeFenced()
1809 cb(V1_3::ErrorStatus::GENERAL_FAILURE, hardware::hidl_handle(nullptr), nullptr); in executeFenced()
1810 return hardware::Void(); in executeFenced()
1815 cb(V1_3::ErrorStatus::GENERAL_FAILURE, hardware::hidl_handle(nullptr), nullptr); in executeFenced()
1832 cb(status, hardware::hidl_handle(nullptr), fencedExecutionCallback); in executeFenced()
1833 return hardware::Void(); in executeFenced()
1839 hardware::Return<void> getCapabilities_1_3(getCapabilities_1_3_cb cb) override;
1840 hardware::Return<V1_0::ErrorStatus> prepareModel(
1842 hardware::Return<V1_0::ErrorStatus> prepareModel_1_1(
1845 hardware::Return<V1_0::ErrorStatus> prepareModel_1_2(
1847 const hardware::hidl_vec<hardware::hidl_handle>& modelCache,
1848 const hardware::hidl_vec<hardware::hidl_handle>& dataCache, const HalCacheToken& token,
1850 hardware::Return<V1_3::ErrorStatus> prepareModel_1_3(
1853 const hardware::hidl_vec<hardware::hidl_handle>& modelCache,
1854 const hardware::hidl_vec<hardware::hidl_handle>& dataCache, const HalCacheToken& token,
1856 hardware::Return<void> allocate(
1858 const hardware::hidl_vec<sp<V1_3::IPreparedModel>>& preparedModels,
1859 const hardware::hidl_vec<V1_3::BufferRole>& inputRoles,
1860 const hardware::hidl_vec<V1_3::BufferRole>& outputRoles, allocate_cb cb) override;
1871 const uid_t userId = hardware::IPCThreadState::self()->getCallingUid(); in prepareModelXNNPACK()
1900 hardware::Return<V1_0::ErrorStatus> SampleDriverFloatXNNPACK::prepareModel( in prepareModel()
1908 hardware::Return<V1_0::ErrorStatus> SampleDriverFloatXNNPACK::prepareModel_1_1( in prepareModel_1_1()
1916 hardware::Return<V1_0::ErrorStatus> SampleDriverFloatXNNPACK::prepareModel_1_2( in prepareModel_1_2()
1918 const hardware::hidl_vec<hardware::hidl_handle>&, in prepareModel_1_2()
1919 const hardware::hidl_vec<hardware::hidl_handle>&, const HalCacheToken&, in prepareModel_1_2()
1926 hardware::Return<V1_3::ErrorStatus> SampleDriverFloatXNNPACK::prepareModel_1_3( in prepareModel_1_3()
1929 const hardware::hidl_vec<hardware::hidl_handle>& modelCache, in prepareModel_1_3()
1930 const hardware::hidl_vec<hardware::hidl_handle>& dataCache, const HalCacheToken& token, in prepareModel_1_3()
1935 hardware::Return<void> SampleDriverFloatXNNPACK::getCapabilities_1_3(getCapabilities_1_3_cb cb) { in getCapabilities_1_3()
1951 return hardware::Void(); in getCapabilities_1_3()
1973 hardware::Return<void> SampleDriverFloatXNNPACK::allocate( in allocate()
1975 const hardware::hidl_vec<sp<V1_3::IPreparedModel>>& preparedModels, in allocate()
1976 const hardware::hidl_vec<V1_3::BufferRole>& inputRoles, in allocate()
1977 const hardware::hidl_vec<V1_3::BufferRole>& outputRoles, allocate_cb cb) { in allocate()
1981 return hardware::Void(); in allocate()