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Lines Matching refs:reg

185   dex::u4 reg = regs - ins_count;  in GenerateShiftParamsCode()  local
191 move->operands.push_back(code_ir->Alloc<lir::VReg>(reg - shift)); in GenerateShiftParamsCode()
192 move->operands.push_back(code_ir->Alloc<lir::VReg>(reg)); in GenerateShiftParamsCode()
193 reg += 1; in GenerateShiftParamsCode()
197 move->operands.push_back(code_ir->Alloc<lir::VReg>(reg - shift)); in GenerateShiftParamsCode()
198 move->operands.push_back(code_ir->Alloc<lir::VReg>(reg)); in GenerateShiftParamsCode()
199 reg += 1; in GenerateShiftParamsCode()
203 move->operands.push_back(code_ir->Alloc<lir::VRegPair>(reg - shift)); in GenerateShiftParamsCode()
204 move->operands.push_back(code_ir->Alloc<lir::VRegPair>(reg)); in GenerateShiftParamsCode()
205 reg += 2; in GenerateShiftParamsCode()
394 dex::u4 reg = 0; in Apply() local
403 reg = bytecode->CastOperand<lir::VReg>(0)->reg; in Apply()
409 reg = bytecode->CastOperand<lir::VReg>(0)->reg; in Apply()
415 reg = bytecode->CastOperand<lir::VRegPair>(0)->base_reg; in Apply()
437 if (reg == 0 && bytecode->opcode != dex::OP_RETURN_VOID) { in Apply()
442 move_op->operands.push_back(code_ir->Alloc<lir::VReg>(reg + 1)); in Apply()
443 move_op->operands.push_back(code_ir->Alloc<lir::VReg>(reg)); in Apply()
447 move_op->operands.push_back(code_ir->Alloc<lir::VReg>(reg + 1)); in Apply()
448 move_op->operands.push_back(code_ir->Alloc<lir::VReg>(reg)); in Apply()
452 move_op->operands.push_back(code_ir->Alloc<lir::VRegPair>(reg + 1)); in Apply()
453 move_op->operands.push_back(code_ir->Alloc<lir::VRegPair>(reg)); in Apply()
463 scratch_reg = bytecode->opcode == dex::OP_RETURN_VOID ? 0 : reg - 1; in Apply()
478 : code_ir->Alloc<lir::VRegRange>(reg, reg_count); in Apply()
501 check_cast->operands.push_back(code_ir->Alloc<lir::VReg>(reg)); in Apply()
614 vreg->reg += shift_; in Visit()
624 for (auto& reg : vreg_list->registers) { in Visit() local
625 reg += shift_; in Visit()