ELF@@ZX(D@D@D@     }=========$4EddddI,6,,,d&va_priv->swr_clk_lockVA_DEC2 MODEVA_AIF1_CAP MixerSMICva_macro_tx_mixer_getVA SWR_MIC3VA_DEC4 Volume012345673%s: va path index not found va_dec1%s: Failed to add without dec controls ADC_DEFAULTVA DEC4 MUXMSM_DMICVA DMIC2VA DMIC3%s: Setting current failed, err = %d va_dmic3LPI Enable%s: invalid DAPM event %d SWR_DMIC1SWR_DMIC3VA SMIC MUX7%s: regmap is NULL va_dmic7va-vdd-micbVA SWR_MIC2VA SWR_MIC10VA_DEC5 Volume SWR_MICVA DMIC MUX6%s: regulator disable failed, err = %d qcom,va-swr-gpiosva_macro_reg_wake_irqVA_DEC1 VolumeDMIC3VA DMIC6VA SMIC MUX2va_macro_swr_pwr_eventva_dec4va_macro_core_voteva swrm clock users already 0 %s: Failed to add widgets VA SWR_MIC9va_macro_lpi_putVA DEC2 MUXSWR_MIC3va_macro_hw_params%s: failed to get swr pin state VA_DEC3 VolumeVA DEC7 MUXSWR_DMIC2VA SWR_MIC8VA DEC5 MUXVA DMIC7VA DMIC MUX2VA SMIC MUX6va_smic7va_smic1va_macro_enable_txVA_DEC7 VolumeSWR_DMIC4SWR_DMIC6VA DMIC MUX1SWR_MIC6VA_AIF1 CaptureDEC1VA DEC1 MUXDEC6VA DMIC4VA SMIC MUX4va_macro_enable_decZEROva_macro_swr_clk_event_v2va_macro_initVA SWR_MIC1VA_DEC0 VolumeDEC2VA DEC3 MUXVA DEC6 MUXDMIC0SWR_MIC7VA MIC BIAS13%s: va priv data is NULL qcom,is-used-swr-gpiova_macro_lpi_getSWR_MIC5va_dec5%s:regulator not provided in dtsi va_smic3va_swr_masterlpass_audio_hw_voteva_macro_clk_div_getVA_AIF3 CaptureVA_DEC1 MODEVA_DEC3 MODEVA_AIF3 CAPDEC4DMIC2SWR_MIC11%s: clock already disabled va_dec3va_macro_tx2%s: ioremap failed %s:Failed to get micbias supply for VA Mic %d VA SWR_ADC0DMIC4VA SMIC MUX0ADC0VA DMIC MUX4va_macro_mclk_enableva_dmic6va_smic2_v3qcom,va-vdd-micb-currentva_macro_set_port_map%s: Failed to add routes VA_DEC0 MODEva_macro_dec_mode_putVA DMIC1va_dec7va_smic5va_dmic2VA_TX_SWR_CLKva-vdd-micb-supplyqcom,va-dmic-sample-rate%s: could not find %s entry in dt VA SWR_ADC2VA SWR_MIC4VA SWR_MIC63%s: Invalid widget name = %s VA_AIF1 CAPVA DEC0 MUXVA SMIC MUX3va_macro_mclk_eventva_smic3_v3%s: priv is null for macro! %s: va_mclk_users is non-zero still, audio SSR fail!! VA_AIF2 CaptureVA_AIF3_CAP MixerADC3va_dec2va_smic6va_macro_tx_mixer_putva_macro_tx3%s: pdev memory alloc failed is_amic_enabled3%s: Invalid tx path = %s DEC0SWR_DMIC7SWR_MIC4va_macro_put_dec_enumva_smic0va_dmic5%s: DT node for va_priv does not exist qcom,va-vdd-micb-voltageVA DMIC MUX0%s: Setting voltage failed, err = %d %s: regulator enable failed, err = %d va_macro_tx_swr_clk_event_v2va_macro_get_channel_mapva_macro_tx_va_mclk_enableva_swr_ctrlva_macro%s: register macro failed DEC3SWR_MIC2va_dmic13%s: VA dev does not exist %s: null device for macro! %s: Failed to add snd_ctls ADC_LOW_PWRDMIC6VA DMIC MUX7SWR_MIC8%s: va request clock en failed %s: e->reg: 0x%x not expected va_macro_swr_pwr_event_v23%s: Memory for va_priv does not exist regVA SWR_MIC11ADC_HIGH_PERFVA_AIF2 CAPVA DMIC MUX5SWR_MIC1SWR_MIC9va_macro_tx1va_macro_probe%s: could not find %d entry in dt %s: swr_gpios handle not provided! VA SWR_MIC7VA_AIF2_CAP MixerDMIC7ADC2%s: widget not found va_smic0_v2%s, enter SSR up VA SWR_ADC3va_dec6va_macro_add_child_devices%s: cannot add plat data ctrl:%d %s: error reading %s in dt qcom,default-clk-idVA SWR_MIC0VA SWR_ADC1va_macro_path_getDEC5SWR_DMIC0VA DMIC MUX3va_dec0%s: swr request clk failed &va_priv->mclk_lock%s: Failed to add controls DMIC1DMIC5VA SMIC MUX5VA_SWR_PWRVA_SWR_CLKSWR_MIC10va_smic4va_macro_deinitVA SWR_MIC5VA_DEC6 VolumeVA DMIC0ADC1VA SMIC MUX1%s: Invalid TX sample rate: %d qcom,va-without-decimation%s:Looking up %s property in node %s failed va_macro_event_handlerVA_MCLKDEC7SWR_DMIC5SWR_MIC0va_smic2va_dmic4%s: Invalid AIF %s: request clock enable failed %s: Cannot add platform device %s, failed to enable clk, ret:%d VA_DEC2 Volumeva_macro_dec_mode_getVA DMIC5%s: lpass audio hw enable failed va_macro_enable_dmic%s: Invalid DMIC line on the codec va_macro_enable_micbiasva_dmic0va_smic1_v2va_macro_swrm_clockva_tx_unmute_delayqcom,va-macro                            <141,1$111 1181 01 (1  1 1 1 1 1 81 01 (1  1 1 1 1 1 1 1 1 1 j҈8 TȑU,Th=ҨL5^ T|(mT(ȭt(T( ȓTǓhETs҈hqH/, Tj҈8`T(h&CHT( ȓ-#T HHSHT葐U T2H#Ty蝘j(,T(ǓhE T(H˴Hp Td=ҨL5^` T5_! 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