ELFp@@)'        Couldn't enable clock #%d check for TBU power statuscoherentMHF hard iova-to-phys (ATOS)=%pa qsmmuv500_iova_to_phys#global-interruptsUnexpected global fault, this could be serious GFSR 0x%08x, GFSYNR0 0x%08x, GFSYNR1 0x%08x, GFSYNR2 0x%08x 3arm-smmu: Can't trigger faults on non-attached domains #stream-id-cellsTF R SCTLR = 0x%08x ACTLR = 0x%08x impossible number of S2 context banks! failed to request global IRQ %d (%u) calxeda,smmu-secure-config-accesscapture busTNX_TCR_CNTL : 0x%0llx LLCCONFIG_MSM_TZ_SMMU is disabled. Will not work! arm_smmu_context_faultUnhandled context fault: iova=0x%08lx, cb=%d, fsr=0x%x, fsynr0=0x%x, fsynr1=0x%x arm-smmuCouldn't halt TBU! no MEM resource info 3arm-smmu: scm call IOMMU_SECURE_CFG failed Woops, powering on smmu %p failed. Leaking context bank Couldn't halt SMMU! ECATS translation timed out! no translation support! &pwr->power_lockqsmmuv500-tbu3arm-smmu: Failed to rename %s: %d qcom,iommu-faultsLLC_NWAfound %d interrupts but expected at least %d %s: Bad power count error in device link creation between %s & %s mmu-mastersInvalid length for qcom,iommu-geometry, expected %d cells arm_smmu_init_domain_contextcannot attach to SMMU %s whilst already attached to domain on SMMU %s SID=0x%x enabling workaround for Cavium erratum 27704 Unable to compute streamid_masks qcom,skip-initTLB sync on cb%d failed for device %s completedTBU PWR status 0x%x status-regUnhandled arm-smmu context fault! Couldn't get clock: %sstream-match-maskinvTook an address size fault. Refusing to recover. TLB global sync failed! ECATS translation failed! PAR = %llx qcom,testbus-versionMatch_%d : 0x%0llx fastmapHUPCFInvalid VMID is set !! PF R qcom,opt-out-tbu-haltingqcom,actlr&smmu->idr_mutexmissing #global-interrupts property qcom,msm-bus,namearm_smmu_tlb_sync_contextqcom,iommu-vmidqcom,iommu-geometry%s: default domain setup failed attach-impl-defsqcom,disable-atosTCU invalidation %s, TCU sync %s SMR mask 0x%x out of range for SMMU (0x%x) bypassPAR = 0x%pK CBAR = 0x%08x (IDR0.CTTW overridden by FW configuration) stream-matching supported, but no SMRs present! Failed to register iommu arm-smmu-context-faultqcom,deferred-regulator-disable-delayTLB sync timed out -- SMMUV500 may be deadlocked TBU ACK 0x%x TBU PWR 0x%x TCU sync_inv 0x%x atomictcu-baseqcom,fatal-asftranslation fault! stall-disableslave side secure is enforced TBU opted-out for halting! ECATS hw busy! failed to set DMA mask for table walker qcom,iommu-earlymapClient info: BID=0x%x, PID=0x%x, MID=0x%x drivers/iommu/arm-smmu.cTTBR0 = 0x%pK soft iova-to-phys=%pa failed to get irq index %d no regulator info exist for %s basePF W SS ECATS: address too large: %pad ECATS generated a fault interrupt! FSR = %llx, SID=0x%x removing device with active domains! non-arm-smmu global faultUnable to read bus-scaling from devicetree qcom,use-3-lvl-tables&smmu_domain->assign_lock5arm-smmu: deprecated "mmu-masters" DT property in use; DMA API support unavailable __arm_smmu_tlb_sync_timeout_SMMUV2TLBLKF UUT hard iova-to-phys (ATOS) failed regulator defer delay %d Bus client registration failed 4------------[ cut here ]------------ %s: bad clock_ref_count TBU %s ack pending for TBU %s, %s qcom,stream-id-rangeCouldn't prepare clock #%d secure vmid already set!ID:%x IDX:%x is already in a group! PAR = 0x%llx Domain not attached; cannot detach! no-CFREPTE = %016llx &smmu->iommu_group_mutexRegulator notifier request failed qcom,iommu-dmaqcom,iommu-pagetableTF W TTBR1 = 0x%pK stream matching with %lu register groupsfound %d context interrupt(s) but have %d context banks. assuming %d context interrupts. __arm_smmu_tlb_sync_timeout_SMMUV500synccannot set geometry attribute while attached TBU failed probe, QSMMUV500 cannot continue! qcom,no-dynamic-asidpendingWriting 0x%lx to FSRRESTORE on cb %d defaultdisabledTLBMCF MAIR0 = 0x%08x MAIR1 = 0x%08x qcom,regulator-namescannot change procid attribute while attached cannot change dynamic attribute while attached failed to request context IRQ %d (%u) SOFTWARE TABLE WALK FAILED! Looks like %s accessed an unmapped address! clock-namesfailed to request capture bus irq%d (%u) Mask_%d : 0x%0llx 3arm-smmu: Failed to disable %s: %d iova to phys timed out on %pad. software table walk result=%pa. cannot attach to SMMU, is it on the same bus? EF FSR = 0x%08x [%s%s%s%s%s%s%s%s%s%s] 3arm-smmu: fastmap does not support IOVAs >= 4GB qcom,iommu-groupInvalid number of attach-impl-defs registers: %d qcom,no-asid-retentionFAR = 0x%016llx ATOS results differed across TLBIALL... Before: %pa After: %pa &smmu_domain->init_mutexSMMU address space size (0x%lx) differs from mapped region size (0x%tx)! arm_smmu_global_faultcheck pending transactions on TBUcannot change force coherent attribute while attached stream ID 0x%x out of range for SMMU (0x%x) arm_smmu_tlb_sync_global %scoherent table walk &smmu->stream_map_mutexTLB sync timed out -- SMMUV2 may be deadlocked non-fatalInvalid #address-cells %d or #size-cells %d dynamic ASID allocation failed: %d AFF MULTI %s: bad tbu->halt_countUnable to get the tcu-base not probing due to mismatched DT properties qcom,enable-static-cbqcom,enable-smmu-haltCapture_%d_Snapshot_%d : 0x%0llx   "&W*,06:>HLPD\lD8h8tcu_testbus_seltbu_testbus_selforce_stagedisable_bypassarm,smmu-v1arm,smmu-v2arm,mmu-400arm,mmu-401arm,mmu-500cavium,smmu-v2qcom,qsmmu-v500qcom,smmu-v2 @qcom,qsmmuv500-tbu $(*,ȢҨ}h T(`ȔH(c- T(h(Z-T҈$ȇhVmT҈$ȇhV'Tȋhx@'ThZ((Tm҈(aTT֫Hm TɊHB(mTʊHB(#T((r#T[h$TFHh ț Tlȼ,TKĸh: TӔҨȨhx T+H3, T袕HT袃Ҩ}hTʇҨģH(ATUTH`ȔH(c`ThÎҨld(\T( ȓCT=(T(҈(aTȲHTҨ#THh țT0d:(ThH(=ȿ,TH3Th(ձHATHh(Z TĊhKh aTT֫HTȵҨ3(Tlȼ T(ȭt( TTHThP T|(U Tőȥ(|'Tm=( T(HhpT^Ҩ#` T葐U!TWH(=ȿ TLH|hAT =:( ȓ T 0( ȓTA_"( ȓcT  ?T_( ȓ T@9qCT_@*^{ OѴ@@5@9*@ @!H(?R a r)@? jT@@*> S2Sh&)j @OB @{è^__^{ _WOZ@qTZ* 4I.@4!R`4*@*@qkT@" @59cAT@qTR @yv5" T(R*4R QY@QqLT*@!*4ˈ @iv""aT*@@.@4*`5*ODWC_B @{Ũ^__!^{WO@]@@@=ճrb@4 qTQb@9@A @! @4Q @vQ1aTbOBWA{è^__^{g_WOZ@4 qTQZC@9@A @!:@4Q @uQ1aT*@@*RQ+THW@f@Q 4*R}jh* kJTU86*!qb T@`4_*.@4*`5ZODWC_BgA{Ũ^__!^{_WOpb@qT*@qTR @yw`5# T*(Rb*OCWB_A{Ĩ^__*@!*4˨ @iw""aT^{7!7!7!{^__2 qaT R_*_^{ *qT)R(!IR jT@R r6R!Bhbi`!B.hnhrivizhbiR `hhiijByk @{¨^__^{OC@R!R@4@h5_ @)@?T{AOB^__^{og_W O C@7A@ ) T! _)@?vT{E*OJWI_HgGoF^__ @h@X`@* 5Ѽ@&C97@ T@9@B @h@9@C @!:Z*Z46(2@xF@@9tB q@4*@Z_kT @:y @*?q T})a9x6`@i5`@*s@@ qa#T>~A"!*`~A!!C4Z_!`4!4!4!5@@!@@@(@2@h@ RIr * @h@2@2HH69!B7@2!B7@2!B7@2!B7@2!S#R7@h@1T!^!C4Z_!4!@4!5@h@2@h@! @@ 2@ 2!@ 2!c@ ^}*^ kT!#*4c4*KE@)qh Z}`aT}`J;LE@cq Zl}` aT@^j@@!"!*!B  JK}`i F@7)2   @ BT@^_IT @qThRRR29Fyh2@6h72h2@(P7 h2@H7(R2h2@6P6HR.h2@@ rT(R..@H42@*Q_ qT&iMkRR?'_'q  *  *hk:@qMq, qT )' 5)R&l6M q@Tq!Th@9 7  ) R1 R1 *R1 1RR 1HR)rRMHz7@)@)K9I4|Q)y zTh>@{ q.@1T2C94sOH7A{B (@4* @iF@J!J TKyk}@+ le@9,4za@9@9hB@k* Tu:7h@906@)R291THShN( -@*RJ!ښ) -h@907|nHiy"I4kTHFa(D)R_(!ښ_Tjv@*4 jK @kQK jv@)?A*TkF@le@9-4a@9_ kTj@977e9kF@@^%7@ @@@8@7`!ښ (@1T2C9H4**! hv@@j@ B7&)#2 3 4 R @1T2C9h5@1T2C9h5R X8 )!ښ*R)  9 6h@97{hB@R`b R  r*:6`@!*@9@FyhH7@@9&@ R5@*! \K4.@ qT@ R,! zR9z@z^R@ R(! N@H4V@ R+! l@ 2mM.@qT Rmr *l.@ qT@K@ R+! N@KF@yk KR@ R+! jF@yJ j.@_ qT@ R(! @ Z@ R(! ^@ @9@@ @: @zH ȓ bT@?֨@ 9@)4.@?qT@?1aT@9( 07h:@qhT Ra ՠ9h@ * H@99i@j~@`@(( [YhcR*7@@ 1T2C94A(@4) @jF@+RlQ,,ykL @bTk 45@9h@9(76`AC_*h4*`@@9!*R9^@`@!ԵL@|`^{ _WOXhH7u@6A@(x75x@w>@G@C@4*@ kT @)()y* K@4kQqKlT @)~*+ k j @)0i)*@ ȓT?ֳ@ODWC_B @{Ũ^__! Ҁ a^{og_WO@@#h@*1 Th2C94pZn`xb:@ ʼnڭ*@?*_31 Th&C987h@1 T@#t T@ @4jK :@ ʼnڭ@@?ֈ@*@T@j@# I*tt@#T ҷ *"@T_6"@( h@1Th2C9h5` _)@?aT{B*OGWF_EgDoC^__֨ u@Q@))^U4+TqTR r** @ #6#\^{ _WO@vh@1Th2C9h4 h@i&C9@874|@ODWC_B @{Ũ^__5h@1Th2C9h5`wb@]@' .X?h@v@@vx7h@1Th2C95`^{o g _ W O @ @Ѩ>#h@*1 Th2C94@`4@ *(a((78@wkT@VHkT*]#@  @`@]\KC*?*21 T_@*@1T2C95 @_@]hY1T2C9h5 @&C987@@1 T]^@ T@^I*#@ `t @@]@\C*?֨@*@T@^j@I*uu]^T7]7@*kT:H*z"TՆ_6i"@(  u@Q@))^U3+TsqTR r** ^ 6 @]_)3@@@@1T2C9h5] _)@?AT{HOMWL_KgJoI^__^{ WO@q T@a@@ H@?OCWB @{Ĩ^__^{ WO@ @987@ 4OCWB @{Ĩ^__@@ @ ȓT?b@@9h(62@4@@Kĸ`:C^{og _ W O @@9q!ThR@T}At;vA@ ) TULhW @(@@}AT!3@4*7hR@@AT`b!ss(R+[~AB@ 4*U"5vA @* "5@4#@y*#*) @b=_ ja T(@yb}S_(ja T) kT~R! r 4"QR )x)Q?1T!@"R|A @z@WC@@ XC@H4*R)R>@!t^@[@R r~ [@^@[@*u!!*K=@ *JG@~@l J K @kK y@ kB T @J6Jy_1a T6J@wKw@ 4*uq k T](@9-4}@}jmx]-*AJjT@yO=J-jT@yO=JAJ*-jT *7LG@* @5L}Pm]yy9(@9@B @c:@Cc @!URu@#*h?T@ @4* @JG@)()y){Ui)@ kTFu @V4Q *RRRQ1yTm(xOG@ @q T0@9OG@qP}1y})=yOC@/= 9u4@4@ _)@?AT{G*OLWK_JgIoH^_C_3@*^{og_WOCA @ ) ! T @@@ 5@4 M@ A?T @?AT"@ @@B@4*:RRR @ 4y@ k"T @<yF@ @)q !T)@9F@?qI}1y })=yB@h( 9@ @@{AOFWE_DgCoB^__!C^{WO@!A* @@|Ac#qJTc#q T @@5"@4 @F@* k kT,+yk}@l{Lil T @!*@􃀚@h5hR@ ) `T@iThA @@@@ ) T?ր4 _)@?T{BODWC^_C_l^{ WO *QUqT T )+ih8J @@*%R1@* qMM@( @)@9F@*% SC @) %@ M@j4E@y)*: @)@4@*5 S1@*9S-@*@*ES' )C96 @*"@*MS@*QS @)C9h07(@HK9T@*YS @*]S@*aS(R**OCWB @{Ĩ^__^{ _WO *nqTT *) +yJ @֨@4@)R*)! *@ @ @!P@ @h 'C97@ @!@@ @!:@@*) 42@H@@*42@(@@*42v@@1 T!Tk@@ 4@ R*Ir@(4@* 2[@H@!S@(`Ө @ `J @7H2Ȃ@*@A@ 4HR*3>@@*) 427@*+3y0@U@ @@9*@*5"( @)2 @@*y @@*4 2@*9 @? bT@@ T***ODWC_B @{Ũ^__yy@**3yy ^{WORRBRcRv@6uZOBWA{è^__^{O @T@TOA{¨^__^{ OѴ@@5@9*@ @@h !5(}Rr@OB @{è^__^{{^__^{@@{^__^{ @@ @{¨^__^{ WO@@a@@ H@?OCWB @{Ĩ^__^{C@)@?qT(@y?qT @!#R7#@)(A*)@(=3"R @)@?T{A@^__^{ WO@a@ Ϫ?**`OCWB @{Ĩ^__^{_WOCL@ @9 )@ @5@9! 9(7F@yA *a ijtˉ}I G4H {AOEWD_C@^__ 8)ii J q))}Ii(%Ț6g)A8@@6Aͅ7_# ?6A@q@gC)AT@6 8)ii J q))}Ii(%Ț6A8@@Aͅ_# ?A@qT@h6^{ WO@@9p*@ @!W(4!@4@@@99@C @!OCWB @{Ĩ^__^{ _WO$R5Rr7R(@6? *q'" kTt@ h>@q`T qTv@R@R*΄R**4BS4?W57***e! 4`@!YEu* 7Ru** ! 4`@!***`@ )r" r#!`@!*x4 )qJk*7R4u `@(@xi@ J"(@+* TJUS@ T 9@ khT =@  kT( @9@# @ODWC_B @{Ũ^__ 8)ii J q))}Ii(%Ț6A8@@Aͅ_# ?A@qaT@(6O^{ O~A!*@*aT5R**OB @{è^__ D@(|@ @9*Ia@9K)B)i3I3*2, 6 @@R - k@9) 2qJ @)tS,0k,j @@KR - @y@y @9=3 7R- @9K2qJ@) ) _^{WO3@|Av@Bc*5h@aT R1vOBWA{è^__(< Z*H_A_^{WO@  Ѩ (@ 4@@I@9 )@ @ 9@(t)!u) q aT((#@=*) 6jRLT`|R@=*) 77B@7 @t -@#@=*) h6@@ H@ @?!C# !@! _)@?T{BOEWD@^__^{WO@iR@1T0C94 _)@?aT{BOEWD@^__tMT_0@ @@ C#R#RFR@5@Tt@@T Ҷ"T_6"@( !^{WO@iRRC@1)T0C94 _)@?T{BOEWD@^__tNT_0@ @@ #3CRCR&R5@Tt@T Ҷ"T_6"@( !^{ O 4@R (@ @*$(H@- - @@8@-R!*+-tS*4 @@9qn06@y=3 . 8@@qhT @9a *4 `RU @9k07 @y *+|@-4 8@4 Rl% @B Rl% @ @ qT @y RJ@m%  @u5J@4 Rj% J@ Ri% *%C)jI^}ARRrrCr( R[r)r  r Y R r jqi~S)J *) *(* 2OB @{è^__^{ o g _ WO@7@57@ @S )@  ) ɓ?"T?;@#@_T@!Cѣc~HC[ @@93@]S@!**= @*=M1H@! @!^\@@@@ H@]?#@ @! @8@B@!] @!! @!*<h6B1T[>ը\h53R3Rh#4@ _)@?aT{J*OOWN_MgLoK^__ Ҁ a_o @!! @!!^{og_WOCt@@qT@4 @9I7)R 9!h&C9 76@j@9 R*I% ?i@9*@ @)!i)(h@9qT@~@@( AYh` @h@1Th2C9h5`u@wbT Ҷh"T;_h2C9@4!6"@( h@1T@_R rRp{z@@@6@|zHo|!hFy1@Tv@aF@yb` @@h@1Th2C9h5`t@|b T h"@ T_h2C9@h4!6"@( h@1T@_R rRlzz@@@6@{z(k[!h@1Th2C9h5`h@9)R C !ȚH}!h@1`Th2C9(4h@9)R C !ȚH}a@ h@1Th2C9h5`R hByi{AOFWE_DgCoB^_____^{_WO@*1`T2C94@aT@ T!Ѵ"6@( zӓ eZ*OCWB_A{Ĩ^__֗@bT_?T@aT*`2C9H4!_6"@(  Ҩ &5@1T@R rR@ur@b6r^!^{_WO@1T0C9H4OCWB_A{Ĩ^__@RR rR r`P*u@Bsb6Nth2C94!h@1T@#@R Ptz@@w6uzR!Ծ^{WO@ D@y@R @`4!4@!OBWA{è^__ֈ@ @9@I6>ՉD@y _^{WO@@R`4!4@!OBWA{è^__֊@@9$@L)@H @M@9J5@k!M6>+J4j5,@r R ĀRj?q !TD@yILJ=PJ1@ kJ T 44*a _֊D@y |j K )? T r ƀR ǀR LJL  k) T_^{g_WOC@!AB@97 @9i7 @9qT!WRR)R9R r r 9@p|!B@h:@h>@hA6h2@2h2@R* @h?`" T"@!#R Hh "@v hA 7R**`h@( 4~@HVTR~~ r`~qT**@ 7h~@y8TR*@k Th@hBBTh@ !@}Akwi6@(*h6w! @)@?AZT{A*OFWE_DgC@^__!]@!*W?`cT**@5z@h@9w2@i06*@*)5H @(@ qTqT{w !*W{ 6h2@2h2h2@iSjS)J)*rH *@Th2?rT66i:@?qhT2h2xW55:XkAT@7`@!BB`@!:XkT`@!;@6h:@ qTh2@8R2h2h3 S)R8!Qhy{6h2@xr2h2T`@R r`B@2`@!`@7#@Q{*`F0 @9*R|@?qJ T | 0@< T`B!Bxv`!B6h:@qTh2@ 2i2{72h2H RRKR@h @q {SJi!)!ʚK  jT`@"!_Sk`")T`@!&h>@ qT! iB@h@! Ki`B@h@ RR| r`6$H@hqT )(Yh`@!WjRLR+R  ?rL}@i }1y})=yT`F@ @9JRiS?qhnTYiRhrx6i2@)2i2x@ (!Țx GAi ):E@( ҀŹ2@?@5KAx GAi ):A@ ҀŹ2@?4KAxGAhA@z ҀŹ2@?4O`@!h:@qThn@hj@Th/Sq(T )(YhRhj`7;h7p6h2@2h2h2@X6iv@ R*"r) iv R jTiv@ R r) iv@6iv@ R*"rJ{) iviv@H6(R)iv @kv@_) K4 R R,Rmv@)k? JTm@A*@6m@O@r yToB@ySSyy ynF@eS 1?=)!9%9 @y@!͚yСnN1%@ %x@!A@}h7A|}**}A!@7@qKT,JiLl+ ) ?kj1)+T@yq}hJh:@ qTcB@b@k)T!*Wwt@h@-@!h2@2h2;o6h2@2h2w7Pc@4 )*89i~@`@R!h}@5@H kCTh@h@6AT?*5 A`bi`4*!h~@*!yz*~wfhB@hh@907h@ )@)rT  J@*7 R_ aT`@!*2hz i@y  @iy)=S @}Shyt@@9H7h@9h7*Rh@t@ )@4@ )i@ab*4!f:@B @!*7-RR}@_ }@T  @Ml7ő |'^{Od@@4%@#"RTbRT`B!b6@@*RUSv( @@-@*OA{¨^__^{O\@@*5@*OA{¨^__^{ WO4@@USv!@ 4@ @)US)vI )!(@97hv@(4**hv@kCTh>@qTh@ߟRr AJ@ @i _ ri)2 hB@h4?R*rhB@kbTh*@i @*"*7(bh>@qT @)y   Ih6@j@ yRUSvH@)@9rʆR ?qi2@Rj **Sw@)} SJ) *tR * 2`4!4`@!>h6@i@USv(h@(@!T?OCWB @{Ĩ^__@3^{O@@@h4* R Rk6@ -)j)kB@ kCThJAh4*(i@K)@)) *iJA kTh*@i@RH!(( @)y OA{¨^__^{ g_WO@@`4|@J+@@9 @R!h!9(J-M@(#2M*R +@ @!:(pR(9rH@=*) (7 TH@=*) 7@!(c @ :@H{(:+@ @RH!(( @)y @@OEWD_CgB @{ƨ^__^{C@ @9 R 5@ @)@*) <@(!(J)@ h@ )  ) ɓ?T?{A^__# Ҁ a#@^{ O(@ @RH!(( @)2 (@ @H!4(pR(9r@=*) (7 T@=*) 7`@!OB @{è^__^{ _WO@RR r` `BB@R  @? b T`@@!}A@ Z.@ @iI @9H 07@@!~A`~A!R7*(G R*~ r@qT@9) Z y@) Z y @2) Z 1T+@A @)y @(7`~A51q@ `!*ODWC_B @{Ũ^__!C^{og_WO@Ѩ A9t@4h@A9@y *@@j@9+R Ri!L~) @t@(dӡ!4@!C@@Ti@9*@ @>)!|){@Ti;@?khTj?@I ?kT`@ 4 _)@?$T{COHWG_FgEoD^_C_h @!}A` @!yhG@h48h@i@9w@ )@ @@k2)!) a*@J6 @lu *> !*R* ԐR(rh@=*) (7 Th@=*) 7` @!@y(RhG@wc@?R* r T>Ո6#)R h@@h@ R  kaT?R*&#Rrh@@vi@(h@_! h@  h@aԐR(rh@@6@jATT` @!(R*i@)6@@75־L` @ *!*` @!>՚6@)R i@?q)a(i@)!(h@@i@U(hT9@h@@ R @)@? kTi@** @iG@(qT5h @9@A @!%ԐR(rh@@=*) q`TTh@@=*) qT` @!h@ @)y GhGh@@=s@^{OC@ A@9h4h@9*@ @k>@ @!H( h@ )  ) ɓ?T?{AOB^__ Ҁ a@^{WOA @@@*@I5<@R rR`a*@4RR,Rnl9*@A)"T@4 @@*@9 9  @@y1B@@y!ByBD C@yB@ycJB*"jT!kTm@9 4m@kT*OBWA{è^__`^{{^__^{ OT@(\@4@ssa@`6*uR!*OB @{è^__^{_WO@R R rԃ!Bt@^!~A*q`T*R} r` @~A!* h @8@ T}Rsgt@!~A*q`*mTRR| r``~Au!#R7@!~A!*Ri@}6!i(*a*@b@4|@)*t@!~A `@``.@5!@w~@`|@!w4~@!OCWB_A{Ĩ^__^{_WO @4@54@`4*-VSv! A Q@5@V@a@4!4`@!! 4`@!****>4Rs@*OCWB_A{Ĩ^__C^{WOC@?@`T T`t@@qTR @yv 5" Tt@@5@TT!@!*4ˈ @iss""aTh@906`A*@*H5h*@i@RH!(( @)y `@s@h@4Qh @tQ1aT @)@?T{AODWC@^_ RC_^{g_WOC@@R R r @B@R?cTaB@R?cT*T`A! @!qK T@ Z:@ Z>R*`R~~ r&qT*!9*7&@~Ri)&@ @ii 5_T?Tuf@ *@jJ**( @*I v @)@?AT{A*OEWD_CgB^__!*V&@*!yw*^{W O @6A>=<@5`@4* _)@?!T{H*OJWI^__Ѣ#t@Ԫ@` @!*` @^"R4R` @\"R` @^BR` @]BR` @_bR` @]bR` @@"R#R` @ @"RCR` @@BR#R` @@BRCR` @@bR#R` @@bRCR` @@R#R` @#@RCR    )߈߈߈I< 0> ߈H ߈߈߈)߈J߈ ߈߈߈߈J߈ ߈ ߈߈ ߈M߈H߈H߈ ߈:߈ ߈ ߈߈߈߈ ߈߈߈߈*߈ ߈h߈h߈߈߈߈߈߈6ȩ߈߈߈߈ ߈߈߈5߈V߈߈ ߈ ) a   *      W  r  9            ^{WOC@9h6*!*`5!4*{A*OCWB^__(R9ijtˉ}I G(H @9qT 8J)ij k*?qJJ}jjI%ɚ6A8ը@@ӆA@_`%}@`?ӆA@qT@h6^{{^__author=Will Deacon description=IOMMU API for ARM architected SMMU implementationsparm=disable_bypass:Disable bypass streams such that incoming transactions from devices that are not attached to an iommu domain will report an abort back to the device and will not be allowed to pass through the SMMU.parmtype=disable_bypass:boolparm=force_stage:Force SMMU mappings to be installed at a particular stage of translation. A value of '1' or '2' forces the corresponding stage. All other values are ignored (i.e. no stage is forced). Note that selecting a specific stage will disable support for nested translation.parmtype=force_stage:intlicense=GPL v2parmtype=tbu_testbus_sel:intparmtype=tcu_testbus_sel:intalias=of:N*T*Carm,smmu-v1alias=of:N*T*Carm,smmu-v1C*alias=of:N*T*Carm,smmu-v2alias=of:N*T*Carm,smmu-v2C*alias=of:N*T*Carm,mmu-400alias=of:N*T*Carm,mmu-400C*alias=of:N*T*Carm,mmu-401alias=of:N*T*Carm,mmu-401C*alias=of:N*T*Carm,mmu-500alias=of:N*T*Carm,mmu-500C*alias=of:N*T*Ccavium,smmu-v2alias=of:N*T*Ccavium,smmu-v2C*alias=of:N*T*Cqcom,qsmmu-v500alias=of:N*T*Cqcom,qsmmu-v500C*alias=of:N*T*Cqcom,smmu-v2alias=of:N*T*Cqcom,smmu-v2C*intree=Yname=arm_smmuvermagic=4.19.191-gc2161d44afae-ab7624114 SMP preempt mod_unload modversions aarch64depends=msm_bus,qtee_shm_bridge,iommu-logger,secure_buffer,arm-smmu-debugiommu_get_fault_ids$$S0?module_layoutdmemsetg__stack_chk_guard__stack_chk_failȗ|__ll_sc_atomic_add_returnpg__ll_sc_atomic64_fetch_orw__ll_sc_atomic64_andnotAL__tracepoint_smmu_init2T,amba_bustypeOFplatform_bus_type?pci_bus_type(__tracepoint_tlbsync_timeout.__tracepoint_tlbi_endNY__cpu_online_mask*zcpu_number>M__tracepoint_tlbi_startkimage_voffsetވmemstart_addr?bkmalloc_cachesWdummy_dma_ops..%[iommu_debugfs_topTparam_ops_boolparam_ops_intwkiommu_group_set_iommudata;Ziommu_group_get_iommudatasof_property_count_elems_of_sizehdevice_for_each_childcrof_platform_populateRbdevm_ioremapѣfind_next_bit]idr_destroyH'vmsm_bus_scale_unregister_clientC]regulator_register_notifierHpci_request_acsڸ=bus_set_iommuu-6iommu_presentmsleepnOiommu_dma_get_resv_regions#xiommu_alloc_resv_regions}.bus_for_each_devsgeneric_device_groupyCpci_device_group mMiommu_group_ref_get68iommu_group_remove_device~iommu_group_get_for_dev6put_device%driver_find_device of_phandle_iterator_nextǦof_phandle_iterator_initcDiommu_fwspec_add_idsAof_phandle_iterator_args@(iommu_fwspec_initvpci_for_each_dma_alias7driver_for_each_device$Eiommu_fwspec_freexJ'device_link_del Adevice_link_addysg_next:n__free_pages__alloc_pages_nodemaskreport_iommu_fault idr_alloc_cyclicarm_smmu_debug_get_capture_snapshotlJarm_smmu_debug_get_mask_and_matchb;Iarm_smmu_debug_get_tnx_tcr_cntlydevm_kmalloc<7devm_request_threaded_irqkplatform_get_irq/ƶplatform_get_resourcetof_get_propertyQ devm_ioremap_resource2platform_get_resource_bynameVplatform_driver_unregister87__platform_driver_register,__cfi_slowpathk}__udelay__const_udelaye?ktime_get@regulator_disable_deferreda'__warn_printkclk_disableUclk_enable 8_raw_spin_unlock_irqrestore vQ_raw_spin_lock_irqsave2|printk wclk_unpreparezw_dev_errqs|clk_prepare_W4Rregulator_disablegX regulator_enableC{msm_bus_scale_client_update_requestregulator_bulk_disable2: mutex_unlock֮Amutex_lockLinuxarm_smmuGNU! J|(J4 0J XJ4 `J \]J J _`LbaW W cd^_] W $ W ( ep f W W j i g( \X W\ W` j d k W W e W W `0 eD _T ]t W x W | e f h g@ WD WL c` i     I  I      I  I       I  I L HP H` h Wl Hx W| H ~ W H W H ~ (8H\dJtRltxIIWMWMc\J|t\]WWc]8\JC]J|J4 J4 J WWW W  W}$W}4W 8W @HWLWT\WG `WG hpWtW|WWcWWz W$Wz ,@WDW HWLW ThWlWpWtW|WWWWWWWWW2 W2 jW W W$W4W68W6@HWLWT\W`WhW%W%cW W WgWgt 4W`8W`@cWWcW W cW{WW{Wc,W0W`WhW0lW0WWWW@IXDIXt\(]H]dWhWlj\JF]@\`l]xW9|W9cJIJ<J<tJWJWw]P`WdWhe|W-W-cJtR]W W eWWeoHJ|PW~ TW~ `chJ \]JHJH,J4 4J TW XW \eh]o \ f8 o` g f o4!gd!!!JF!]!!<"\"x""J|#J 0#\<#f\#o|#g#J4 #J #JF#JLH#]##\$\$$$f%oL%g%]%J|"%\%f,&o&g&&L'l''JF']'J|"'(4(x(f(o(g)J|L)J(P)J()f)g)J4 )J )JDE)o* *,*H0*H\*`**I*I*W4*W4**Jd*Jd*I*I*+J +J,+@+ID+IP+x+J|+,<,\H,\h,Jdl,Jdp,Ix,I,,,,,,,W\,W\-W-W-cL.W%P.W%X.c.]..\..] /IP/I/]/]///J4 /J ///0J4 0J $0X0I\0Ix0J|00\0I0JC81Ix1]1111J4 1J 1W 1W 1e112W2W(24282Jd<2@2JdL2X2\2Jd`2d2Jdp22WK 2WK 2c23$3(383@3t3JDx3JD33333o$4\84W<4W5]6\6W06W0p6Wt6W6W6W6W6WL7W2 P7W2 T7j7W%7W%7ch8J|8J4 8J 9]9W9W9e9990:x:J|:WW:WW:c::J4 :J :W:W:e;Jd=(;J|X;J4 `;J ;f;o;g(<,<\<W`<Wp<<<<<=f =o<=g=l=J?=l >(>0>4>l>(p>(>o>>>>>?( ?(D?ox??f?J8@?I?W=?I?W=?@Wi @Wi@c@g@n@@@AI0 AW $AI0(AW ,A8AWXL `J>dL$lJt@pL(xJB|L,JEL0JEL4JFL8J8FL<J@LL@JLLDJLLHJLLLJXMLPJMLTJMLXJM L\JNL` JO$Ld,J8O0Lh8JPO<LlDJtOHLpPJOTLt\JO`LxhJOlL|tJOxLJ VLJ@VLJ_LJ0bLJbLJcLJeLJ fLJ iLJiLJhiLJxiLJ@jLJk L(J(0J=8J>@HJ@PJBX IIqII qJQW I(W08HHPWX`pIxWIJ8W`WJxJ|W@WXW`JJJJJJJĆJȆ(J(0J,8J@J̆HJІPJԆXJ؆`J܆hJJJJJJ0JJXJP`J hJTpJxJ 0@J HJ4PJ<`J$pJ8xJ@JDJHJJLJJJXJJL J(J0JX8J@J\HJPJHIHpI8IIII(xJJJ W0WW @WZPW `WpWWW:WxJJAndroid (7284624, based on r416183b) clang version 12.0.5 (https://android.googlesource.com/toolchain/llvm-project c935d99d7cf2016289302412d708641d52d2f7ee)2%#  ;  ; #    P ! z#    5 _# , 8 D P \ ; ;# h t ;  ; r$ ; y! ; & ;  ;  ; W$ V!  ;  ; ($ ; Q ; < ;    W ; #  i A  %  "  m (# 4 @ L Xs# d p | . X#    ! : 3 / ;  $#     $" 0y <d HZ T `" lJ x5 " o " ; &   K  0 J # #  ! ; c 0,(d$ #k!      \ ; I$"H!r]0S   0$X"!C X. `hX <#" (8`p  D$# H `"  [(3$ ;  ## ; M ! ;  " ; ^$ H]! 0XC09 T} ` = l(H x{ ;   > # $ , +% 8" <C F( @H LH It I# 4 $ K! @ D H L$ P! Tw Xp \l ` $ d! h\ lU pQ t$ x! |A : \R6 pR tR # R S `T 4U U #   Vk V Va V W" X'! X lY Y2 Y xZv Z d # $[" \6 !  [ n"    7 " $ # 3  tj! Dk k # $ !    nI !$ n! p i e $ !  LpU pN J ~$ 4# q    sk$ sr!    w P$ O!    $ t !$ ( ! , 0 4 8s # < x @w D H<  # Lg" y 4z {b { (|:  P$ % T" X \  ` ] Lf# $# !    }  y B Ć$ Ȇl# ̆! І Ԇi ܆ b  ^ '  $ Q# !  N  G $ (C <  D$ H-# d! t x3    x!  B# ! H d A |" #= 8( (y$ )'# (0 1- 1 3 5 X7  #  9 :r P: :h ; 8; t;& |/$ <" <.! d= = > $ $" ? 8@ ( @ ,b pC# Cu" D E 4Ep DEH 0 4$ ; "% ; : ;  ;  ; ) ; # ; - ;  ; R ; ; $ ; * ;  ; d ; ! ;  ; ! ; H# ;  ; R ; $ ;  ; c! ; x ; n5$-"I4!c^I?'$E "e!~))?vhC `{"{ NU$ EL DE2 8@80((  pC| D/M JU(((:   N    j P(6 x(q p+# % )0 V FX h t ^ - K( L\y tR@U- q!!! \\R!  1C tj9 kxt 8;<    3 5=  ;( XP 9x[ (/(< (|.( 8(N (q t; <O   #h 4E9 X <G h `8 DkT_ 4    |F  :Dy (0 (" 0(i  (D" d=  Y $[ xZ$ ?l(( Z  : D P: LH\3  |"T  IK Cy$O & ( ]TX(` V V  V] ($O n Lpi n q8  4zP y( s {M K     {  4" r >      $ #W {0  ;o) ZR !  b ^A+n   bU\  t  }  8d % Tdy ~ bkW  A 9, R% "B  "    x8(`( L *%A  +  Xr=f  :  $  D  7  <  HZ  (#.note.Linux.rela.exit.text.rela.init.text.comment.altinstr_replacement.init.plt.bss.rela.rodata.arm_smmu_s1_tlb_ops.rela.altinstructions__versions__ksymtab_strings.rela.text.iommu_get_fault_ids.rela___ksymtab+iommu_get_fault_ids.rela___kcrctab+iommu_get_fault_ids.rela.data.qsmmuv500_tbu_driver.modinfo.rela__param.note.GNU-stack.llvm_addrsig.text.ftrace_trampoline.rela.gnu.linkonce.this_module.rela__jump_table.rela__bug_table.note.gnu.build-id.shstrtab.strtab__ksymtab.symtab__kcrctab.rodata.dataof_get_propertyof_find_propertyidr_destroyarm_smmu_init_power_resources.__keyarm_smmu_device_dt_probe.__keyarm_smmu_device_cfg_probe.__keyarm_smmu_domain_alloc.__keyof_property_read_variable_u32_array__const_udelay__udelayarm_smmu_power_off_slowiommu_group_get_for_devarm_smmu_attach_devarm_smmu_detach_devbus_for_each_devbus_set_iommumsm_smmu_tlb_inv_contextarm_smmu_destroy_domain_contextarm_smmu_tlb_sync_contextof_phandle_iterator_nextsg_nextiommu_group_put__tracepoint_tlbsync_timeoutmsm_bus_scale_client_update_request__tracepoint_tlbi_start__ll_sc_atomic64_andnotarm_smmu_debug_get_capture_snapshotcavium_smmu_context_countparam_ops_intiommu_presentof_dma_is_coherentarm_smmu_is_iova_coherentmsm_bus_scale_unregister_clientmsm_bus_scale_register_clientreport_iommu_faultarm_smmu_context_faultarm_smmu_trigger_faultarm_smmu_global_fault__qsmmuv2_halt__mutex_init__tracepoint_smmu_initarm_smmu_bus_initof_phandle_iterator_initqsmmuv500_arch_initiommu_fwspec_init___ratelimitfind_next_bitfind_next_zero_bitmemsetkimage_voffsetarm_smmu_device_resetqsmmuv2_device_resetiommu_group_getdevm_regulator_bulk_getdevm_clk_getiommu_group_ref_getktime_getarm_smmu_free_pages_exactarm_smmu_alloc_pages_exactarm_smmu_iova_to_physhyp_assign_physarm_smmu_debug_clear_intr_and_validbits__param_str_disable_bypass__param_disable_bypassarm_smmu_tlb_sync_context._rsarm_smmu_context_fault._rsarm_smmu_global_fault._rsqsmmuv500_iova_to_phys._rsarm_smmu_tlb_sync_global._rs__arm_smmu_tlb_sync_timeout_SMMUV2._rs__arm_smmu_tlb_sync_timeout_SMMUV500._rsarm_smmu_opsmsm_smmu_gather_opsarm_smmu_pm_opsqsmmuv2_arch_opsqsmmuv500_arch_opsfree_io_pgtable_opsalloc_io_pgtable_opsarm_smmu_s1_tlb_opsdummy_dma_opsarm_smmu_options____versionsarm_smmu_put_resv_regionsarm_smmu_get_resv_regionsiommu_dma_get_resv_regionsof_n_addr_cellsof_n_size_cellsarm_smmu_disable_config_clocksarm_smmu_enable_config_clocksof_phandle_iterator_argskmalloc_caches__free_pagesarm_smmu_init_power_resources__module_depends__crc_iommu_get_fault_ids__kstrtab_iommu_get_fault_ids__ksymtab_iommu_get_fault_idsiommu_fwspec_add_idspci_request_acspci_for_each_dma_aliasarm_smmu_domain_set_attrarm_smmu_domain_get_attriommu_domain_get_attr_dev_err__ll_sc_atomic64_fetch_ordebugfs_testbus_dirdebugfs_capturebus_dirarm_smmu_driverqsmmuv500_tbu_driverplatform_driver_unregisteriommu_logger_unregisterqsmmuv500_tbu_register__platform_driver_registeriommu_logger_registeriommu_device_registerof_property_read_string_helperregulator_notifierregulator_register_notifiercpu_numbermemstart_addr__typeid__ZTSFyP12iommu_domainyE_global_addr__typeid__ZTSFvPvE_global_addr__typeid__ZTSFiP6deviceP11iommu_groupE_global_addr__typeid__ZTSFvP15arm_smmu_deviceE_global_addr__typeid__ZTSFiP15arm_smmu_deviceE_global_addr__typeid__ZTSFvP15arm_smmu_domainP6deviceE_global_addrplatform_get_irqdevm_free_irqdevm_request_threaded_irq__bus_lookup_iommu_grouparm_smmu_device_grouppci_device_groupgeneric_device_groupqsmmuv500_device_groupiommu_debugfs_topstrcmpmsleeparm_smmu_unmapdevm_ioremaparm_smmu_map_dev_info__ll_sc_atomic_add_return_dev_warniommu_alloc_resv_regionarm_smmu_power_onarm_smmu_tlbi_domainarm_smmu_debug_get_tnx_tcr_cntlparam_ops_bool__stack_chk_fail__cfi_check_fail__param_str_tcu_testbus_sel__param_tcu_testbus_sel__param_str_tbu_testbus_sel__param_tbu_testbus_seldevice_link_del__warn_printk__alloc_pages_nodemask__cpu_online_maskarm_smmu_write_context_bankmutex_unlockmutex_lock__cfi_check__cfi_slowpatharm_smmu_debug_capture_bus_matcharm_smmu_of_matchqsmmuv500_tbu_of_matcharm_smmu_debug_get_mask_and_matcharm_smmu_map_sgof_prop_next_stringof_property_match_stringof_property_read_stringusing_legacy_bindingusing_generic_bindingscm_restore_sec_cfgof_property_count_elems_of_sizeidr_removearm_smmu_device_remove_raw_spin_lock_irqsavearm_smmu_iova_to_pteclk_set_rateclk_get_rateclk_round_ratearm_smmu_of_xlateof_platform_populate_raw_spin_unlock_irqrestoreclk_unprepareclk_prepareamba_bustypeplatform_bus_typepci_bus_typearm_smmu_pm_resumearm_smmu_write_smeplatform_get_resource_bynameinit_module__this_modulecleanup_module__find_legacy_master_phandleof_parse_phandlearm_smmu_unassign_tablearm_smmu_assign_table__mod_of__arm_smmu_of_match_device_tableregulator_disableregulator_bulk_disableclk_disablearm_smmu_capableregulator_enableclk_enablefast_smmu_put_dma_cookieiommu_put_dma_cookie__param_str_force_stage__param_force_stagedevm_kfreearm_smmu_domain_freeiommu_fwspec_freearm_smmu_match_nodeplatform_get_resourcedevm_ioremap_resourceput_devicedriver_for_each_devicearm_smmu_remove_deviceiommu_group_remove_devicedriver_find_devicearm_smmu_add_device_dev_noticepreempt_schedule_notracekmem_cache_alloc_traceqsmmuv500_tbu_probearm_smmu_device_dt_probe__stack_chk_guard__arm_smmu_iova_to_phys_hardqsmmuv2_iova_to_phys_hardqsmmuv500_iova_to_phys_hard__tracepoint_tlbi_enddevice_for_each_child__arm_smmu_get_pci_sidarm_smmu_tlb_sync_vmid__list_del_entry_valid__list_add_validregulator_disable_deferredarm_smmu_init.registeredarm_smmu_destroy_domain_context.__warneddevice_link_addscm_io_readdevm_kmalloc__kmallocarm_smmu_domain_allocmsm_smmu_tlb_inv_range_nosyncarm_smmu_tlb_inv_range_nosyncarm_smmu_tlb_inv_vmid_nosyncmsm_smmu_tlb_sync__arm_smmu_tlb_syncarm_smmu_power_on_atomicarm_smmu_power_off_atomicidr_alloc_cyclicqsmmuv2_init_cbqsmmuv500_init_cbiommu_group_set_iommudataiommu_group_get_iommudataqsmmuv500_release_group_iommudatamsm_bus_cl_get_pdataof_device_get_match_data$d.299$x.199$d.99$d.389$d.289.Ltmp189$x.189$x.89$d.379$d.279$x.179$d.79__UNIQUE_ID_alias69$d.369$d.269$x.169$x.69__UNIQUE_ID_alias59$d.359$d.259$x.159$x.59.Ltmp49$d.349$x.249$x.149$x.49.Ltmp39$x.339$d.239$d.139$x.39$x.329$d.229$d.129$x.29$x.319$x.219$d.119$d.19$x.309.Ltmp209$d.209$x.109$d.9$x.298$d.198$x.98$d.388$x.288$d.188$x.88$d.378$x.278$x.178$x.78__UNIQUE_ID_alias68$d.368$x.268$d.168$x.68__UNIQUE_ID_alias58$d.358$x.258$d.158$d.58$d.348$d.248$x.148$x.48$x.338$x.238$x.138$d.38$x.328$x.228$x.128$x.28$x.318$d.218$x.118$x.18$x.308$x.208arm_smmu_domain_alloc.__key.108$x.108$d.8$d.397$d.297$x.197$d.97$d.387$d.287__UNIQUE_ID_license187$x.187$d.87$d.377$d.277.Ltmp177$x.177$d.77__UNIQUE_ID_alias67$d.367$d.267$x.167$x.67__UNIQUE_ID_alias57$d.357$d.257$x.157$x.57$d.347$x.247$d.147$x.47$x.337$d.237$d.137$x.37$x.327$d.227$d.127$x.27.Ltmp17$x.317$x.217$d.117$d.17$x.307$d.207$d.107$x.7_note_6$d.396$x.296$d.196$x.96__UNIQUE_ID_tbu_testbus_seltype86$d.386$x.286__UNIQUE_ID_author186.Ltmp186$d.186$x.86$d.376$x.276$x.176$x.76__UNIQUE_ID_alias66$d.366$x.266$x.166$x.66__UNIQUE_ID_intree56$d.356$x.256$d.156$d.56.Ltmp46$d.346$d.246$x.146$x.46$x.336$x.236$x.136$d.36$x.326$x.226$x.126$x.26$x.316$x.216$x.116$x.16$d.306.Ltmp206$x.206$x.106$x.6$d.395$x.295$x.195$d.95__UNIQUE_ID_tcu_testbus_seltype85$d.385$d.285__UNIQUE_ID_description185$x.185$d.85$d.375$d.275$d.175$d.75__UNIQUE_ID_alias65$d.365$d.265$x.165$x.65.Ltmp55__UNIQUE_ID_name55$d.355$d.255$x.155$x.55$x.345$x.245$d.145$x.45$x.335$d.235$d.135$x.35$x.325$d.225$d.125$d.25$x.315$d.215$d.115$x.15$x.305$x.205$x.105arm_smmu_global_fault._rs.105$d.5.Ltmp394$d.394$x.294$d.194$x.94__UNIQUE_ID_disable_bypass84$d.384$x.284$d.184$x.84$d.374$x.274.Ltmp174$x.174$x.74__UNIQUE_ID_alias64$d.364$x.264$x.164$x.64__UNIQUE_ID_vermagic54$d.354$x.254$d.154$x.54$x.344$d.244$x.144$x.44$x.334$x.234$x.134$d.34$x.324$x.224$x.124$x.24$x.314$x.214$x.114$d.14$d.404$x.304$x.204$d.104$x.4$d.393$x.293$x.193arm_smmu_device_cfg_probe.__key.93$x.93__UNIQUE_ID_disable_bypasstype83$d.383$d.283.Ltmp183$x.183$d.83$d.373$d.273$d.173$d.73__UNIQUE_ID_alias63$d.363$d.263$x.163$x.63$d.353$d.253$x.153$x.53$x.343$x.243$d.143$d.43$x.333$x.233$d.133$x.33.Ltmp23$x.323$d.223$d.123$d.23$x.313$d.213$d.113$x.13$d.403$d.303.Ltmp203$x.203.Ltmp103$x.103$d.3cavium_smmuv2qcom_smmuv2arm_smmu_s2_tlb_ops_v2smmu_generic_v2arm_smmu_tlb_inv_context_s2$d.392$x.292.Ltmp192$d.192$x.92__UNIQUE_ID_force_stage82$d.382$x.282$d.182$x.82__UNIQUE_ID_alias72$d.372$x.272$x.172$x.72__UNIQUE_ID_alias62$d.362$x.262$d.162$d.62.Ltmp52$d.352$x.252$d.152$d.52$x.342$d.242$x.142$x.42.Ltmp32$x.332$x.232$x.132$d.32$x.322$x.222$x.122$x.22$x.312.Ltmp212$x.212$x.112$d.12$x.302$d.202$x.102$x.2arm_smmu_s2_tlb_ops_v1smmu_generic_v1arm_smmu_tlb_inv_context_s1$d.391$x.291$x.191$x.91__UNIQUE_ID_force_stagetype81$d.381$d.281$x.181$x.81__UNIQUE_ID_alias71$d.371$d.271$x.171$x.71__UNIQUE_ID_alias61$d.361$d.261$x.161$x.61$d.351$d.251$x.151$x.51$x.341$x.241$d.141$x.41.Ltmp331$x.331$d.231$d.131$x.31$x.321$d.221$d.121$x.21$x.311$d.211$d.111$x.11arm_mmu401$d.301$x.201$d.101$x.1$d.390$x.290$d.190$x.90$d.380$x.280.Ltmp180$x.180$x.80__UNIQUE_ID_alias70$d.370$x.270$d.170$x.70__UNIQUE_ID_alias60$d.360$x.260$d.160$d.60$d.350$x.250$d.150$x.50$x.340$x.240$x.140$d.40$x.330$x.230$x.130$x.30.Ltmp20$x.320$x.220$x.120$x.20.Ltmp10$x.310$x.210$x.110$x.10qcom_smmuv500arm_mmu500$x.300$d.200.Ltmp100$x.100$d.0@PX`QLjV0 2p '06d ,"806S?DX$@@@&@& |@zP& @@& @&@ & @ȓ&@X0&?@&@P&[@XH& @0&-0Н\LonrL@G(Y 37%