; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=core-avx2 -mattr=+avx2 | FileCheck %s ; CHECK: vpandn ; CHECK: vpandn %ymm ; CHECK: ret define <4 x i64> @vpandn(<4 x i64> %a, <4 x i64> %b) nounwind uwtable readnone ssp { entry: ; Force the execution domain with an add. %a2 = add <4 x i64> %a, %y = xor <4 x i64> %a2, %x = and <4 x i64> %a, %y ret <4 x i64> %x } ; CHECK: vpand ; CHECK: vpand %ymm ; CHECK: ret define <4 x i64> @vpand(<4 x i64> %a, <4 x i64> %b) nounwind uwtable readnone ssp { entry: ; Force the execution domain with an add. %a2 = add <4 x i64> %a, %x = and <4 x i64> %a2, %b ret <4 x i64> %x } ; CHECK: vpor ; CHECK: vpor %ymm ; CHECK: ret define <4 x i64> @vpor(<4 x i64> %a, <4 x i64> %b) nounwind uwtable readnone ssp { entry: ; Force the execution domain with an add. %a2 = add <4 x i64> %a, %x = or <4 x i64> %a2, %b ret <4 x i64> %x } ; CHECK: vpxor ; CHECK: vpxor %ymm ; CHECK: ret define <4 x i64> @vpxor(<4 x i64> %a, <4 x i64> %b) nounwind uwtable readnone ssp { entry: ; Force the execution domain with an add. %a2 = add <4 x i64> %a, %x = xor <4 x i64> %a2, %b ret <4 x i64> %x } ; CHECK: vpblendvb ; CHECK: vpblendvb %ymm ; CHECK: ret define <32 x i8> @vpblendvb(<32 x i1> %cond, <32 x i8> %x, <32 x i8> %y) { %min = select <32 x i1> %cond, <32 x i8> %x, <32 x i8> %y ret <32 x i8> %min } define <8 x i32> @allOnes() nounwind { ; CHECK: vpcmpeqd ; CHECK-NOT: vinsert ret <8 x i32> } define <16 x i16> @allOnes2() nounwind { ; CHECK: vpcmpeqd ; CHECK-NOT: vinsert ret <16 x i16> }