| /external/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.h | 796 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); in isLegalAddressImm() local
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| D | ARMBaseRegisterInfo.cpp | 514 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); in getFrameIndexInstrOffset() local
701 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); in isFrameOffsetLegal() local
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| D | Thumb2InstrInfo.cpp | 526 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); in rewriteT2FrameIndex() local
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| D | ThumbRegisterInfo.cpp | 370 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); in rewriteFrameIndex() local
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| D | ARMLoadStoreOptimizer.cpp | 2665 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); in isLegalOrConvertableAddressImm() local
2741 unsigned AddrMode = (MCID.TSFlags & ARMII::AddrModeMask); in createPostIncLoadStore() local
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| /external/llvm/lib/Target/ARM/ |
| D | ARMBaseRegisterInfo.cpp | 452 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); in getFrameIndexInstrOffset() local
641 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); in isFrameOffsetLegal() local
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| D | Thumb2InstrInfo.cpp | 458 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); in rewriteT2FrameIndex() local
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| D | ThumbRegisterInfo.cpp | 362 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); in rewriteFrameIndex() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMBaseRegisterInfo.cpp | 500 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); in getFrameIndexInstrOffset() local
686 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); in isFrameOffsetLegal() local
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| D | Thumb2InstrInfo.cpp | 479 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); in rewriteT2FrameIndex() local
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| D | ThumbRegisterInfo.cpp | 371 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); in rewriteFrameIndex() local
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| /external/llvm/include/llvm/Target/ |
| D | TargetLowering.h | 1590 struct AddrMode { struct
1595 AddrMode() : BaseGV(nullptr), BaseOffs(0), HasBaseReg(false), Scale(0) {} in AddrMode() argument
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/Disassembler/ |
| D | MSP430Disassembler.cpp | 142 enum AddrMode { enum
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| /external/llvm-project/llvm/lib/Target/MSP430/Disassembler/ |
| D | MSP430Disassembler.cpp | 142 enum AddrMode { enum
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| /external/llvm-project/lldb/source/Plugins/Instruction/ARM64/ |
| D | EmulateInstructionARM64.h | 76 enum AddrMode { AddrMode_OFF, AddrMode_PRE, AddrMode_POST }; enum
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| /external/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| D | HexagonBaseInfo.h | 30 enum AddrMode { enum
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| D | HexagonBaseInfo.h | 35 enum AddrMode { enum
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| /external/llvm-project/llvm/lib/CodeGen/ |
| D | ImplicitNullChecks.cpp | 380 auto AddrMode = *AM; in isSuitableMemoryOp() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMBaseInfo.h | 185 enum AddrMode { enum
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| /external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| D | HexagonBaseInfo.h | 83 enum AddrMode { enum
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| /external/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMBaseInfo.h | 185 enum AddrMode { enum
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| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMBaseInfo.h | 235 enum AddrMode { enum
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | TargetLowering.h | 2167 struct AddrMode { struct
2172 AddrMode() = default; argument
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| /external/llvm-project/llvm/include/llvm/CodeGen/ |
| D | TargetLowering.h | 2316 struct AddrMode { struct
2321 AddrMode() = default; argument
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| /external/vixl/src/aarch64/ |
| D | instructions-aarch64.h | 175 enum AddrMode { Offset, PreIndex, PostIndex }; enum
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