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1 /*
2  * Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #ifndef DSU_DEF_H
8 #define DSU_DEF_H
9 
10 #include <lib/utils_def.h>
11 
12 /********************************************************************
13  * DSU Cluster Configuration registers definitions
14  ********************************************************************/
15 #define CLUSTERCFR_EL1		S3_0_C15_C3_0
16 
17 #define CLUSTERCFR_ACP_SHIFT	U(11)
18 
19 /********************************************************************
20  * DSU Cluster Main Revision ID registers definitions
21  ********************************************************************/
22 #define CLUSTERIDR_EL1		S3_0_C15_C3_1
23 
24 #define CLUSTERIDR_REV_SHIFT	U(0)
25 #define CLUSTERIDR_REV_BITS	U(4)
26 #define CLUSTERIDR_VAR_SHIFT	U(4)
27 #define CLUSTERIDR_VAR_BITS	U(4)
28 
29 /********************************************************************
30  * DSU Cluster Auxiliary Control registers definitions
31  ********************************************************************/
32 #define CLUSTERACTLR_EL1	S3_0_C15_C3_3
33 
34 #define CLUSTERACTLR_EL1_DISABLE_CLOCK_GATING	(ULL(1) << 15)
35 
36 /********************************************************************
37  * Masks applied for DSU errata workarounds
38  ********************************************************************/
39 #define DSU_ERRATA_936184_MASK	(U(0x3) << 15)
40 
41 #endif /* DSU_DEF_H */
42