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1 // Copyright 2017, VIXL authors
2 // All rights reserved.
3 //
4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions are met:
6 //
7 //   * Redistributions of source code must retain the above copyright notice,
8 //     this list of conditions and the following disclaimer.
9 //   * Redistributions in binary form must reproduce the above copyright notice,
10 //     this list of conditions and the following disclaimer in the documentation
11 //     and/or other materials provided with the distribution.
12 //   * Neither the name of ARM Limited nor the names of its contributors may be
13 //     used to endorse or promote products derived from this software without
14 //     specific prior written permission.
15 //
16 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND
17 // ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
18 // WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
19 // DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
20 // FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 // DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22 // SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
23 // CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 // OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
25 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 
27 #ifndef VIXL_DISASM_AARCH32_H_
28 #define VIXL_DISASM_AARCH32_H_
29 
30 extern "C" {
31 #include <stdint.h>
32 }
33 
34 #include <iomanip>
35 
36 #include "aarch32/constants-aarch32.h"
37 #include "aarch32/operands-aarch32.h"
38 
39 namespace vixl {
40 namespace aarch32 {
41 
42 class ITBlock {
43   Condition first_condition_;
44   Condition condition_;
45   uint16_t it_mask_;
46 
47  public:
ITBlock()48   ITBlock() : first_condition_(al), condition_(al), it_mask_(0) {}
Advance()49   void Advance() {
50     condition_ = Condition((condition_.GetCondition() & 0xe) | (it_mask_ >> 3));
51     it_mask_ = (it_mask_ << 1) & 0xf;
52   }
InITBlock()53   bool InITBlock() const { return it_mask_ != 0; }
OutsideITBlock()54   bool OutsideITBlock() const { return !InITBlock(); }
LastInITBlock()55   bool LastInITBlock() const { return it_mask_ == 0x8; }
OutsideITBlockOrLast()56   bool OutsideITBlockOrLast() const {
57     return OutsideITBlock() || LastInITBlock();
58   }
Set(Condition first_condition,uint16_t mask)59   void Set(Condition first_condition, uint16_t mask) {
60     condition_ = first_condition_ = first_condition;
61     it_mask_ = mask;
62   }
GetFirstCondition()63   Condition GetFirstCondition() const { return first_condition_; }
GetCurrentCondition()64   Condition GetCurrentCondition() const { return condition_; }
65 };
66 
67 class Disassembler {
68  public:
69   enum LocationType {
70     kAnyLocation,
71     kCodeLocation,
72     kDataLocation,
73     kCoprocLocation,
74     kLoadByteLocation,
75     kLoadHalfWordLocation,
76     kLoadWordLocation,
77     kLoadDoubleWordLocation,
78     kLoadSignedByteLocation,
79     kLoadSignedHalfWordLocation,
80     kLoadSinglePrecisionLocation,
81     kLoadDoublePrecisionLocation,
82     kStoreByteLocation,
83     kStoreHalfWordLocation,
84     kStoreWordLocation,
85     kStoreDoubleWordLocation,
86     kStoreSinglePrecisionLocation,
87     kStoreDoublePrecisionLocation,
88     kVld1Location,
89     kVld2Location,
90     kVld3Location,
91     kVld4Location,
92     kVst1Location,
93     kVst2Location,
94     kVst3Location,
95     kVst4Location
96   };
97 
98   class ConditionPrinter {
99     const ITBlock& it_block_;
100     Condition cond_;
101 
102    public:
ConditionPrinter(const ITBlock & it_block,Condition cond)103     ConditionPrinter(const ITBlock& it_block, Condition cond)
104         : it_block_(it_block), cond_(cond) {}
GetITBlock()105     const ITBlock& GetITBlock() const { return it_block_; }
GetCond()106     Condition GetCond() const { return cond_; }
107     friend std::ostream& operator<<(std::ostream& os, ConditionPrinter cond) {
108       if (cond.it_block_.InITBlock() && cond.cond_.Is(al) &&
109           !cond.cond_.IsNone()) {
110         return os << "al";
111       }
112       return os << cond.cond_;
113     }
114   };
115 
116   class ImmediatePrinter {
117     uint32_t imm_;
118 
119    public:
ImmediatePrinter(uint32_t imm)120     explicit ImmediatePrinter(uint32_t imm) : imm_(imm) {}
GetImm()121     uint32_t GetImm() const { return imm_; }
122     friend std::ostream& operator<<(std::ostream& os, ImmediatePrinter imm) {
123       return os << "#" << imm.GetImm();
124     }
125   };
126 
127   class SignedImmediatePrinter {
128     int32_t imm_;
129 
130    public:
SignedImmediatePrinter(int32_t imm)131     explicit SignedImmediatePrinter(int32_t imm) : imm_(imm) {}
GetImm()132     int32_t GetImm() const { return imm_; }
133     friend std::ostream& operator<<(std::ostream& os,
134                                     SignedImmediatePrinter imm) {
135       return os << "#" << imm.GetImm();
136     }
137   };
138 
139   class RawImmediatePrinter {
140     uint32_t imm_;
141 
142    public:
RawImmediatePrinter(uint32_t imm)143     explicit RawImmediatePrinter(uint32_t imm) : imm_(imm) {}
GetImm()144     uint32_t GetImm() const { return imm_; }
145     friend std::ostream& operator<<(std::ostream& os, RawImmediatePrinter imm) {
146       return os << imm.GetImm();
147     }
148   };
149 
150   class DtPrinter {
151     DataType dt_;
152     DataType default_dt_;
153 
154    public:
DtPrinter(DataType dt,DataType default_dt)155     DtPrinter(DataType dt, DataType default_dt)
156         : dt_(dt), default_dt_(default_dt) {}
GetDt()157     DataType GetDt() const { return dt_; }
GetDefaultDt()158     DataType GetDefaultDt() const { return default_dt_; }
159     friend std::ostream& operator<<(std::ostream& os, DtPrinter dt) {
160       if (dt.dt_.Is(dt.default_dt_)) return os;
161       return os << dt.dt_;
162     }
163   };
164 
165   class IndexedRegisterPrinter {
166     DRegister reg_;
167     uint32_t index_;
168 
169    public:
IndexedRegisterPrinter(DRegister reg,uint32_t index)170     IndexedRegisterPrinter(DRegister reg, uint32_t index)
171         : reg_(reg), index_(index) {}
GetReg()172     DRegister GetReg() const { return reg_; }
GetIndex()173     uint32_t GetIndex() const { return index_; }
174     friend std::ostream& operator<<(std::ostream& os,
175                                     IndexedRegisterPrinter reg) {
176       return os << reg.GetReg() << "[" << reg.GetIndex() << "]";
177     }
178   };
179 
180   // TODO: Merge this class with PrintLabel below. This Location class
181   // represents a PC-relative offset, not an address.
182   class Location {
183    public:
184     typedef int32_t Offset;
185 
Location(Offset immediate,Offset pc_offset)186     Location(Offset immediate, Offset pc_offset)
187         : immediate_(immediate), pc_offset_(pc_offset) {}
GetImmediate()188     Offset GetImmediate() const { return immediate_; }
GetPCOffset()189     Offset GetPCOffset() const { return pc_offset_; }
190 
191    private:
192     Offset immediate_;
193     Offset pc_offset_;
194   };
195 
196   class PrintLabel {
197     LocationType location_type_;
198     Location::Offset immediate_;
199     Location::Offset location_;
200 
201    public:
PrintLabel(LocationType location_type,Location * offset,Location::Offset position)202     PrintLabel(LocationType location_type,
203                Location* offset,
204                Location::Offset position)
205         : location_type_(location_type),
206           immediate_(offset->GetImmediate()),
207           location_(static_cast<Location::Offset>(
208               static_cast<int64_t>(offset->GetPCOffset()) +
209               offset->GetImmediate() + position)) {}
210 
GetLocationType()211     LocationType GetLocationType() const { return location_type_; }
GetLocation()212     Location::Offset GetLocation() const { return location_; }
GetImmediate()213     Location::Offset GetImmediate() const { return immediate_; }
214 
215     friend inline std::ostream& operator<<(std::ostream& os,
216                                            const PrintLabel& label) {
217       os << "0x" << std::hex << std::setw(8) << std::setfill('0')
218          << label.GetLocation() << std::dec;
219       return os;
220     }
221   };
222 
223 
224   class PrintMemOperand {
225     LocationType location_type_;
226     const MemOperand& operand_;
227 
228    public:
PrintMemOperand(LocationType location_type,const MemOperand & operand)229     PrintMemOperand(LocationType location_type, const MemOperand& operand)
230         : location_type_(location_type), operand_(operand) {}
GetLocationType()231     LocationType GetLocationType() const { return location_type_; }
GetOperand()232     const MemOperand& GetOperand() const { return operand_; }
233   };
234 
235   class PrintAlignedMemOperand {
236     LocationType location_type_;
237     const AlignedMemOperand& operand_;
238 
239    public:
PrintAlignedMemOperand(LocationType location_type,const AlignedMemOperand & operand)240     PrintAlignedMemOperand(LocationType location_type,
241                            const AlignedMemOperand& operand)
242         : location_type_(location_type), operand_(operand) {}
GetLocationType()243     LocationType GetLocationType() const { return location_type_; }
GetOperand()244     const AlignedMemOperand& GetOperand() const { return operand_; }
245   };
246 
247   class DisassemblerStream {
248     std::ostream& os_;
249     InstructionType current_instruction_type_;
250     InstructionAttribute current_instruction_attributes_;
251 
252    public:
DisassemblerStream(std::ostream & os)253     explicit DisassemblerStream(std::ostream& os)  // NOLINT(runtime/references)
254         : os_(os),
255           current_instruction_type_(kUndefInstructionType),
256           current_instruction_attributes_(kNoAttribute) {}
~DisassemblerStream()257     virtual ~DisassemblerStream() {}
os()258     std::ostream& os() const { return os_; }
SetCurrentInstruction(InstructionType current_instruction_type,InstructionAttribute current_instruction_attributes)259     void SetCurrentInstruction(
260         InstructionType current_instruction_type,
261         InstructionAttribute current_instruction_attributes) {
262       current_instruction_type_ = current_instruction_type;
263       current_instruction_attributes_ = current_instruction_attributes;
264     }
GetCurrentInstructionType()265     InstructionType GetCurrentInstructionType() const {
266       return current_instruction_type_;
267     }
GetCurrentInstructionAttributes()268     InstructionAttribute GetCurrentInstructionAttributes() const {
269       return current_instruction_attributes_;
270     }
Has(InstructionAttribute attributes)271     bool Has(InstructionAttribute attributes) const {
272       return (current_instruction_attributes_ & attributes) == attributes;
273     }
274     template <typename T>
275     DisassemblerStream& operator<<(T value) {
276       os_ << value;
277       return *this;
278     }
279     virtual DisassemblerStream& operator<<(const char* string) {
280       os_ << string;
281       return *this;
282     }
283     virtual DisassemblerStream& operator<<(const ConditionPrinter& cond) {
284       os_ << cond;
285       return *this;
286     }
287     virtual DisassemblerStream& operator<<(Condition cond) {
288       os_ << cond;
289       return *this;
290     }
291     virtual DisassemblerStream& operator<<(const EncodingSize& size) {
292       os_ << size;
293       return *this;
294     }
295     virtual DisassemblerStream& operator<<(const ImmediatePrinter& imm) {
296       os_ << imm;
297       return *this;
298     }
299     virtual DisassemblerStream& operator<<(const SignedImmediatePrinter& imm) {
300       os_ << imm;
301       return *this;
302     }
303     virtual DisassemblerStream& operator<<(const RawImmediatePrinter& imm) {
304       os_ << imm;
305       return *this;
306     }
307     virtual DisassemblerStream& operator<<(const DtPrinter& dt) {
308       os_ << dt;
309       return *this;
310     }
311     virtual DisassemblerStream& operator<<(const DataType& type) {
312       os_ << type;
313       return *this;
314     }
315     virtual DisassemblerStream& operator<<(Shift shift) {
316       os_ << shift;
317       return *this;
318     }
319     virtual DisassemblerStream& operator<<(Sign sign) {
320       os_ << sign;
321       return *this;
322     }
323     virtual DisassemblerStream& operator<<(Alignment alignment) {
324       os_ << alignment;
325       return *this;
326     }
327     virtual DisassemblerStream& operator<<(const PrintLabel& label) {
328       os_ << label;
329       return *this;
330     }
331     virtual DisassemblerStream& operator<<(const WriteBack& write_back) {
332       os_ << write_back;
333       return *this;
334     }
335     virtual DisassemblerStream& operator<<(const NeonImmediate& immediate) {
336       os_ << immediate;
337       return *this;
338     }
339     virtual DisassemblerStream& operator<<(Register reg) {
340       os_ << reg;
341       return *this;
342     }
343     virtual DisassemblerStream& operator<<(SRegister reg) {
344       os_ << reg;
345       return *this;
346     }
347     virtual DisassemblerStream& operator<<(DRegister reg) {
348       os_ << reg;
349       return *this;
350     }
351     virtual DisassemblerStream& operator<<(QRegister reg) {
352       os_ << reg;
353       return *this;
354     }
355     virtual DisassemblerStream& operator<<(const RegisterOrAPSR_nzcv reg) {
356       os_ << reg;
357       return *this;
358     }
359     virtual DisassemblerStream& operator<<(SpecialRegister reg) {
360       os_ << reg;
361       return *this;
362     }
363     virtual DisassemblerStream& operator<<(MaskedSpecialRegister reg) {
364       os_ << reg;
365       return *this;
366     }
367     virtual DisassemblerStream& operator<<(SpecialFPRegister reg) {
368       os_ << reg;
369       return *this;
370     }
371     virtual DisassemblerStream& operator<<(BankedRegister reg) {
372       os_ << reg;
373       return *this;
374     }
375     virtual DisassemblerStream& operator<<(const RegisterList& list) {
376       os_ << list;
377       return *this;
378     }
379     virtual DisassemblerStream& operator<<(const SRegisterList& list) {
380       os_ << list;
381       return *this;
382     }
383     virtual DisassemblerStream& operator<<(const DRegisterList& list) {
384       os_ << list;
385       return *this;
386     }
387     virtual DisassemblerStream& operator<<(const NeonRegisterList& list) {
388       os_ << list;
389       return *this;
390     }
391     virtual DisassemblerStream& operator<<(const DRegisterLane& reg) {
392       os_ << reg;
393       return *this;
394     }
395     virtual DisassemblerStream& operator<<(const IndexedRegisterPrinter& reg) {
396       os_ << reg;
397       return *this;
398     }
399     virtual DisassemblerStream& operator<<(Coprocessor coproc) {
400       os_ << coproc;
401       return *this;
402     }
403     virtual DisassemblerStream& operator<<(CRegister reg) {
404       os_ << reg;
405       return *this;
406     }
407     virtual DisassemblerStream& operator<<(Endianness endian_specifier) {
408       os_ << endian_specifier;
409       return *this;
410     }
411     virtual DisassemblerStream& operator<<(MemoryBarrier option) {
412       os_ << option;
413       return *this;
414     }
415     virtual DisassemblerStream& operator<<(InterruptFlags iflags) {
416       os_ << iflags;
417       return *this;
418     }
419     virtual DisassemblerStream& operator<<(const Operand& operand) {
420       if (operand.IsImmediate()) {
421         if (Has(kBitwise)) {
422           return *this << "#0x" << std::hex << operand.GetImmediate()
423                        << std::dec;
424         }
425         return *this << "#" << operand.GetImmediate();
426       }
427       if (operand.IsImmediateShiftedRegister()) {
428         if ((operand.GetShift().IsLSL() || operand.GetShift().IsROR()) &&
429             (operand.GetShiftAmount() == 0)) {
430           return *this << operand.GetBaseRegister();
431         }
432         if (operand.GetShift().IsRRX()) {
433           return *this << operand.GetBaseRegister() << ", rrx";
434         }
435         return *this << operand.GetBaseRegister() << ", " << operand.GetShift()
436                      << " #" << operand.GetShiftAmount();
437       }
438       if (operand.IsRegisterShiftedRegister()) {
439         return *this << operand.GetBaseRegister() << ", " << operand.GetShift()
440                      << " " << operand.GetShiftRegister();
441       }
442       VIXL_UNREACHABLE();
443       return *this;
444     }
445     virtual DisassemblerStream& operator<<(const SOperand& operand) {
446       if (operand.IsImmediate()) {
447         return *this << operand.GetNeonImmediate();
448       }
449       return *this << operand.GetRegister();
450     }
451     virtual DisassemblerStream& operator<<(const DOperand& operand) {
452       if (operand.IsImmediate()) {
453         return *this << operand.GetNeonImmediate();
454       }
455       return *this << operand.GetRegister();
456     }
457     virtual DisassemblerStream& operator<<(const QOperand& operand) {
458       if (operand.IsImmediate()) {
459         return *this << operand.GetNeonImmediate();
460       }
461       return *this << operand.GetRegister();
462     }
463     virtual DisassemblerStream& operator<<(const MemOperand& operand) {
464       *this << "[" << operand.GetBaseRegister();
465       if (operand.GetAddrMode() == PostIndex) {
466         *this << "]";
467         if (operand.IsRegisterOnly()) return *this << "!";
468       }
469       if (operand.IsImmediate()) {
470         if ((operand.GetOffsetImmediate() != 0) ||
471             operand.GetSign().IsMinus() ||
472             ((operand.GetAddrMode() != Offset) && !operand.IsRegisterOnly())) {
473           if (operand.GetOffsetImmediate() == 0) {
474             *this << ", #" << operand.GetSign() << operand.GetOffsetImmediate();
475           } else {
476             *this << ", #" << operand.GetOffsetImmediate();
477           }
478         }
479       } else if (operand.IsPlainRegister()) {
480         *this << ", " << operand.GetSign() << operand.GetOffsetRegister();
481       } else if (operand.IsShiftedRegister()) {
482         *this << ", " << operand.GetSign() << operand.GetOffsetRegister()
483               << ImmediateShiftOperand(operand.GetShift(),
484                                        operand.GetShiftAmount());
485       } else {
486         VIXL_UNREACHABLE();
487         return *this;
488       }
489       if (operand.GetAddrMode() == Offset) {
490         *this << "]";
491       } else if (operand.GetAddrMode() == PreIndex) {
492         *this << "]!";
493       }
494       return *this;
495     }
496     virtual DisassemblerStream& operator<<(const PrintMemOperand& operand) {
497       return *this << operand.GetOperand();
498     }
499     virtual DisassemblerStream& operator<<(const AlignedMemOperand& operand) {
500       *this << "[" << operand.GetBaseRegister() << operand.GetAlignment()
501             << "]";
502       if (operand.GetAddrMode() == PostIndex) {
503         if (operand.IsPlainRegister()) {
504           *this << ", " << operand.GetOffsetRegister();
505         } else {
506           *this << "!";
507         }
508       }
509       return *this;
510     }
511     virtual DisassemblerStream& operator<<(
512         const PrintAlignedMemOperand& operand) {
513       return *this << operand.GetOperand();
514     }
515   };
516 
517  private:
518   class ITBlockScope {
519     ITBlock* const it_block_;
520     bool inside_;
521 
522    public:
ITBlockScope(ITBlock * it_block)523     explicit ITBlockScope(ITBlock* it_block)
524         : it_block_(it_block), inside_(it_block->InITBlock()) {}
~ITBlockScope()525     ~ITBlockScope() {
526       if (inside_) it_block_->Advance();
527     }
528   };
529 
530   ITBlock it_block_;
531   DisassemblerStream* os_;
532   bool owns_os_;
533   uint32_t code_address_;
534   // True if the disassembler always output instructions with all the
535   // registers (even if two registers are identical and only one could be
536   // output).
537   bool use_short_hand_form_;
538 
539  public:
540   explicit Disassembler(std::ostream& os,  // NOLINT(runtime/references)
541                         uint32_t code_address = 0)
os_(new DisassemblerStream (os))542       : os_(new DisassemblerStream(os)),
543         owns_os_(true),
544         code_address_(code_address),
545         use_short_hand_form_(true) {}
546   explicit Disassembler(DisassemblerStream* os, uint32_t code_address = 0)
os_(os)547       : os_(os),
548         owns_os_(false),
549         code_address_(code_address),
550         use_short_hand_form_(true) {}
~Disassembler()551   virtual ~Disassembler() {
552     if (owns_os_) {
553       delete os_;
554     }
555   }
os()556   DisassemblerStream& os() const { return *os_; }
SetIT(Condition first_condition,uint16_t it_mask)557   void SetIT(Condition first_condition, uint16_t it_mask) {
558     it_block_.Set(first_condition, it_mask);
559   }
GetITBlock()560   const ITBlock& GetITBlock() const { return it_block_; }
InITBlock()561   bool InITBlock() const { return it_block_.InITBlock(); }
OutsideITBlock()562   bool OutsideITBlock() const { return it_block_.OutsideITBlock(); }
OutsideITBlockOrLast()563   bool OutsideITBlockOrLast() const { return it_block_.OutsideITBlockOrLast(); }
CheckNotIT()564   void CheckNotIT() const { VIXL_ASSERT(it_block_.OutsideITBlock()); }
565   // Return the current condition depending on the IT state for T32.
CurrentCond()566   Condition CurrentCond() const {
567     if (it_block_.OutsideITBlock()) return al;
568     return it_block_.GetCurrentCondition();
569   }
UseShortHandForm()570   bool UseShortHandForm() const { return use_short_hand_form_; }
SetUseShortHandForm(bool use_short_hand_form)571   void SetUseShortHandForm(bool use_short_hand_form) {
572     use_short_hand_form_ = use_short_hand_form;
573   }
574 
UnallocatedT32(uint32_t instruction)575   virtual void UnallocatedT32(uint32_t instruction) {
576     if (T32Size(instruction) == 2) {
577       os() << "unallocated " << std::hex << std::setw(4) << std::setfill('0')
578            << (instruction >> 16) << std::dec;
579     } else {
580       os() << "unallocated " << std::hex << std::setw(8) << std::setfill('0')
581            << instruction << std::dec;
582     }
583   }
UnallocatedA32(uint32_t instruction)584   virtual void UnallocatedA32(uint32_t instruction) {
585     os() << "unallocated " << std::hex << std::setw(8) << std::setfill('0')
586          << instruction << std::dec;
587   }
UnimplementedT32_16(const char * name,uint32_t instruction)588   virtual void UnimplementedT32_16(const char* name, uint32_t instruction) {
589     os() << "unimplemented " << name << " T32:" << std::hex << std::setw(4)
590          << std::setfill('0') << (instruction >> 16) << std::dec;
591   }
UnimplementedT32_32(const char * name,uint32_t instruction)592   virtual void UnimplementedT32_32(const char* name, uint32_t instruction) {
593     os() << "unimplemented " << name << " T32:" << std::hex << std::setw(8)
594          << std::setfill('0') << instruction << std::dec;
595   }
UnimplementedA32(const char * name,uint32_t instruction)596   virtual void UnimplementedA32(const char* name, uint32_t instruction) {
597     os() << "unimplemented " << name << " ARM:" << std::hex << std::setw(8)
598          << std::setfill('0') << instruction << std::dec;
599   }
Unpredictable()600   virtual void Unpredictable() { os() << " ; unpredictable"; }
UnpredictableT32(uint32_t)601   virtual void UnpredictableT32(uint32_t /*instr*/) { return Unpredictable(); }
UnpredictableA32(uint32_t)602   virtual void UnpredictableA32(uint32_t /*instr*/) { return Unpredictable(); }
603 
Is16BitEncoding(uint32_t instr)604   static bool Is16BitEncoding(uint32_t instr) { return instr < 0xe8000000; }
GetCodeAddress()605   uint32_t GetCodeAddress() const { return code_address_; }
SetCodeAddress(uint32_t code_address)606   void SetCodeAddress(uint32_t code_address) { code_address_ = code_address; }
607 
608   // Start of generated code.
609 
610   void adc(Condition cond,
611            EncodingSize size,
612            Register rd,
613            Register rn,
614            const Operand& operand);
615 
616   void adcs(Condition cond,
617             EncodingSize size,
618             Register rd,
619             Register rn,
620             const Operand& operand);
621 
622   void add(Condition cond,
623            EncodingSize size,
624            Register rd,
625            Register rn,
626            const Operand& operand);
627 
628   void add(Condition cond, Register rd, const Operand& operand);
629 
630   void adds(Condition cond,
631             EncodingSize size,
632             Register rd,
633             Register rn,
634             const Operand& operand);
635 
636   void adds(Register rd, const Operand& operand);
637 
638   void addw(Condition cond, Register rd, Register rn, const Operand& operand);
639 
640   void adr(Condition cond, EncodingSize size, Register rd, Location* location);
641 
642   void and_(Condition cond,
643             EncodingSize size,
644             Register rd,
645             Register rn,
646             const Operand& operand);
647 
648   void ands(Condition cond,
649             EncodingSize size,
650             Register rd,
651             Register rn,
652             const Operand& operand);
653 
654   void asr(Condition cond,
655            EncodingSize size,
656            Register rd,
657            Register rm,
658            const Operand& operand);
659 
660   void asrs(Condition cond,
661             EncodingSize size,
662             Register rd,
663             Register rm,
664             const Operand& operand);
665 
666   void b(Condition cond, EncodingSize size, Location* location);
667 
668   void bfc(Condition cond, Register rd, uint32_t lsb, uint32_t width);
669 
670   void bfi(
671       Condition cond, Register rd, Register rn, uint32_t lsb, uint32_t width);
672 
673   void bic(Condition cond,
674            EncodingSize size,
675            Register rd,
676            Register rn,
677            const Operand& operand);
678 
679   void bics(Condition cond,
680             EncodingSize size,
681             Register rd,
682             Register rn,
683             const Operand& operand);
684 
685   void bkpt(Condition cond, uint32_t imm);
686 
687   void bl(Condition cond, Location* location);
688 
689   void blx(Condition cond, Location* location);
690 
691   void blx(Condition cond, Register rm);
692 
693   void bx(Condition cond, Register rm);
694 
695   void bxj(Condition cond, Register rm);
696 
697   void cbnz(Register rn, Location* location);
698 
699   void cbz(Register rn, Location* location);
700 
701   void clrex(Condition cond);
702 
703   void clz(Condition cond, Register rd, Register rm);
704 
705   void cmn(Condition cond,
706            EncodingSize size,
707            Register rn,
708            const Operand& operand);
709 
710   void cmp(Condition cond,
711            EncodingSize size,
712            Register rn,
713            const Operand& operand);
714 
715   void crc32b(Condition cond, Register rd, Register rn, Register rm);
716 
717   void crc32cb(Condition cond, Register rd, Register rn, Register rm);
718 
719   void crc32ch(Condition cond, Register rd, Register rn, Register rm);
720 
721   void crc32cw(Condition cond, Register rd, Register rn, Register rm);
722 
723   void crc32h(Condition cond, Register rd, Register rn, Register rm);
724 
725   void crc32w(Condition cond, Register rd, Register rn, Register rm);
726 
727   void dmb(Condition cond, MemoryBarrier option);
728 
729   void dsb(Condition cond, MemoryBarrier option);
730 
731   void eor(Condition cond,
732            EncodingSize size,
733            Register rd,
734            Register rn,
735            const Operand& operand);
736 
737   void eors(Condition cond,
738             EncodingSize size,
739             Register rd,
740             Register rn,
741             const Operand& operand);
742 
743   void fldmdbx(Condition cond,
744                Register rn,
745                WriteBack write_back,
746                DRegisterList dreglist);
747 
748   void fldmiax(Condition cond,
749                Register rn,
750                WriteBack write_back,
751                DRegisterList dreglist);
752 
753   void fstmdbx(Condition cond,
754                Register rn,
755                WriteBack write_back,
756                DRegisterList dreglist);
757 
758   void fstmiax(Condition cond,
759                Register rn,
760                WriteBack write_back,
761                DRegisterList dreglist);
762 
763   void hlt(Condition cond, uint32_t imm);
764 
765   void hvc(Condition cond, uint32_t imm);
766 
767   void isb(Condition cond, MemoryBarrier option);
768 
769   void it(Condition cond, uint16_t mask);
770 
771   void lda(Condition cond, Register rt, const MemOperand& operand);
772 
773   void ldab(Condition cond, Register rt, const MemOperand& operand);
774 
775   void ldaex(Condition cond, Register rt, const MemOperand& operand);
776 
777   void ldaexb(Condition cond, Register rt, const MemOperand& operand);
778 
779   void ldaexd(Condition cond,
780               Register rt,
781               Register rt2,
782               const MemOperand& operand);
783 
784   void ldaexh(Condition cond, Register rt, const MemOperand& operand);
785 
786   void ldah(Condition cond, Register rt, const MemOperand& operand);
787 
788   void ldm(Condition cond,
789            EncodingSize size,
790            Register rn,
791            WriteBack write_back,
792            RegisterList registers);
793 
794   void ldmda(Condition cond,
795              Register rn,
796              WriteBack write_back,
797              RegisterList registers);
798 
799   void ldmdb(Condition cond,
800              Register rn,
801              WriteBack write_back,
802              RegisterList registers);
803 
804   void ldmea(Condition cond,
805              Register rn,
806              WriteBack write_back,
807              RegisterList registers);
808 
809   void ldmed(Condition cond,
810              Register rn,
811              WriteBack write_back,
812              RegisterList registers);
813 
814   void ldmfa(Condition cond,
815              Register rn,
816              WriteBack write_back,
817              RegisterList registers);
818 
819   void ldmfd(Condition cond,
820              EncodingSize size,
821              Register rn,
822              WriteBack write_back,
823              RegisterList registers);
824 
825   void ldmib(Condition cond,
826              Register rn,
827              WriteBack write_back,
828              RegisterList registers);
829 
830   void ldr(Condition cond,
831            EncodingSize size,
832            Register rt,
833            const MemOperand& operand);
834 
835   void ldr(Condition cond, EncodingSize size, Register rt, Location* location);
836 
837   void ldrb(Condition cond,
838             EncodingSize size,
839             Register rt,
840             const MemOperand& operand);
841 
842   void ldrb(Condition cond, Register rt, Location* location);
843 
844   void ldrd(Condition cond,
845             Register rt,
846             Register rt2,
847             const MemOperand& operand);
848 
849   void ldrd(Condition cond, Register rt, Register rt2, Location* location);
850 
851   void ldrex(Condition cond, Register rt, const MemOperand& operand);
852 
853   void ldrexb(Condition cond, Register rt, const MemOperand& operand);
854 
855   void ldrexd(Condition cond,
856               Register rt,
857               Register rt2,
858               const MemOperand& operand);
859 
860   void ldrexh(Condition cond, Register rt, const MemOperand& operand);
861 
862   void ldrh(Condition cond,
863             EncodingSize size,
864             Register rt,
865             const MemOperand& operand);
866 
867   void ldrh(Condition cond, Register rt, Location* location);
868 
869   void ldrsb(Condition cond,
870              EncodingSize size,
871              Register rt,
872              const MemOperand& operand);
873 
874   void ldrsb(Condition cond, Register rt, Location* location);
875 
876   void ldrsh(Condition cond,
877              EncodingSize size,
878              Register rt,
879              const MemOperand& operand);
880 
881   void ldrsh(Condition cond, Register rt, Location* location);
882 
883   void lsl(Condition cond,
884            EncodingSize size,
885            Register rd,
886            Register rm,
887            const Operand& operand);
888 
889   void lsls(Condition cond,
890             EncodingSize size,
891             Register rd,
892             Register rm,
893             const Operand& operand);
894 
895   void lsr(Condition cond,
896            EncodingSize size,
897            Register rd,
898            Register rm,
899            const Operand& operand);
900 
901   void lsrs(Condition cond,
902             EncodingSize size,
903             Register rd,
904             Register rm,
905             const Operand& operand);
906 
907   void mla(Condition cond, Register rd, Register rn, Register rm, Register ra);
908 
909   void mlas(Condition cond, Register rd, Register rn, Register rm, Register ra);
910 
911   void mls(Condition cond, Register rd, Register rn, Register rm, Register ra);
912 
913   void mov(Condition cond,
914            EncodingSize size,
915            Register rd,
916            const Operand& operand);
917 
918   void movs(Condition cond,
919             EncodingSize size,
920             Register rd,
921             const Operand& operand);
922 
923   void movt(Condition cond, Register rd, const Operand& operand);
924 
925   void movw(Condition cond, Register rd, const Operand& operand);
926 
927   void mrs(Condition cond, Register rd, SpecialRegister spec_reg);
928 
929   void msr(Condition cond,
930            MaskedSpecialRegister spec_reg,
931            const Operand& operand);
932 
933   void mul(
934       Condition cond, EncodingSize size, Register rd, Register rn, Register rm);
935 
936   void muls(Condition cond, Register rd, Register rn, Register rm);
937 
938   void mvn(Condition cond,
939            EncodingSize size,
940            Register rd,
941            const Operand& operand);
942 
943   void mvns(Condition cond,
944             EncodingSize size,
945             Register rd,
946             const Operand& operand);
947 
948   void nop(Condition cond, EncodingSize size);
949 
950   void orn(Condition cond, Register rd, Register rn, const Operand& operand);
951 
952   void orns(Condition cond, Register rd, Register rn, const Operand& operand);
953 
954   void orr(Condition cond,
955            EncodingSize size,
956            Register rd,
957            Register rn,
958            const Operand& operand);
959 
960   void orrs(Condition cond,
961             EncodingSize size,
962             Register rd,
963             Register rn,
964             const Operand& operand);
965 
966   void pkhbt(Condition cond, Register rd, Register rn, const Operand& operand);
967 
968   void pkhtb(Condition cond, Register rd, Register rn, const Operand& operand);
969 
970   void pld(Condition cond, Location* location);
971 
972   void pld(Condition cond, const MemOperand& operand);
973 
974   void pldw(Condition cond, const MemOperand& operand);
975 
976   void pli(Condition cond, const MemOperand& operand);
977 
978   void pli(Condition cond, Location* location);
979 
980   void pop(Condition cond, EncodingSize size, RegisterList registers);
981 
982   void pop(Condition cond, EncodingSize size, Register rt);
983 
984   void push(Condition cond, EncodingSize size, RegisterList registers);
985 
986   void push(Condition cond, EncodingSize size, Register rt);
987 
988   void qadd(Condition cond, Register rd, Register rm, Register rn);
989 
990   void qadd16(Condition cond, Register rd, Register rn, Register rm);
991 
992   void qadd8(Condition cond, Register rd, Register rn, Register rm);
993 
994   void qasx(Condition cond, Register rd, Register rn, Register rm);
995 
996   void qdadd(Condition cond, Register rd, Register rm, Register rn);
997 
998   void qdsub(Condition cond, Register rd, Register rm, Register rn);
999 
1000   void qsax(Condition cond, Register rd, Register rn, Register rm);
1001 
1002   void qsub(Condition cond, Register rd, Register rm, Register rn);
1003 
1004   void qsub16(Condition cond, Register rd, Register rn, Register rm);
1005 
1006   void qsub8(Condition cond, Register rd, Register rn, Register rm);
1007 
1008   void rbit(Condition cond, Register rd, Register rm);
1009 
1010   void rev(Condition cond, EncodingSize size, Register rd, Register rm);
1011 
1012   void rev16(Condition cond, EncodingSize size, Register rd, Register rm);
1013 
1014   void revsh(Condition cond, EncodingSize size, Register rd, Register rm);
1015 
1016   void ror(Condition cond,
1017            EncodingSize size,
1018            Register rd,
1019            Register rm,
1020            const Operand& operand);
1021 
1022   void rors(Condition cond,
1023             EncodingSize size,
1024             Register rd,
1025             Register rm,
1026             const Operand& operand);
1027 
1028   void rrx(Condition cond, Register rd, Register rm);
1029 
1030   void rrxs(Condition cond, Register rd, Register rm);
1031 
1032   void rsb(Condition cond,
1033            EncodingSize size,
1034            Register rd,
1035            Register rn,
1036            const Operand& operand);
1037 
1038   void rsbs(Condition cond,
1039             EncodingSize size,
1040             Register rd,
1041             Register rn,
1042             const Operand& operand);
1043 
1044   void rsc(Condition cond, Register rd, Register rn, const Operand& operand);
1045 
1046   void rscs(Condition cond, Register rd, Register rn, const Operand& operand);
1047 
1048   void sadd16(Condition cond, Register rd, Register rn, Register rm);
1049 
1050   void sadd8(Condition cond, Register rd, Register rn, Register rm);
1051 
1052   void sasx(Condition cond, Register rd, Register rn, Register rm);
1053 
1054   void sbc(Condition cond,
1055            EncodingSize size,
1056            Register rd,
1057            Register rn,
1058            const Operand& operand);
1059 
1060   void sbcs(Condition cond,
1061             EncodingSize size,
1062             Register rd,
1063             Register rn,
1064             const Operand& operand);
1065 
1066   void sbfx(
1067       Condition cond, Register rd, Register rn, uint32_t lsb, uint32_t width);
1068 
1069   void sdiv(Condition cond, Register rd, Register rn, Register rm);
1070 
1071   void sel(Condition cond, Register rd, Register rn, Register rm);
1072 
1073   void shadd16(Condition cond, Register rd, Register rn, Register rm);
1074 
1075   void shadd8(Condition cond, Register rd, Register rn, Register rm);
1076 
1077   void shasx(Condition cond, Register rd, Register rn, Register rm);
1078 
1079   void shsax(Condition cond, Register rd, Register rn, Register rm);
1080 
1081   void shsub16(Condition cond, Register rd, Register rn, Register rm);
1082 
1083   void shsub8(Condition cond, Register rd, Register rn, Register rm);
1084 
1085   void smlabb(
1086       Condition cond, Register rd, Register rn, Register rm, Register ra);
1087 
1088   void smlabt(
1089       Condition cond, Register rd, Register rn, Register rm, Register ra);
1090 
1091   void smlad(
1092       Condition cond, Register rd, Register rn, Register rm, Register ra);
1093 
1094   void smladx(
1095       Condition cond, Register rd, Register rn, Register rm, Register ra);
1096 
1097   void smlal(
1098       Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
1099 
1100   void smlalbb(
1101       Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
1102 
1103   void smlalbt(
1104       Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
1105 
1106   void smlald(
1107       Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
1108 
1109   void smlaldx(
1110       Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
1111 
1112   void smlals(
1113       Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
1114 
1115   void smlaltb(
1116       Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
1117 
1118   void smlaltt(
1119       Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
1120 
1121   void smlatb(
1122       Condition cond, Register rd, Register rn, Register rm, Register ra);
1123 
1124   void smlatt(
1125       Condition cond, Register rd, Register rn, Register rm, Register ra);
1126 
1127   void smlawb(
1128       Condition cond, Register rd, Register rn, Register rm, Register ra);
1129 
1130   void smlawt(
1131       Condition cond, Register rd, Register rn, Register rm, Register ra);
1132 
1133   void smlsd(
1134       Condition cond, Register rd, Register rn, Register rm, Register ra);
1135 
1136   void smlsdx(
1137       Condition cond, Register rd, Register rn, Register rm, Register ra);
1138 
1139   void smlsld(
1140       Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
1141 
1142   void smlsldx(
1143       Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
1144 
1145   void smmla(
1146       Condition cond, Register rd, Register rn, Register rm, Register ra);
1147 
1148   void smmlar(
1149       Condition cond, Register rd, Register rn, Register rm, Register ra);
1150 
1151   void smmls(
1152       Condition cond, Register rd, Register rn, Register rm, Register ra);
1153 
1154   void smmlsr(
1155       Condition cond, Register rd, Register rn, Register rm, Register ra);
1156 
1157   void smmul(Condition cond, Register rd, Register rn, Register rm);
1158 
1159   void smmulr(Condition cond, Register rd, Register rn, Register rm);
1160 
1161   void smuad(Condition cond, Register rd, Register rn, Register rm);
1162 
1163   void smuadx(Condition cond, Register rd, Register rn, Register rm);
1164 
1165   void smulbb(Condition cond, Register rd, Register rn, Register rm);
1166 
1167   void smulbt(Condition cond, Register rd, Register rn, Register rm);
1168 
1169   void smull(
1170       Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
1171 
1172   void smulls(
1173       Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
1174 
1175   void smultb(Condition cond, Register rd, Register rn, Register rm);
1176 
1177   void smultt(Condition cond, Register rd, Register rn, Register rm);
1178 
1179   void smulwb(Condition cond, Register rd, Register rn, Register rm);
1180 
1181   void smulwt(Condition cond, Register rd, Register rn, Register rm);
1182 
1183   void smusd(Condition cond, Register rd, Register rn, Register rm);
1184 
1185   void smusdx(Condition cond, Register rd, Register rn, Register rm);
1186 
1187   void ssat(Condition cond, Register rd, uint32_t imm, const Operand& operand);
1188 
1189   void ssat16(Condition cond, Register rd, uint32_t imm, Register rn);
1190 
1191   void ssax(Condition cond, Register rd, Register rn, Register rm);
1192 
1193   void ssub16(Condition cond, Register rd, Register rn, Register rm);
1194 
1195   void ssub8(Condition cond, Register rd, Register rn, Register rm);
1196 
1197   void stl(Condition cond, Register rt, const MemOperand& operand);
1198 
1199   void stlb(Condition cond, Register rt, const MemOperand& operand);
1200 
1201   void stlex(Condition cond,
1202              Register rd,
1203              Register rt,
1204              const MemOperand& operand);
1205 
1206   void stlexb(Condition cond,
1207               Register rd,
1208               Register rt,
1209               const MemOperand& operand);
1210 
1211   void stlexd(Condition cond,
1212               Register rd,
1213               Register rt,
1214               Register rt2,
1215               const MemOperand& operand);
1216 
1217   void stlexh(Condition cond,
1218               Register rd,
1219               Register rt,
1220               const MemOperand& operand);
1221 
1222   void stlh(Condition cond, Register rt, const MemOperand& operand);
1223 
1224   void stm(Condition cond,
1225            EncodingSize size,
1226            Register rn,
1227            WriteBack write_back,
1228            RegisterList registers);
1229 
1230   void stmda(Condition cond,
1231              Register rn,
1232              WriteBack write_back,
1233              RegisterList registers);
1234 
1235   void stmdb(Condition cond,
1236              EncodingSize size,
1237              Register rn,
1238              WriteBack write_back,
1239              RegisterList registers);
1240 
1241   void stmea(Condition cond,
1242              EncodingSize size,
1243              Register rn,
1244              WriteBack write_back,
1245              RegisterList registers);
1246 
1247   void stmed(Condition cond,
1248              Register rn,
1249              WriteBack write_back,
1250              RegisterList registers);
1251 
1252   void stmfa(Condition cond,
1253              Register rn,
1254              WriteBack write_back,
1255              RegisterList registers);
1256 
1257   void stmfd(Condition cond,
1258              Register rn,
1259              WriteBack write_back,
1260              RegisterList registers);
1261 
1262   void stmib(Condition cond,
1263              Register rn,
1264              WriteBack write_back,
1265              RegisterList registers);
1266 
1267   void str(Condition cond,
1268            EncodingSize size,
1269            Register rt,
1270            const MemOperand& operand);
1271 
1272   void strb(Condition cond,
1273             EncodingSize size,
1274             Register rt,
1275             const MemOperand& operand);
1276 
1277   void strd(Condition cond,
1278             Register rt,
1279             Register rt2,
1280             const MemOperand& operand);
1281 
1282   void strex(Condition cond,
1283              Register rd,
1284              Register rt,
1285              const MemOperand& operand);
1286 
1287   void strexb(Condition cond,
1288               Register rd,
1289               Register rt,
1290               const MemOperand& operand);
1291 
1292   void strexd(Condition cond,
1293               Register rd,
1294               Register rt,
1295               Register rt2,
1296               const MemOperand& operand);
1297 
1298   void strexh(Condition cond,
1299               Register rd,
1300               Register rt,
1301               const MemOperand& operand);
1302 
1303   void strh(Condition cond,
1304             EncodingSize size,
1305             Register rt,
1306             const MemOperand& operand);
1307 
1308   void sub(Condition cond,
1309            EncodingSize size,
1310            Register rd,
1311            Register rn,
1312            const Operand& operand);
1313 
1314   void sub(Condition cond, Register rd, const Operand& operand);
1315 
1316   void subs(Condition cond,
1317             EncodingSize size,
1318             Register rd,
1319             Register rn,
1320             const Operand& operand);
1321 
1322   void subs(Register rd, const Operand& operand);
1323 
1324   void subw(Condition cond, Register rd, Register rn, const Operand& operand);
1325 
1326   void svc(Condition cond, uint32_t imm);
1327 
1328   void sxtab(Condition cond, Register rd, Register rn, const Operand& operand);
1329 
1330   void sxtab16(Condition cond,
1331                Register rd,
1332                Register rn,
1333                const Operand& operand);
1334 
1335   void sxtah(Condition cond, Register rd, Register rn, const Operand& operand);
1336 
1337   void sxtb(Condition cond,
1338             EncodingSize size,
1339             Register rd,
1340             const Operand& operand);
1341 
1342   void sxtb16(Condition cond, Register rd, const Operand& operand);
1343 
1344   void sxth(Condition cond,
1345             EncodingSize size,
1346             Register rd,
1347             const Operand& operand);
1348 
1349   void tbb(Condition cond, Register rn, Register rm);
1350 
1351   void tbh(Condition cond, Register rn, Register rm);
1352 
1353   void teq(Condition cond, Register rn, const Operand& operand);
1354 
1355   void tst(Condition cond,
1356            EncodingSize size,
1357            Register rn,
1358            const Operand& operand);
1359 
1360   void uadd16(Condition cond, Register rd, Register rn, Register rm);
1361 
1362   void uadd8(Condition cond, Register rd, Register rn, Register rm);
1363 
1364   void uasx(Condition cond, Register rd, Register rn, Register rm);
1365 
1366   void ubfx(
1367       Condition cond, Register rd, Register rn, uint32_t lsb, uint32_t width);
1368 
1369   void udf(Condition cond, EncodingSize size, uint32_t imm);
1370 
1371   void udiv(Condition cond, Register rd, Register rn, Register rm);
1372 
1373   void uhadd16(Condition cond, Register rd, Register rn, Register rm);
1374 
1375   void uhadd8(Condition cond, Register rd, Register rn, Register rm);
1376 
1377   void uhasx(Condition cond, Register rd, Register rn, Register rm);
1378 
1379   void uhsax(Condition cond, Register rd, Register rn, Register rm);
1380 
1381   void uhsub16(Condition cond, Register rd, Register rn, Register rm);
1382 
1383   void uhsub8(Condition cond, Register rd, Register rn, Register rm);
1384 
1385   void umaal(
1386       Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
1387 
1388   void umlal(
1389       Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
1390 
1391   void umlals(
1392       Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
1393 
1394   void umull(
1395       Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
1396 
1397   void umulls(
1398       Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
1399 
1400   void uqadd16(Condition cond, Register rd, Register rn, Register rm);
1401 
1402   void uqadd8(Condition cond, Register rd, Register rn, Register rm);
1403 
1404   void uqasx(Condition cond, Register rd, Register rn, Register rm);
1405 
1406   void uqsax(Condition cond, Register rd, Register rn, Register rm);
1407 
1408   void uqsub16(Condition cond, Register rd, Register rn, Register rm);
1409 
1410   void uqsub8(Condition cond, Register rd, Register rn, Register rm);
1411 
1412   void usad8(Condition cond, Register rd, Register rn, Register rm);
1413 
1414   void usada8(
1415       Condition cond, Register rd, Register rn, Register rm, Register ra);
1416 
1417   void usat(Condition cond, Register rd, uint32_t imm, const Operand& operand);
1418 
1419   void usat16(Condition cond, Register rd, uint32_t imm, Register rn);
1420 
1421   void usax(Condition cond, Register rd, Register rn, Register rm);
1422 
1423   void usub16(Condition cond, Register rd, Register rn, Register rm);
1424 
1425   void usub8(Condition cond, Register rd, Register rn, Register rm);
1426 
1427   void uxtab(Condition cond, Register rd, Register rn, const Operand& operand);
1428 
1429   void uxtab16(Condition cond,
1430                Register rd,
1431                Register rn,
1432                const Operand& operand);
1433 
1434   void uxtah(Condition cond, Register rd, Register rn, const Operand& operand);
1435 
1436   void uxtb(Condition cond,
1437             EncodingSize size,
1438             Register rd,
1439             const Operand& operand);
1440 
1441   void uxtb16(Condition cond, Register rd, const Operand& operand);
1442 
1443   void uxth(Condition cond,
1444             EncodingSize size,
1445             Register rd,
1446             const Operand& operand);
1447 
1448   void vaba(
1449       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1450 
1451   void vaba(
1452       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1453 
1454   void vabal(
1455       Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm);
1456 
1457   void vabd(
1458       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1459 
1460   void vabd(
1461       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1462 
1463   void vabdl(
1464       Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm);
1465 
1466   void vabs(Condition cond, DataType dt, DRegister rd, DRegister rm);
1467 
1468   void vabs(Condition cond, DataType dt, QRegister rd, QRegister rm);
1469 
1470   void vabs(Condition cond, DataType dt, SRegister rd, SRegister rm);
1471 
1472   void vacge(
1473       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1474 
1475   void vacge(
1476       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1477 
1478   void vacgt(
1479       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1480 
1481   void vacgt(
1482       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1483 
1484   void vacle(
1485       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1486 
1487   void vacle(
1488       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1489 
1490   void vaclt(
1491       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1492 
1493   void vaclt(
1494       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1495 
1496   void vadd(
1497       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1498 
1499   void vadd(
1500       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1501 
1502   void vadd(
1503       Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
1504 
1505   void vaddhn(
1506       Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm);
1507 
1508   void vaddl(
1509       Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm);
1510 
1511   void vaddw(
1512       Condition cond, DataType dt, QRegister rd, QRegister rn, DRegister rm);
1513 
1514   void vand(Condition cond,
1515             DataType dt,
1516             DRegister rd,
1517             DRegister rn,
1518             const DOperand& operand);
1519 
1520   void vand(Condition cond,
1521             DataType dt,
1522             QRegister rd,
1523             QRegister rn,
1524             const QOperand& operand);
1525 
1526   void vbic(Condition cond,
1527             DataType dt,
1528             DRegister rd,
1529             DRegister rn,
1530             const DOperand& operand);
1531 
1532   void vbic(Condition cond,
1533             DataType dt,
1534             QRegister rd,
1535             QRegister rn,
1536             const QOperand& operand);
1537 
1538   void vbif(
1539       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1540 
1541   void vbif(
1542       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1543 
1544   void vbit(
1545       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1546 
1547   void vbit(
1548       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1549 
1550   void vbsl(
1551       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1552 
1553   void vbsl(
1554       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1555 
1556   void vceq(Condition cond,
1557             DataType dt,
1558             DRegister rd,
1559             DRegister rm,
1560             const DOperand& operand);
1561 
1562   void vceq(Condition cond,
1563             DataType dt,
1564             QRegister rd,
1565             QRegister rm,
1566             const QOperand& operand);
1567 
1568   void vceq(
1569       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1570 
1571   void vceq(
1572       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1573 
1574   void vcge(Condition cond,
1575             DataType dt,
1576             DRegister rd,
1577             DRegister rm,
1578             const DOperand& operand);
1579 
1580   void vcge(Condition cond,
1581             DataType dt,
1582             QRegister rd,
1583             QRegister rm,
1584             const QOperand& operand);
1585 
1586   void vcge(
1587       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1588 
1589   void vcge(
1590       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1591 
1592   void vcgt(Condition cond,
1593             DataType dt,
1594             DRegister rd,
1595             DRegister rm,
1596             const DOperand& operand);
1597 
1598   void vcgt(Condition cond,
1599             DataType dt,
1600             QRegister rd,
1601             QRegister rm,
1602             const QOperand& operand);
1603 
1604   void vcgt(
1605       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1606 
1607   void vcgt(
1608       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1609 
1610   void vcle(Condition cond,
1611             DataType dt,
1612             DRegister rd,
1613             DRegister rm,
1614             const DOperand& operand);
1615 
1616   void vcle(Condition cond,
1617             DataType dt,
1618             QRegister rd,
1619             QRegister rm,
1620             const QOperand& operand);
1621 
1622   void vcle(
1623       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1624 
1625   void vcle(
1626       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1627 
1628   void vcls(Condition cond, DataType dt, DRegister rd, DRegister rm);
1629 
1630   void vcls(Condition cond, DataType dt, QRegister rd, QRegister rm);
1631 
1632   void vclt(Condition cond,
1633             DataType dt,
1634             DRegister rd,
1635             DRegister rm,
1636             const DOperand& operand);
1637 
1638   void vclt(Condition cond,
1639             DataType dt,
1640             QRegister rd,
1641             QRegister rm,
1642             const QOperand& operand);
1643 
1644   void vclt(
1645       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1646 
1647   void vclt(
1648       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1649 
1650   void vclz(Condition cond, DataType dt, DRegister rd, DRegister rm);
1651 
1652   void vclz(Condition cond, DataType dt, QRegister rd, QRegister rm);
1653 
1654   void vcmp(Condition cond, DataType dt, SRegister rd, const SOperand& operand);
1655 
1656   void vcmp(Condition cond, DataType dt, DRegister rd, const DOperand& operand);
1657 
1658   void vcmpe(Condition cond,
1659              DataType dt,
1660              SRegister rd,
1661              const SOperand& operand);
1662 
1663   void vcmpe(Condition cond,
1664              DataType dt,
1665              DRegister rd,
1666              const DOperand& operand);
1667 
1668   void vcnt(Condition cond, DataType dt, DRegister rd, DRegister rm);
1669 
1670   void vcnt(Condition cond, DataType dt, QRegister rd, QRegister rm);
1671 
1672   void vcvt(
1673       Condition cond, DataType dt1, DataType dt2, DRegister rd, SRegister rm);
1674 
1675   void vcvt(
1676       Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm);
1677 
1678   void vcvt(Condition cond,
1679             DataType dt1,
1680             DataType dt2,
1681             DRegister rd,
1682             DRegister rm,
1683             int32_t fbits);
1684 
1685   void vcvt(Condition cond,
1686             DataType dt1,
1687             DataType dt2,
1688             QRegister rd,
1689             QRegister rm,
1690             int32_t fbits);
1691 
1692   void vcvt(Condition cond,
1693             DataType dt1,
1694             DataType dt2,
1695             SRegister rd,
1696             SRegister rm,
1697             int32_t fbits);
1698 
1699   void vcvt(
1700       Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm);
1701 
1702   void vcvt(
1703       Condition cond, DataType dt1, DataType dt2, QRegister rd, QRegister rm);
1704 
1705   void vcvt(
1706       Condition cond, DataType dt1, DataType dt2, DRegister rd, QRegister rm);
1707 
1708   void vcvt(
1709       Condition cond, DataType dt1, DataType dt2, QRegister rd, DRegister rm);
1710 
1711   void vcvt(
1712       Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm);
1713 
1714   void vcvta(DataType dt1, DataType dt2, DRegister rd, DRegister rm);
1715 
1716   void vcvta(DataType dt1, DataType dt2, QRegister rd, QRegister rm);
1717 
1718   void vcvta(DataType dt1, DataType dt2, SRegister rd, SRegister rm);
1719 
1720   void vcvta(DataType dt1, DataType dt2, SRegister rd, DRegister rm);
1721 
1722   void vcvtb(
1723       Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm);
1724 
1725   void vcvtb(
1726       Condition cond, DataType dt1, DataType dt2, DRegister rd, SRegister rm);
1727 
1728   void vcvtb(
1729       Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm);
1730 
1731   void vcvtm(DataType dt1, DataType dt2, DRegister rd, DRegister rm);
1732 
1733   void vcvtm(DataType dt1, DataType dt2, QRegister rd, QRegister rm);
1734 
1735   void vcvtm(DataType dt1, DataType dt2, SRegister rd, SRegister rm);
1736 
1737   void vcvtm(DataType dt1, DataType dt2, SRegister rd, DRegister rm);
1738 
1739   void vcvtn(DataType dt1, DataType dt2, DRegister rd, DRegister rm);
1740 
1741   void vcvtn(DataType dt1, DataType dt2, QRegister rd, QRegister rm);
1742 
1743   void vcvtn(DataType dt1, DataType dt2, SRegister rd, SRegister rm);
1744 
1745   void vcvtn(DataType dt1, DataType dt2, SRegister rd, DRegister rm);
1746 
1747   void vcvtp(DataType dt1, DataType dt2, DRegister rd, DRegister rm);
1748 
1749   void vcvtp(DataType dt1, DataType dt2, QRegister rd, QRegister rm);
1750 
1751   void vcvtp(DataType dt1, DataType dt2, SRegister rd, SRegister rm);
1752 
1753   void vcvtp(DataType dt1, DataType dt2, SRegister rd, DRegister rm);
1754 
1755   void vcvtr(
1756       Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm);
1757 
1758   void vcvtr(
1759       Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm);
1760 
1761   void vcvtt(
1762       Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm);
1763 
1764   void vcvtt(
1765       Condition cond, DataType dt1, DataType dt2, DRegister rd, SRegister rm);
1766 
1767   void vcvtt(
1768       Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm);
1769 
1770   void vdiv(
1771       Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
1772 
1773   void vdiv(
1774       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1775 
1776   void vdup(Condition cond, DataType dt, QRegister rd, Register rt);
1777 
1778   void vdup(Condition cond, DataType dt, DRegister rd, Register rt);
1779 
1780   void vdup(Condition cond, DataType dt, DRegister rd, DRegisterLane rm);
1781 
1782   void vdup(Condition cond, DataType dt, QRegister rd, DRegisterLane rm);
1783 
1784   void veor(
1785       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1786 
1787   void veor(
1788       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1789 
1790   void vext(Condition cond,
1791             DataType dt,
1792             DRegister rd,
1793             DRegister rn,
1794             DRegister rm,
1795             const DOperand& operand);
1796 
1797   void vext(Condition cond,
1798             DataType dt,
1799             QRegister rd,
1800             QRegister rn,
1801             QRegister rm,
1802             const QOperand& operand);
1803 
1804   void vfma(
1805       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1806 
1807   void vfma(
1808       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1809 
1810   void vfma(
1811       Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
1812 
1813   void vfms(
1814       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1815 
1816   void vfms(
1817       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1818 
1819   void vfms(
1820       Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
1821 
1822   void vfnma(
1823       Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
1824 
1825   void vfnma(
1826       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1827 
1828   void vfnms(
1829       Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
1830 
1831   void vfnms(
1832       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1833 
1834   void vhadd(
1835       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1836 
1837   void vhadd(
1838       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1839 
1840   void vhsub(
1841       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1842 
1843   void vhsub(
1844       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1845 
1846   void vld1(Condition cond,
1847             DataType dt,
1848             const NeonRegisterList& nreglist,
1849             const AlignedMemOperand& operand);
1850 
1851   void vld2(Condition cond,
1852             DataType dt,
1853             const NeonRegisterList& nreglist,
1854             const AlignedMemOperand& operand);
1855 
1856   void vld3(Condition cond,
1857             DataType dt,
1858             const NeonRegisterList& nreglist,
1859             const AlignedMemOperand& operand);
1860 
1861   void vld3(Condition cond,
1862             DataType dt,
1863             const NeonRegisterList& nreglist,
1864             const MemOperand& operand);
1865 
1866   void vld4(Condition cond,
1867             DataType dt,
1868             const NeonRegisterList& nreglist,
1869             const AlignedMemOperand& operand);
1870 
1871   void vldm(Condition cond,
1872             DataType dt,
1873             Register rn,
1874             WriteBack write_back,
1875             DRegisterList dreglist);
1876 
1877   void vldm(Condition cond,
1878             DataType dt,
1879             Register rn,
1880             WriteBack write_back,
1881             SRegisterList sreglist);
1882 
1883   void vldmdb(Condition cond,
1884               DataType dt,
1885               Register rn,
1886               WriteBack write_back,
1887               DRegisterList dreglist);
1888 
1889   void vldmdb(Condition cond,
1890               DataType dt,
1891               Register rn,
1892               WriteBack write_back,
1893               SRegisterList sreglist);
1894 
1895   void vldmia(Condition cond,
1896               DataType dt,
1897               Register rn,
1898               WriteBack write_back,
1899               DRegisterList dreglist);
1900 
1901   void vldmia(Condition cond,
1902               DataType dt,
1903               Register rn,
1904               WriteBack write_back,
1905               SRegisterList sreglist);
1906 
1907   void vldr(Condition cond, DataType dt, DRegister rd, Location* location);
1908 
1909   void vldr(Condition cond,
1910             DataType dt,
1911             DRegister rd,
1912             const MemOperand& operand);
1913 
1914   void vldr(Condition cond, DataType dt, SRegister rd, Location* location);
1915 
1916   void vldr(Condition cond,
1917             DataType dt,
1918             SRegister rd,
1919             const MemOperand& operand);
1920 
1921   void vmax(
1922       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1923 
1924   void vmax(
1925       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1926 
1927   void vmaxnm(DataType dt, DRegister rd, DRegister rn, DRegister rm);
1928 
1929   void vmaxnm(DataType dt, QRegister rd, QRegister rn, QRegister rm);
1930 
1931   void vmaxnm(DataType dt, SRegister rd, SRegister rn, SRegister rm);
1932 
1933   void vmin(
1934       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1935 
1936   void vmin(
1937       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1938 
1939   void vminnm(DataType dt, DRegister rd, DRegister rn, DRegister rm);
1940 
1941   void vminnm(DataType dt, QRegister rd, QRegister rn, QRegister rm);
1942 
1943   void vminnm(DataType dt, SRegister rd, SRegister rn, SRegister rm);
1944 
1945   void vmla(Condition cond,
1946             DataType dt,
1947             DRegister rd,
1948             DRegister rn,
1949             DRegisterLane rm);
1950 
1951   void vmla(Condition cond,
1952             DataType dt,
1953             QRegister rd,
1954             QRegister rn,
1955             DRegisterLane rm);
1956 
1957   void vmla(
1958       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1959 
1960   void vmla(
1961       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1962 
1963   void vmla(
1964       Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
1965 
1966   void vmlal(Condition cond,
1967              DataType dt,
1968              QRegister rd,
1969              DRegister rn,
1970              DRegisterLane rm);
1971 
1972   void vmlal(
1973       Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm);
1974 
1975   void vmls(Condition cond,
1976             DataType dt,
1977             DRegister rd,
1978             DRegister rn,
1979             DRegisterLane rm);
1980 
1981   void vmls(Condition cond,
1982             DataType dt,
1983             QRegister rd,
1984             QRegister rn,
1985             DRegisterLane rm);
1986 
1987   void vmls(
1988       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1989 
1990   void vmls(
1991       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
1992 
1993   void vmls(
1994       Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
1995 
1996   void vmlsl(Condition cond,
1997              DataType dt,
1998              QRegister rd,
1999              DRegister rn,
2000              DRegisterLane rm);
2001 
2002   void vmlsl(
2003       Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm);
2004 
2005   void vmov(Condition cond, Register rt, SRegister rn);
2006 
2007   void vmov(Condition cond, SRegister rn, Register rt);
2008 
2009   void vmov(Condition cond, Register rt, Register rt2, DRegister rm);
2010 
2011   void vmov(Condition cond, DRegister rm, Register rt, Register rt2);
2012 
2013   void vmov(
2014       Condition cond, Register rt, Register rt2, SRegister rm, SRegister rm1);
2015 
2016   void vmov(
2017       Condition cond, SRegister rm, SRegister rm1, Register rt, Register rt2);
2018 
2019   void vmov(Condition cond, DataType dt, DRegisterLane rd, Register rt);
2020 
2021   void vmov(Condition cond, DataType dt, DRegister rd, const DOperand& operand);
2022 
2023   void vmov(Condition cond, DataType dt, QRegister rd, const QOperand& operand);
2024 
2025   void vmov(Condition cond, DataType dt, SRegister rd, const SOperand& operand);
2026 
2027   void vmov(Condition cond, DataType dt, Register rt, DRegisterLane rn);
2028 
2029   void vmovl(Condition cond, DataType dt, QRegister rd, DRegister rm);
2030 
2031   void vmovn(Condition cond, DataType dt, DRegister rd, QRegister rm);
2032 
2033   void vmrs(Condition cond, RegisterOrAPSR_nzcv rt, SpecialFPRegister spec_reg);
2034 
2035   void vmsr(Condition cond, SpecialFPRegister spec_reg, Register rt);
2036 
2037   void vmul(Condition cond,
2038             DataType dt,
2039             DRegister rd,
2040             DRegister rn,
2041             DRegister dm,
2042             unsigned index);
2043 
2044   void vmul(Condition cond,
2045             DataType dt,
2046             QRegister rd,
2047             QRegister rn,
2048             DRegister dm,
2049             unsigned index);
2050 
2051   void vmul(
2052       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
2053 
2054   void vmul(
2055       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
2056 
2057   void vmul(
2058       Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
2059 
2060   void vmull(Condition cond,
2061              DataType dt,
2062              QRegister rd,
2063              DRegister rn,
2064              DRegister dm,
2065              unsigned index);
2066 
2067   void vmull(
2068       Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm);
2069 
2070   void vmvn(Condition cond, DataType dt, DRegister rd, const DOperand& operand);
2071 
2072   void vmvn(Condition cond, DataType dt, QRegister rd, const QOperand& operand);
2073 
2074   void vneg(Condition cond, DataType dt, DRegister rd, DRegister rm);
2075 
2076   void vneg(Condition cond, DataType dt, QRegister rd, QRegister rm);
2077 
2078   void vneg(Condition cond, DataType dt, SRegister rd, SRegister rm);
2079 
2080   void vnmla(
2081       Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
2082 
2083   void vnmla(
2084       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
2085 
2086   void vnmls(
2087       Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
2088 
2089   void vnmls(
2090       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
2091 
2092   void vnmul(
2093       Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
2094 
2095   void vnmul(
2096       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
2097 
2098   void vorn(Condition cond,
2099             DataType dt,
2100             DRegister rd,
2101             DRegister rn,
2102             const DOperand& operand);
2103 
2104   void vorn(Condition cond,
2105             DataType dt,
2106             QRegister rd,
2107             QRegister rn,
2108             const QOperand& operand);
2109 
2110   void vorr(Condition cond,
2111             DataType dt,
2112             DRegister rd,
2113             DRegister rn,
2114             const DOperand& operand);
2115 
2116   void vorr(Condition cond,
2117             DataType dt,
2118             QRegister rd,
2119             QRegister rn,
2120             const QOperand& operand);
2121 
2122   void vpadal(Condition cond, DataType dt, DRegister rd, DRegister rm);
2123 
2124   void vpadal(Condition cond, DataType dt, QRegister rd, QRegister rm);
2125 
2126   void vpadd(
2127       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
2128 
2129   void vpaddl(Condition cond, DataType dt, DRegister rd, DRegister rm);
2130 
2131   void vpaddl(Condition cond, DataType dt, QRegister rd, QRegister rm);
2132 
2133   void vpmax(
2134       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
2135 
2136   void vpmin(
2137       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
2138 
2139   void vpop(Condition cond, DataType dt, DRegisterList dreglist);
2140 
2141   void vpop(Condition cond, DataType dt, SRegisterList sreglist);
2142 
2143   void vpush(Condition cond, DataType dt, DRegisterList dreglist);
2144 
2145   void vpush(Condition cond, DataType dt, SRegisterList sreglist);
2146 
2147   void vqabs(Condition cond, DataType dt, DRegister rd, DRegister rm);
2148 
2149   void vqabs(Condition cond, DataType dt, QRegister rd, QRegister rm);
2150 
2151   void vqadd(
2152       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
2153 
2154   void vqadd(
2155       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
2156 
2157   void vqdmlal(
2158       Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm);
2159 
2160   void vqdmlal(Condition cond,
2161                DataType dt,
2162                QRegister rd,
2163                DRegister rn,
2164                DRegister dm,
2165                unsigned index);
2166 
2167   void vqdmlsl(
2168       Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm);
2169 
2170   void vqdmlsl(Condition cond,
2171                DataType dt,
2172                QRegister rd,
2173                DRegister rn,
2174                DRegister dm,
2175                unsigned index);
2176 
2177   void vqdmulh(
2178       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
2179 
2180   void vqdmulh(
2181       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
2182 
2183   void vqdmulh(Condition cond,
2184                DataType dt,
2185                DRegister rd,
2186                DRegister rn,
2187                DRegisterLane rm);
2188 
2189   void vqdmulh(Condition cond,
2190                DataType dt,
2191                QRegister rd,
2192                QRegister rn,
2193                DRegisterLane rm);
2194 
2195   void vqdmull(
2196       Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm);
2197 
2198   void vqdmull(Condition cond,
2199                DataType dt,
2200                QRegister rd,
2201                DRegister rn,
2202                DRegisterLane rm);
2203 
2204   void vqmovn(Condition cond, DataType dt, DRegister rd, QRegister rm);
2205 
2206   void vqmovun(Condition cond, DataType dt, DRegister rd, QRegister rm);
2207 
2208   void vqneg(Condition cond, DataType dt, DRegister rd, DRegister rm);
2209 
2210   void vqneg(Condition cond, DataType dt, QRegister rd, QRegister rm);
2211 
2212   void vqrdmulh(
2213       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
2214 
2215   void vqrdmulh(
2216       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
2217 
2218   void vqrdmulh(Condition cond,
2219                 DataType dt,
2220                 DRegister rd,
2221                 DRegister rn,
2222                 DRegisterLane rm);
2223 
2224   void vqrdmulh(Condition cond,
2225                 DataType dt,
2226                 QRegister rd,
2227                 QRegister rn,
2228                 DRegisterLane rm);
2229 
2230   void vqrshl(
2231       Condition cond, DataType dt, DRegister rd, DRegister rm, DRegister rn);
2232 
2233   void vqrshl(
2234       Condition cond, DataType dt, QRegister rd, QRegister rm, QRegister rn);
2235 
2236   void vqrshrn(Condition cond,
2237                DataType dt,
2238                DRegister rd,
2239                QRegister rm,
2240                const QOperand& operand);
2241 
2242   void vqrshrun(Condition cond,
2243                 DataType dt,
2244                 DRegister rd,
2245                 QRegister rm,
2246                 const QOperand& operand);
2247 
2248   void vqshl(Condition cond,
2249              DataType dt,
2250              DRegister rd,
2251              DRegister rm,
2252              const DOperand& operand);
2253 
2254   void vqshl(Condition cond,
2255              DataType dt,
2256              QRegister rd,
2257              QRegister rm,
2258              const QOperand& operand);
2259 
2260   void vqshlu(Condition cond,
2261               DataType dt,
2262               DRegister rd,
2263               DRegister rm,
2264               const DOperand& operand);
2265 
2266   void vqshlu(Condition cond,
2267               DataType dt,
2268               QRegister rd,
2269               QRegister rm,
2270               const QOperand& operand);
2271 
2272   void vqshrn(Condition cond,
2273               DataType dt,
2274               DRegister rd,
2275               QRegister rm,
2276               const QOperand& operand);
2277 
2278   void vqshrun(Condition cond,
2279                DataType dt,
2280                DRegister rd,
2281                QRegister rm,
2282                const QOperand& operand);
2283 
2284   void vqsub(
2285       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
2286 
2287   void vqsub(
2288       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
2289 
2290   void vraddhn(
2291       Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm);
2292 
2293   void vrecpe(Condition cond, DataType dt, DRegister rd, DRegister rm);
2294 
2295   void vrecpe(Condition cond, DataType dt, QRegister rd, QRegister rm);
2296 
2297   void vrecps(
2298       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
2299 
2300   void vrecps(
2301       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
2302 
2303   void vrev16(Condition cond, DataType dt, DRegister rd, DRegister rm);
2304 
2305   void vrev16(Condition cond, DataType dt, QRegister rd, QRegister rm);
2306 
2307   void vrev32(Condition cond, DataType dt, DRegister rd, DRegister rm);
2308 
2309   void vrev32(Condition cond, DataType dt, QRegister rd, QRegister rm);
2310 
2311   void vrev64(Condition cond, DataType dt, DRegister rd, DRegister rm);
2312 
2313   void vrev64(Condition cond, DataType dt, QRegister rd, QRegister rm);
2314 
2315   void vrhadd(
2316       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
2317 
2318   void vrhadd(
2319       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
2320 
2321   void vrinta(DataType dt, DRegister rd, DRegister rm);
2322 
2323   void vrinta(DataType dt, QRegister rd, QRegister rm);
2324 
2325   void vrinta(DataType dt, SRegister rd, SRegister rm);
2326 
2327   void vrintm(DataType dt, DRegister rd, DRegister rm);
2328 
2329   void vrintm(DataType dt, QRegister rd, QRegister rm);
2330 
2331   void vrintm(DataType dt, SRegister rd, SRegister rm);
2332 
2333   void vrintn(DataType dt, DRegister rd, DRegister rm);
2334 
2335   void vrintn(DataType dt, QRegister rd, QRegister rm);
2336 
2337   void vrintn(DataType dt, SRegister rd, SRegister rm);
2338 
2339   void vrintp(DataType dt, DRegister rd, DRegister rm);
2340 
2341   void vrintp(DataType dt, QRegister rd, QRegister rm);
2342 
2343   void vrintp(DataType dt, SRegister rd, SRegister rm);
2344 
2345   void vrintr(Condition cond, DataType dt, SRegister rd, SRegister rm);
2346 
2347   void vrintr(Condition cond, DataType dt, DRegister rd, DRegister rm);
2348 
2349   void vrintx(Condition cond, DataType dt, DRegister rd, DRegister rm);
2350 
2351   void vrintx(DataType dt, QRegister rd, QRegister rm);
2352 
2353   void vrintx(Condition cond, DataType dt, SRegister rd, SRegister rm);
2354 
2355   void vrintz(Condition cond, DataType dt, DRegister rd, DRegister rm);
2356 
2357   void vrintz(DataType dt, QRegister rd, QRegister rm);
2358 
2359   void vrintz(Condition cond, DataType dt, SRegister rd, SRegister rm);
2360 
2361   void vrshl(
2362       Condition cond, DataType dt, DRegister rd, DRegister rm, DRegister rn);
2363 
2364   void vrshl(
2365       Condition cond, DataType dt, QRegister rd, QRegister rm, QRegister rn);
2366 
2367   void vrshr(Condition cond,
2368              DataType dt,
2369              DRegister rd,
2370              DRegister rm,
2371              const DOperand& operand);
2372 
2373   void vrshr(Condition cond,
2374              DataType dt,
2375              QRegister rd,
2376              QRegister rm,
2377              const QOperand& operand);
2378 
2379   void vrshrn(Condition cond,
2380               DataType dt,
2381               DRegister rd,
2382               QRegister rm,
2383               const QOperand& operand);
2384 
2385   void vrsqrte(Condition cond, DataType dt, DRegister rd, DRegister rm);
2386 
2387   void vrsqrte(Condition cond, DataType dt, QRegister rd, QRegister rm);
2388 
2389   void vrsqrts(
2390       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
2391 
2392   void vrsqrts(
2393       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
2394 
2395   void vrsra(Condition cond,
2396              DataType dt,
2397              DRegister rd,
2398              DRegister rm,
2399              const DOperand& operand);
2400 
2401   void vrsra(Condition cond,
2402              DataType dt,
2403              QRegister rd,
2404              QRegister rm,
2405              const QOperand& operand);
2406 
2407   void vrsubhn(
2408       Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm);
2409 
2410   void vseleq(DataType dt, DRegister rd, DRegister rn, DRegister rm);
2411 
2412   void vseleq(DataType dt, SRegister rd, SRegister rn, SRegister rm);
2413 
2414   void vselge(DataType dt, DRegister rd, DRegister rn, DRegister rm);
2415 
2416   void vselge(DataType dt, SRegister rd, SRegister rn, SRegister rm);
2417 
2418   void vselgt(DataType dt, DRegister rd, DRegister rn, DRegister rm);
2419 
2420   void vselgt(DataType dt, SRegister rd, SRegister rn, SRegister rm);
2421 
2422   void vselvs(DataType dt, DRegister rd, DRegister rn, DRegister rm);
2423 
2424   void vselvs(DataType dt, SRegister rd, SRegister rn, SRegister rm);
2425 
2426   void vshl(Condition cond,
2427             DataType dt,
2428             DRegister rd,
2429             DRegister rm,
2430             const DOperand& operand);
2431 
2432   void vshl(Condition cond,
2433             DataType dt,
2434             QRegister rd,
2435             QRegister rm,
2436             const QOperand& operand);
2437 
2438   void vshll(Condition cond,
2439              DataType dt,
2440              QRegister rd,
2441              DRegister rm,
2442              const DOperand& operand);
2443 
2444   void vshr(Condition cond,
2445             DataType dt,
2446             DRegister rd,
2447             DRegister rm,
2448             const DOperand& operand);
2449 
2450   void vshr(Condition cond,
2451             DataType dt,
2452             QRegister rd,
2453             QRegister rm,
2454             const QOperand& operand);
2455 
2456   void vshrn(Condition cond,
2457              DataType dt,
2458              DRegister rd,
2459              QRegister rm,
2460              const QOperand& operand);
2461 
2462   void vsli(Condition cond,
2463             DataType dt,
2464             DRegister rd,
2465             DRegister rm,
2466             const DOperand& operand);
2467 
2468   void vsli(Condition cond,
2469             DataType dt,
2470             QRegister rd,
2471             QRegister rm,
2472             const QOperand& operand);
2473 
2474   void vsqrt(Condition cond, DataType dt, SRegister rd, SRegister rm);
2475 
2476   void vsqrt(Condition cond, DataType dt, DRegister rd, DRegister rm);
2477 
2478   void vsra(Condition cond,
2479             DataType dt,
2480             DRegister rd,
2481             DRegister rm,
2482             const DOperand& operand);
2483 
2484   void vsra(Condition cond,
2485             DataType dt,
2486             QRegister rd,
2487             QRegister rm,
2488             const QOperand& operand);
2489 
2490   void vsri(Condition cond,
2491             DataType dt,
2492             DRegister rd,
2493             DRegister rm,
2494             const DOperand& operand);
2495 
2496   void vsri(Condition cond,
2497             DataType dt,
2498             QRegister rd,
2499             QRegister rm,
2500             const QOperand& operand);
2501 
2502   void vst1(Condition cond,
2503             DataType dt,
2504             const NeonRegisterList& nreglist,
2505             const AlignedMemOperand& operand);
2506 
2507   void vst2(Condition cond,
2508             DataType dt,
2509             const NeonRegisterList& nreglist,
2510             const AlignedMemOperand& operand);
2511 
2512   void vst3(Condition cond,
2513             DataType dt,
2514             const NeonRegisterList& nreglist,
2515             const AlignedMemOperand& operand);
2516 
2517   void vst3(Condition cond,
2518             DataType dt,
2519             const NeonRegisterList& nreglist,
2520             const MemOperand& operand);
2521 
2522   void vst4(Condition cond,
2523             DataType dt,
2524             const NeonRegisterList& nreglist,
2525             const AlignedMemOperand& operand);
2526 
2527   void vstm(Condition cond,
2528             DataType dt,
2529             Register rn,
2530             WriteBack write_back,
2531             DRegisterList dreglist);
2532 
2533   void vstm(Condition cond,
2534             DataType dt,
2535             Register rn,
2536             WriteBack write_back,
2537             SRegisterList sreglist);
2538 
2539   void vstmdb(Condition cond,
2540               DataType dt,
2541               Register rn,
2542               WriteBack write_back,
2543               DRegisterList dreglist);
2544 
2545   void vstmdb(Condition cond,
2546               DataType dt,
2547               Register rn,
2548               WriteBack write_back,
2549               SRegisterList sreglist);
2550 
2551   void vstmia(Condition cond,
2552               DataType dt,
2553               Register rn,
2554               WriteBack write_back,
2555               DRegisterList dreglist);
2556 
2557   void vstmia(Condition cond,
2558               DataType dt,
2559               Register rn,
2560               WriteBack write_back,
2561               SRegisterList sreglist);
2562 
2563   void vstr(Condition cond,
2564             DataType dt,
2565             DRegister rd,
2566             const MemOperand& operand);
2567 
2568   void vstr(Condition cond,
2569             DataType dt,
2570             SRegister rd,
2571             const MemOperand& operand);
2572 
2573   void vsub(
2574       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
2575 
2576   void vsub(
2577       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
2578 
2579   void vsub(
2580       Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
2581 
2582   void vsubhn(
2583       Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm);
2584 
2585   void vsubl(
2586       Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm);
2587 
2588   void vsubw(
2589       Condition cond, DataType dt, QRegister rd, QRegister rn, DRegister rm);
2590 
2591   void vswp(Condition cond, DataType dt, DRegister rd, DRegister rm);
2592 
2593   void vswp(Condition cond, DataType dt, QRegister rd, QRegister rm);
2594 
2595   void vtbl(Condition cond,
2596             DataType dt,
2597             DRegister rd,
2598             const NeonRegisterList& nreglist,
2599             DRegister rm);
2600 
2601   void vtbx(Condition cond,
2602             DataType dt,
2603             DRegister rd,
2604             const NeonRegisterList& nreglist,
2605             DRegister rm);
2606 
2607   void vtrn(Condition cond, DataType dt, DRegister rd, DRegister rm);
2608 
2609   void vtrn(Condition cond, DataType dt, QRegister rd, QRegister rm);
2610 
2611   void vtst(
2612       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
2613 
2614   void vtst(
2615       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
2616 
2617   void vuzp(Condition cond, DataType dt, DRegister rd, DRegister rm);
2618 
2619   void vuzp(Condition cond, DataType dt, QRegister rd, QRegister rm);
2620 
2621   void vzip(Condition cond, DataType dt, DRegister rd, DRegister rm);
2622 
2623   void vzip(Condition cond, DataType dt, QRegister rd, QRegister rm);
2624 
2625   void yield(Condition cond, EncodingSize size);
2626 
2627   int T32Size(uint32_t instr);
2628   void DecodeT32(uint32_t instr);
2629   void DecodeA32(uint32_t instr);
2630 };
2631 
2632 DataTypeValue Dt_L_imm6_1_Decode(uint32_t value, uint32_t type_value);
2633 DataTypeValue Dt_L_imm6_2_Decode(uint32_t value, uint32_t type_value);
2634 DataTypeValue Dt_L_imm6_3_Decode(uint32_t value);
2635 DataTypeValue Dt_L_imm6_4_Decode(uint32_t value);
2636 DataTypeValue Dt_imm6_1_Decode(uint32_t value, uint32_t type_value);
2637 DataTypeValue Dt_imm6_2_Decode(uint32_t value, uint32_t type_value);
2638 DataTypeValue Dt_imm6_3_Decode(uint32_t value);
2639 DataTypeValue Dt_imm6_4_Decode(uint32_t value, uint32_t type_value);
2640 DataTypeValue Dt_op_U_size_1_Decode(uint32_t value);
2641 DataTypeValue Dt_op_size_1_Decode(uint32_t value);
2642 DataTypeValue Dt_op_size_2_Decode(uint32_t value);
2643 DataTypeValue Dt_op_size_3_Decode(uint32_t value);
2644 DataTypeValue Dt_U_imm3H_1_Decode(uint32_t value);
2645 DataTypeValue Dt_U_opc1_opc2_1_Decode(uint32_t value, unsigned* lane);
2646 DataTypeValue Dt_opc1_opc2_1_Decode(uint32_t value, unsigned* lane);
2647 DataTypeValue Dt_imm4_1_Decode(uint32_t value, unsigned* lane);
2648 DataTypeValue Dt_B_E_1_Decode(uint32_t value);
2649 DataTypeValue Dt_op_1_Decode1(uint32_t value);
2650 DataTypeValue Dt_op_1_Decode2(uint32_t value);
2651 DataTypeValue Dt_op_2_Decode(uint32_t value);
2652 DataTypeValue Dt_op_3_Decode(uint32_t value);
2653 DataTypeValue Dt_U_sx_1_Decode(uint32_t value);
2654 DataTypeValue Dt_op_U_1_Decode1(uint32_t value);
2655 DataTypeValue Dt_op_U_1_Decode2(uint32_t value);
2656 DataTypeValue Dt_sz_1_Decode(uint32_t value);
2657 DataTypeValue Dt_F_size_1_Decode(uint32_t value);
2658 DataTypeValue Dt_F_size_2_Decode(uint32_t value);
2659 DataTypeValue Dt_F_size_3_Decode(uint32_t value);
2660 DataTypeValue Dt_F_size_4_Decode(uint32_t value);
2661 DataTypeValue Dt_U_size_1_Decode(uint32_t value);
2662 DataTypeValue Dt_U_size_2_Decode(uint32_t value);
2663 DataTypeValue Dt_U_size_3_Decode(uint32_t value);
2664 DataTypeValue Dt_size_1_Decode(uint32_t value);
2665 DataTypeValue Dt_size_2_Decode(uint32_t value);
2666 DataTypeValue Dt_size_3_Decode(uint32_t value);
2667 DataTypeValue Dt_size_4_Decode(uint32_t value);
2668 DataTypeValue Dt_size_5_Decode(uint32_t value);
2669 DataTypeValue Dt_size_6_Decode(uint32_t value);
2670 DataTypeValue Dt_size_7_Decode(uint32_t value);
2671 DataTypeValue Dt_size_8_Decode(uint32_t value);
2672 DataTypeValue Dt_size_9_Decode(uint32_t value, uint32_t type_value);
2673 DataTypeValue Dt_size_10_Decode(uint32_t value);
2674 DataTypeValue Dt_size_11_Decode(uint32_t value, uint32_t type_value);
2675 DataTypeValue Dt_size_12_Decode(uint32_t value, uint32_t type_value);
2676 DataTypeValue Dt_size_13_Decode(uint32_t value);
2677 DataTypeValue Dt_size_14_Decode(uint32_t value);
2678 DataTypeValue Dt_size_15_Decode(uint32_t value);
2679 DataTypeValue Dt_size_16_Decode(uint32_t value);
2680 DataTypeValue Dt_size_17_Decode(uint32_t value);
2681 // End of generated code.
2682 
2683 class PrintDisassembler : public Disassembler {
2684  public:
2685   explicit PrintDisassembler(std::ostream& os,  // NOLINT(runtime/references)
2686                              uint32_t code_address = 0)
Disassembler(os,code_address)2687       : Disassembler(os, code_address) {}
2688   explicit PrintDisassembler(DisassemblerStream* os, uint32_t code_address = 0)
Disassembler(os,code_address)2689       : Disassembler(os, code_address) {}
2690 
PrintCodeAddress(uint32_t code_address)2691   virtual void PrintCodeAddress(uint32_t code_address) {
2692     os() << "0x" << std::hex << std::setw(8) << std::setfill('0')
2693          << code_address << "\t";
2694   }
2695 
PrintOpcode16(uint32_t opcode)2696   virtual void PrintOpcode16(uint32_t opcode) {
2697     os() << std::hex << std::setw(4) << std::setfill('0') << opcode << "    "
2698          << std::dec << "\t";
2699   }
2700 
PrintOpcode32(uint32_t opcode)2701   virtual void PrintOpcode32(uint32_t opcode) {
2702     os() << std::hex << std::setw(8) << std::setfill('0') << opcode << std::dec
2703          << "\t";
2704   }
2705 
DecodeA32At(const uint32_t * instruction_address)2706   const uint32_t* DecodeA32At(const uint32_t* instruction_address) {
2707     DecodeA32(*instruction_address);
2708     return instruction_address + 1;
2709   }
2710 
2711   // Returns the address of the next instruction.
2712   const uint16_t* DecodeT32At(const uint16_t* instruction_address,
2713                               const uint16_t* buffer_end);
2714   void DecodeT32(uint32_t instruction);
2715   void DecodeA32(uint32_t instruction);
2716   void DisassembleA32Buffer(const uint32_t* buffer, size_t size_in_bytes);
2717   void DisassembleT32Buffer(const uint16_t* buffer, size_t size_in_bytes);
2718 };
2719 
2720 }  // namespace aarch32
2721 }  // namespace vixl
2722 
2723 #endif  // VIXL_DISASM_AARCH32_H_
2724