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1 /* Copyright 2019 The TensorFlow Authors. All Rights Reserved.
2 
3 Licensed under the Apache License, Version 2.0 (the "License");
4 you may not use this file except in compliance with the License.
5 You may obtain a copy of the License at
6 
7     http://www.apache.org/licenses/LICENSE-2.0
8 
9 Unless required by applicable law or agreed to in writing, software
10 distributed under the License is distributed on an "AS IS" BASIS,
11 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 See the License for the specific language governing permissions and
13 limitations under the License.
14 ==============================================================================*/
15 
16 #include "tensorflow/lite/delegates/gpu/common/tasks/padding.h"
17 
18 #include <string>
19 
20 #include "tensorflow/lite/delegates/gpu/common/operations.h"
21 #include "tensorflow/lite/delegates/gpu/common/task/work_group_picking.h"
22 
23 namespace tflite {
24 namespace gpu {
25 
26 namespace {
GetPaddingCode(const OperationDef & op_def,const PadAttributes & attr,GPUOperation * op)27 std::string GetPaddingCode(const OperationDef& op_def,
28                            const PadAttributes& attr, GPUOperation* op) {
29   op->AddSrcTensor("src_tensor", op_def.src_tensors[0]);
30   op->AddDstTensor("dst_tensor", op_def.dst_tensors[0]);
31   op->args_.AddInt("prepended_x", attr.prepended.w);
32   op->args_.AddInt("prepended_y", attr.prepended.h);
33   op->args_.AddInt("prepended_z", attr.prepended.c);
34   op->args_.AddInt("prepended_w", attr.prepended.b);
35 
36   const std::string dst_batch =
37       op_def.dst_tensors[0].HasAxis(Axis::BATCH) ? "B" : "0";
38   std::string c;
39   const std::string channels[] = {".x", ".y", ".z", ".w"};
40 
41   if (attr.type == PaddingContentType::REFLECT) {
42     c += "int reflect(int x, int size) {\n";
43     c += "  int t = abs(x) - size + 1;\n";
44     c += "  return size - 1 - abs(t);\n";
45     c += "}\n\n";
46   }
47 
48   c += "MAIN_FUNCTION($0) {\n";
49   if (op_def.dst_tensors[0].HasAxis(Axis::BATCH)) {
50     c += "  int linear_id = GLOBAL_ID_0;\n";
51     c += "  int X = linear_id / args.dst_tensor.Batch();\n";
52     c += "  int B = linear_id % args.dst_tensor.Batch();\n";
53     c += "  args.dst_tensor.SetBatchRef(B);\n";
54   } else {
55     c += "  int X = GLOBAL_ID_0;\n";
56   }
57   c += "  int Y = GLOBAL_ID_1;\n";
58   c += "  int Z = GLOBAL_ID_2;\n";
59   c += "  if (X >= args.dst_tensor.Width() || Y >= args.dst_tensor.Height() || "
60        "Z >= args.dst_tensor.Slices()) { \n";
61   c += "    return; \n";
62   c += "  } \n";
63   c += "  FLT4 result = INIT_FLT4(0.0);\n";
64   c += "  int s_x = X - args.prepended_x;\n";
65   c += "  int s_y = Y - args.prepended_y;\n";
66   if (op_def.src_tensors[0].HasAxis(Axis::BATCH)) {
67     c += "  int s_b = " + dst_batch + " - args.prepended_w;\n";
68     c += "  args.src_tensor.SetBatchRef(s_b);\n";
69   }
70   if (attr.type == PaddingContentType::REFLECT) {
71     c += "  s_x = reflect(s_x, args.src_tensor.Width());\n";
72     c += "  s_y = reflect(s_y, args.src_tensor.Height());\n";
73     if (op_def.src_tensors[0].HasAxis(Axis::BATCH)) {
74       c += "  int s_b = reflect(s_b, args.src_tensor.Batch());\n";
75     }
76     if (attr.prepended.c == 0 && attr.appended.c == 0) {
77       // optimized case
78       c += "  result = args.src_tensor.Read(s_x, s_y, Z);\n";
79     } else {
80       c += "  int start_channel = Z * 4;\n";
81       for (int i = 0; i < 4; ++i) {
82         const auto& s = channels[i];
83         c += "  {\n";
84         c += "    int channel = start_channel + " + std::to_string(i) + ";\n";
85         c += "    int s_z = channel - args.prepended_z;\n";
86         // We need additional clamp for z, so that we use alignment for channels
87         // and can proceed extra channels that can lead to reading out of
88         // resource.
89         c += "    s_z = clamp(reflect(s_z, args.src_tensor.Channels()), 0, "
90              "args.src_tensor.Channels() - "
91              "1);\n";
92         c += "    FLT4 t = args.src_tensor.Read(s_x, s_y, s_z / 4);\n";
93         c += "    FLT t_ar[4] = {t.x, t.y, t.z, t.w};\n";
94         c += "    result" + s + " = t_ar[s_z % 4];\n";
95         c += "  }\n";
96       }
97     }
98   } else {
99     c += "  bool inside_x = s_x >= 0 && s_x < args.src_tensor.Width();\n";
100     c += "  bool inside_y = s_y >= 0 && s_y < args.src_tensor.Height();\n";
101     if (op_def.src_tensors[0].HasAxis(Axis::BATCH)) {
102       c += "  inside_y &= (s_b >= 0 && s_b < args.src_tensor.Batch());\n";
103     }
104     c += "  if (inside_x && inside_y) {\n";
105     if (attr.prepended.c == 0 && attr.appended.c == 0) {
106       // optimized case
107       c += "    result = args.src_tensor.Read(s_x, s_y, Z);\n";
108     } else if (attr.prepended.c % 4 == 0) {
109       c += "    int s_z = Z - args.prepended_z / 4;\n";
110       c += "    if (s_z >= 0 && s_z < args.src_tensor.Slices()) {\n";
111       c += "      result = args.src_tensor.Read(s_x, s_y, s_z);\n";
112       c += "    }\n";
113     } else {
114       c += "    int start_channel = Z * 4;\n";
115       for (int i = 0; i < 4; ++i) {
116         const auto& s = channels[i];
117         c += "    {\n";
118         c += "    int channel = start_channel + " + std::to_string(i) + ";\n";
119         c += "    int s_z = channel - args.prepended_z;\n";
120         c += "    if (s_z >= 0 && s_z < args.src_tensor.Channels()) {\n";
121         c += "      FLT4 t = args.src_tensor.Read(s_x, s_y, s_z / 4);\n";
122         c += "      FLT t_ar[4] = {t.x, t.y, t.z, t.w};\n";
123         c += "      result" + s + " = t_ar[s_z % 4];\n";
124         c += "    }\n";
125         c += "    }\n";
126       }
127     }
128     c += "  }\n";
129   }
130   c += "  args.dst_tensor.Write(result, X, Y, Z);\n";
131   c += "}\n";
132 
133   return c;
134 }
135 
136 }  // namespace
137 
CreatePadding(const OperationDef & definition,const PadAttributes & attr)138 GPUOperation CreatePadding(const OperationDef& definition,
139                            const PadAttributes& attr) {
140   GPUOperation op(definition);
141   op.code_ = GetPaddingCode(definition, attr, &op);
142   op.tensor_to_grid_ = TensorToGrid::kWBToX_HDToY_SToZ;
143   return op;
144 }
145 
146 }  // namespace gpu
147 }  // namespace tflite
148