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Searched defs:Cycles (Results 1 – 25 of 46) sorted by relevance

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/external/llvm/lib/Target/X86/
DX86PadShortFunction.cpp44 unsigned int Cycles; member
122 unsigned int Cycles = 0; in runOnMachineFunction() local
153 void PadShortFunc::findReturns(MachineBasicBlock *MBB, unsigned int Cycles) { in findReturns()
178 unsigned int &Cycles) { in cyclesUntilReturn()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86PadShortFunction.cpp44 unsigned int Cycles; member
134 unsigned Cycles = I->second; in runOnMachineFunction() local
164 void PadShortFunc::findReturns(MachineBasicBlock *MBB, unsigned int Cycles) { in findReturns()
189 unsigned int &Cycles) { in cyclesUntilReturn()
/external/llvm-project/llvm/lib/Target/X86/
DX86PadShortFunction.cpp44 unsigned int Cycles; member
135 unsigned Cycles = I->second; in runOnMachineFunction() local
165 void PadShortFunc::findReturns(MachineBasicBlock *MBB, unsigned int Cycles) { in findReturns()
190 unsigned int &Cycles) { in cyclesUntilReturn()
/external/llvm-project/llvm/include/llvm/MCA/
DPipeline.h57 unsigned Cycles; variable
DSupport.h56 : Numerator(Cycles), Denominator(ResourceUnits) {} in Numerator() argument
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MCA/
DPipeline.h59 unsigned Cycles; variable
DSupport.h56 : Numerator(Cycles), Denominator(ResourceUnits) {} in Numerator() argument
/external/llvm-project/llvm/tools/llvm-mca/Views/
DTimelineView.cpp22 unsigned Cycles) in TimelineView()
119 static void tryChangeColor(raw_ostream &OS, unsigned Cycles, in tryChangeColor()
253 static void printTimelineHeader(formatted_raw_ostream &OS, unsigned Cycles) { in printTimelineHeader()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/MCA/
DInstruction.cpp22 unsigned Cycles) { in writeStartEvent()
30 void ReadState::writeStartEvent(unsigned IID, MCPhysReg RegID, unsigned Cycles) { in writeStartEvent()
/external/llvm-project/llvm/lib/MCA/
DInstruction.cpp22 unsigned Cycles) { in writeStartEvent()
30 void ReadState::writeStartEvent(unsigned IID, MCPhysReg RegID, unsigned Cycles) { in writeStartEvent()
/external/llvm/include/llvm/MC/
DMCSchedule.h57 unsigned Cycles; member
70 int Cycles; member
89 int Cycles; member
/external/llvm-project/llvm/lib/MCA/Stages/
DInstructionTables.cpp32 unsigned Cycles = Resource.second.size(); in execute() local
/external/swiftshader/third_party/llvm-10.0/llvm/lib/MCA/Stages/
DInstructionTables.cpp32 unsigned Cycles = Resource.second.size(); in execute() local
/external/dagger2/javatests/dagger/functional/cycle/
DCycles.java39 final class Cycles { class
40 private Cycles() {} in Cycles() method in Cycles
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MC/
DMCSchedule.h66 uint16_t Cycles; member
79 int16_t Cycles; member
98 int Cycles; member
/external/llvm-project/llvm/include/llvm/MC/
DMCSchedule.h66 uint16_t Cycles; member
79 int16_t Cycles; member
98 int Cycles; member
/external/llvm-project/llvm/lib/CodeGen/
DEarlyIfConversion.cpp802 struct Cycles { struct
803 const char *Key;
804 unsigned Value;
1082 unsigned Cycles = 0; in shouldConvertIf() local
DTargetSchedule.cpp126 static unsigned capLatency(int Cycles) { in capLatency()
/external/llvm/utils/TableGen/
DSubtargetEmitter.cpp288 int Cycles = Stage->getValueAsInt("Cycles"); in FormItineraryStageString() local
754 std::vector<int64_t> &Cycles, in ExpandProcResources()
928 std::vector<int64_t> Cycles = in GenSchedClassTables() local
/external/llvm/lib/CodeGen/
DTargetSchedule.cpp95 static unsigned capLatency(int Cycles) { in capLatency()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DR600InstrInfo.cpp406 unsigned Cycles[3] = { 2, 1, 0}; in getTransSwizzle() local
410 unsigned Cycles[3] = { 1, 2, 2}; in getTransSwizzle() local
414 unsigned Cycles[3] = { 2, 1, 2}; in getTransSwizzle() local
418 unsigned Cycles[3] = { 2, 2, 1}; in getTransSwizzle() local
/external/llvm-project/llvm/lib/Target/AMDGPU/
DR600InstrInfo.cpp406 unsigned Cycles[3] = { 2, 1, 0}; in getTransSwizzle() local
410 unsigned Cycles[3] = { 1, 2, 2}; in getTransSwizzle() local
414 unsigned Cycles[3] = { 2, 1, 2}; in getTransSwizzle() local
418 unsigned Cycles[3] = { 2, 2, 1}; in getTransSwizzle() local
/external/llvm/lib/Target/AMDGPU/
DR600InstrInfo.cpp414 unsigned Cycles[3] = { 2, 1, 0}; in getTransSwizzle() local
418 unsigned Cycles[3] = { 1, 2, 2}; in getTransSwizzle() local
422 unsigned Cycles[3] = { 2, 1, 2}; in getTransSwizzle() local
426 unsigned Cycles[3] = { 2, 2, 1}; in getTransSwizzle() local
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DTargetSchedule.cpp126 static unsigned capLatency(int Cycles) { in capLatency()
/external/llvm/include/llvm/CodeGen/
DMachineTraceMetrics.h304 DenseMap<const MachineInstr*, InstrCycles> Cycles; variable

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