1 /* 2 * Copyright (c) 2020U, Renesas Electronics Corporation. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef RZG_INIT_DRAM_TABLE_G2M_H 8 #define RZG_INIT_DRAM_TABLE_G2M_H 9 10 #define DDR_PHY_SLICE_REGSET_OFS_G2M 0x0800U 11 #define DDR_PHY_ADR_V_REGSET_OFS_G2M 0x0a00U 12 #define DDR_PHY_ADR_I_REGSET_OFS_G2M 0x0a80U 13 #define DDR_PHY_ADR_G_REGSET_OFS_G2M 0x0b80U 14 #define DDR_PI_REGSET_OFS_G2M 0x0200U 15 16 #define DDR_PHY_SLICE_REGSET_SIZE_G2M 0x80U 17 #define DDR_PHY_ADR_V_REGSET_SIZE_G2M 0x80U 18 #define DDR_PHY_ADR_I_REGSET_SIZE_G2M 0x80U 19 #define DDR_PHY_ADR_G_REGSET_SIZE_G2M 0x80U 20 #define DDR_PI_REGSET_SIZE_G2M 0x100U 21 22 #define DDR_PHY_SLICE_REGSET_NUM_G2M 89 23 #define DDR_PHY_ADR_V_REGSET_NUM_G2M 37 24 #define DDR_PHY_ADR_I_REGSET_NUM_G2M 37 25 #define DDR_PHY_ADR_G_REGSET_NUM_G2M 64 26 #define DDR_PI_REGSET_NUM_G2M 202 27 28 static const uint32_t DDR_PHY_SLICE_REGSET_G2M[DDR_PHY_SLICE_REGSET_NUM_G2M] = { 29 /*0800*/ 0x76543210U, 30 /*0801*/ 0x0004f008U, 31 /*0802*/ 0x00000000U, 32 /*0803*/ 0x00000000U, 33 /*0804*/ 0x00010000U, 34 /*0805*/ 0x036e6e0eU, 35 /*0806*/ 0x026e6e0eU, 36 /*0807*/ 0x00010300U, 37 /*0808*/ 0x04000100U, 38 /*0809*/ 0x00000300U, 39 /*080a*/ 0x001700c0U, 40 /*080b*/ 0x00b00201U, 41 /*080c*/ 0x00030020U, 42 /*080d*/ 0x00000000U, 43 /*080e*/ 0x00000000U, 44 /*080f*/ 0x00000000U, 45 /*0810*/ 0x00000000U, 46 /*0811*/ 0x00000000U, 47 /*0812*/ 0x00000000U, 48 /*0813*/ 0x00000000U, 49 /*0814*/ 0x09000000U, 50 /*0815*/ 0x04080000U, 51 /*0816*/ 0x04080400U, 52 /*0817*/ 0x00000000U, 53 /*0818*/ 0x32103210U, 54 /*0819*/ 0x00800708U, 55 /*081a*/ 0x000f000cU, 56 /*081b*/ 0x00000100U, 57 /*081c*/ 0x55aa55aaU, 58 /*081d*/ 0x33cc33ccU, 59 /*081e*/ 0x0ff00ff0U, 60 /*081f*/ 0x0f0ff0f0U, 61 /*0820*/ 0x00018e38U, 62 /*0821*/ 0x00000000U, 63 /*0822*/ 0x00000000U, 64 /*0823*/ 0x00000000U, 65 /*0824*/ 0x00000000U, 66 /*0825*/ 0x00000000U, 67 /*0826*/ 0x00000000U, 68 /*0827*/ 0x00000000U, 69 /*0828*/ 0x00000000U, 70 /*0829*/ 0x00000000U, 71 /*082a*/ 0x00000000U, 72 /*082b*/ 0x00000000U, 73 /*082c*/ 0x00000000U, 74 /*082d*/ 0x00000000U, 75 /*082e*/ 0x00000000U, 76 /*082f*/ 0x00000000U, 77 /*0830*/ 0x00000000U, 78 /*0831*/ 0x00000000U, 79 /*0832*/ 0x00000000U, 80 /*0833*/ 0x00200000U, 81 /*0834*/ 0x08200820U, 82 /*0835*/ 0x08200820U, 83 /*0836*/ 0x08200820U, 84 /*0837*/ 0x08200820U, 85 /*0838*/ 0x08200820U, 86 /*0839*/ 0x00000820U, 87 /*083a*/ 0x03000300U, 88 /*083b*/ 0x03000300U, 89 /*083c*/ 0x03000300U, 90 /*083d*/ 0x03000300U, 91 /*083e*/ 0x00000300U, 92 /*083f*/ 0x00000000U, 93 /*0840*/ 0x00000000U, 94 /*0841*/ 0x00000000U, 95 /*0842*/ 0x00000000U, 96 /*0843*/ 0x00a00000U, 97 /*0844*/ 0x00a000a0U, 98 /*0845*/ 0x00a000a0U, 99 /*0846*/ 0x00a000a0U, 100 /*0847*/ 0x00a000a0U, 101 /*0848*/ 0x00a000a0U, 102 /*0849*/ 0x00a000a0U, 103 /*084a*/ 0x00a000a0U, 104 /*084b*/ 0x00a000a0U, 105 /*084c*/ 0x010900a0U, 106 /*084d*/ 0x02000104U, 107 /*084e*/ 0x00000000U, 108 /*084f*/ 0x00010000U, 109 /*0850*/ 0x00000200U, 110 /*0851*/ 0x4041a151U, 111 /*0852*/ 0xc00141a0U, 112 /*0853*/ 0x0e0100c0U, 113 /*0854*/ 0x0010000cU, 114 /*0855*/ 0x0c064208U, 115 /*0856*/ 0x000f0c18U, 116 /*0857*/ 0x00e00140U, 117 /*0858*/ 0x00000c20U 118 }; 119 120 static const uint32_t DDR_PHY_ADR_V_REGSET_G2M[DDR_PHY_ADR_V_REGSET_NUM_G2M] = { 121 /*0a00*/ 0x00000000U, 122 /*0a01*/ 0x00000000U, 123 /*0a02*/ 0x00000000U, 124 /*0a03*/ 0x00000000U, 125 /*0a04*/ 0x00000000U, 126 /*0a05*/ 0x00000000U, 127 /*0a06*/ 0x00000002U, 128 /*0a07*/ 0x00000000U, 129 /*0a08*/ 0x00000000U, 130 /*0a09*/ 0x00000000U, 131 /*0a0a*/ 0x00400320U, 132 /*0a0b*/ 0x00000040U, 133 /*0a0c*/ 0x00dcba98U, 134 /*0a0d*/ 0x00000000U, 135 /*0a0e*/ 0x00dcba98U, 136 /*0a0f*/ 0x01000000U, 137 /*0a10*/ 0x00020003U, 138 /*0a11*/ 0x00000000U, 139 /*0a12*/ 0x00000000U, 140 /*0a13*/ 0x00000000U, 141 /*0a14*/ 0x0000002aU, 142 /*0a15*/ 0x00000015U, 143 /*0a16*/ 0x00000015U, 144 /*0a17*/ 0x0000002aU, 145 /*0a18*/ 0x00000033U, 146 /*0a19*/ 0x0000000cU, 147 /*0a1a*/ 0x0000000cU, 148 /*0a1b*/ 0x00000033U, 149 /*0a1c*/ 0x0a418820U, 150 /*0a1d*/ 0x003f0000U, 151 /*0a1e*/ 0x0000003fU, 152 /*0a1f*/ 0x0002c06eU, 153 /*0a20*/ 0x02c002c0U, 154 /*0a21*/ 0x02c002c0U, 155 /*0a22*/ 0x000002c0U, 156 /*0a23*/ 0x42080010U, 157 /*0a24*/ 0x00000003U 158 }; 159 160 static const uint32_t DDR_PHY_ADR_I_REGSET_G2M[DDR_PHY_ADR_I_REGSET_NUM_G2M] = { 161 /*0a80*/ 0x04040404U, 162 /*0a81*/ 0x00000404U, 163 /*0a82*/ 0x00000000U, 164 /*0a83*/ 0x00000000U, 165 /*0a84*/ 0x00000000U, 166 /*0a85*/ 0x00000000U, 167 /*0a86*/ 0x00000002U, 168 /*0a87*/ 0x00000000U, 169 /*0a88*/ 0x00000000U, 170 /*0a89*/ 0x00000000U, 171 /*0a8a*/ 0x00400320U, 172 /*0a8b*/ 0x00000040U, 173 /*0a8c*/ 0x00000000U, 174 /*0a8d*/ 0x00000000U, 175 /*0a8e*/ 0x00000000U, 176 /*0a8f*/ 0x01000000U, 177 /*0a90*/ 0x00020003U, 178 /*0a91*/ 0x00000000U, 179 /*0a92*/ 0x00000000U, 180 /*0a93*/ 0x00000000U, 181 /*0a94*/ 0x0000002aU, 182 /*0a95*/ 0x00000015U, 183 /*0a96*/ 0x00000015U, 184 /*0a97*/ 0x0000002aU, 185 /*0a98*/ 0x00000033U, 186 /*0a99*/ 0x0000000cU, 187 /*0a9a*/ 0x0000000cU, 188 /*0a9b*/ 0x00000033U, 189 /*0a9c*/ 0x00000000U, 190 /*0a9d*/ 0x00000000U, 191 /*0a9e*/ 0x00000000U, 192 /*0a9f*/ 0x0002c06eU, 193 /*0aa0*/ 0x02c002c0U, 194 /*0aa1*/ 0x02c002c0U, 195 /*0aa2*/ 0x000002c0U, 196 /*0aa3*/ 0x42080010U, 197 /*0aa4*/ 0x00000003U 198 }; 199 200 static const uint32_t DDR_PHY_ADR_G_REGSET_G2M[DDR_PHY_ADR_G_REGSET_NUM_G2M] = { 201 /*0b80*/ 0x00000001U, 202 /*0b81*/ 0x00000000U, 203 /*0b82*/ 0x00000005U, 204 /*0b83*/ 0x04000f00U, 205 /*0b84*/ 0x00020080U, 206 /*0b85*/ 0x00020055U, 207 /*0b86*/ 0x00000000U, 208 /*0b87*/ 0x00000000U, 209 /*0b88*/ 0x00000000U, 210 /*0b89*/ 0x00000050U, 211 /*0b8a*/ 0x00000000U, 212 /*0b8b*/ 0x01010100U, 213 /*0b8c*/ 0x00000600U, 214 /*0b8d*/ 0x50640000U, 215 /*0b8e*/ 0x01421142U, 216 /*0b8f*/ 0x00000142U, 217 /*0b90*/ 0x00000000U, 218 /*0b91*/ 0x000f1600U, 219 /*0b92*/ 0x0f160f16U, 220 /*0b93*/ 0x0f160f16U, 221 /*0b94*/ 0x00000003U, 222 /*0b95*/ 0x0002c000U, 223 /*0b96*/ 0x02c002c0U, 224 /*0b97*/ 0x000002c0U, 225 /*0b98*/ 0x03421342U, 226 /*0b99*/ 0x00000342U, 227 /*0b9a*/ 0x00000000U, 228 /*0b9b*/ 0x00000000U, 229 /*0b9c*/ 0x05020000U, 230 /*0b9d*/ 0x00000000U, 231 /*0b9e*/ 0x00027f6eU, 232 /*0b9f*/ 0x047f027fU, 233 /*0ba0*/ 0x00027f6eU, 234 /*0ba1*/ 0x00047f6eU, 235 /*0ba2*/ 0x0003554fU, 236 /*0ba3*/ 0x0001554fU, 237 /*0ba4*/ 0x0001554fU, 238 /*0ba5*/ 0x0001554fU, 239 /*0ba6*/ 0x0001554fU, 240 /*0ba7*/ 0x00003feeU, 241 /*0ba8*/ 0x0001554fU, 242 /*0ba9*/ 0x00003feeU, 243 /*0baa*/ 0x0001554fU, 244 /*0bab*/ 0x00027f6eU, 245 /*0bac*/ 0x0001554fU, 246 /*0bad*/ 0x00000000U, 247 /*0bae*/ 0x00000000U, 248 /*0baf*/ 0x00000000U, 249 /*0bb0*/ 0x65000000U, 250 /*0bb1*/ 0x00000000U, 251 /*0bb2*/ 0x00000000U, 252 /*0bb3*/ 0x00000201U, 253 /*0bb4*/ 0x00000000U, 254 /*0bb5*/ 0x00000000U, 255 /*0bb6*/ 0x00000000U, 256 /*0bb7*/ 0x00000000U, 257 /*0bb8*/ 0x00000000U, 258 /*0bb9*/ 0x00000000U, 259 /*0bba*/ 0x00000000U, 260 /*0bbb*/ 0x00000000U, 261 /*0bbc*/ 0x06e40000U, 262 /*0bbd*/ 0x00000000U, 263 /*0bbe*/ 0x00000000U, 264 /*0bbf*/ 0x00010000U 265 }; 266 267 static const uint32_t DDR_PI_REGSET_G2M[DDR_PI_REGSET_NUM_G2M] = { 268 /*0200*/ 0x00000b00U, 269 /*0201*/ 0x00000100U, 270 /*0202*/ 0x00000000U, 271 /*0203*/ 0x0000ffffU, 272 /*0204*/ 0x00000000U, 273 /*0205*/ 0x0000ffffU, 274 /*0206*/ 0x00000000U, 275 /*0207*/ 0x304cffffU, 276 /*0208*/ 0x00000200U, 277 /*0209*/ 0x00000200U, 278 /*020a*/ 0x00000200U, 279 /*020b*/ 0x00000200U, 280 /*020c*/ 0x0000304cU, 281 /*020d*/ 0x00000200U, 282 /*020e*/ 0x00000200U, 283 /*020f*/ 0x00000200U, 284 /*0210*/ 0x00000200U, 285 /*0211*/ 0x0000304cU, 286 /*0212*/ 0x00000200U, 287 /*0213*/ 0x00000200U, 288 /*0214*/ 0x00000200U, 289 /*0215*/ 0x00000200U, 290 /*0216*/ 0x00010000U, 291 /*0217*/ 0x00000003U, 292 /*0218*/ 0x01000001U, 293 /*0219*/ 0x00000000U, 294 /*021a*/ 0x00000000U, 295 /*021b*/ 0x00000000U, 296 /*021c*/ 0x00000000U, 297 /*021d*/ 0x00000000U, 298 /*021e*/ 0x00000000U, 299 /*021f*/ 0x00000000U, 300 /*0220*/ 0x00000000U, 301 /*0221*/ 0x00000000U, 302 /*0222*/ 0x00000000U, 303 /*0223*/ 0x00000000U, 304 /*0224*/ 0x00000000U, 305 /*0225*/ 0x00000000U, 306 /*0226*/ 0x00000000U, 307 /*0227*/ 0x00000000U, 308 /*0228*/ 0x00000000U, 309 /*0229*/ 0x0f000101U, 310 /*022a*/ 0x08492d25U, 311 /*022b*/ 0x0e0c0004U, 312 /*022c*/ 0x000e5000U, 313 /*022d*/ 0x00000250U, 314 /*022e*/ 0x00460003U, 315 /*022f*/ 0x182600cfU, 316 /*0230*/ 0x182600cfU, 317 /*0231*/ 0x00000005U, 318 /*0232*/ 0x00000000U, 319 /*0233*/ 0x00000000U, 320 /*0234*/ 0x00000000U, 321 /*0235*/ 0x00000000U, 322 /*0236*/ 0x00000000U, 323 /*0237*/ 0x00000000U, 324 /*0238*/ 0x00000000U, 325 /*0239*/ 0x01000000U, 326 /*023a*/ 0x00040404U, 327 /*023b*/ 0x01280a00U, 328 /*023c*/ 0x00000000U, 329 /*023d*/ 0x000f0000U, 330 /*023e*/ 0x00001803U, 331 /*023f*/ 0x00000000U, 332 /*0240*/ 0x00000000U, 333 /*0241*/ 0x00060002U, 334 /*0242*/ 0x00010001U, 335 /*0243*/ 0x01000101U, 336 /*0244*/ 0x04020201U, 337 /*0245*/ 0x00080804U, 338 /*0246*/ 0x00000000U, 339 /*0247*/ 0x08030000U, 340 /*0248*/ 0x15150408U, 341 /*0249*/ 0x00000000U, 342 /*024a*/ 0x00000000U, 343 /*024b*/ 0x00000000U, 344 /*024c*/ 0x000f0f00U, 345 /*024d*/ 0x0000001eU, 346 /*024e*/ 0x00000000U, 347 /*024f*/ 0x01000300U, 348 /*0250*/ 0x00000000U, 349 /*0251*/ 0x00000000U, 350 /*0252*/ 0x01000000U, 351 /*0253*/ 0x00010101U, 352 /*0254*/ 0x000e0e0eU, 353 /*0255*/ 0x000c0c0cU, 354 /*0256*/ 0x02060601U, 355 /*0257*/ 0x00000000U, 356 /*0258*/ 0x00000003U, 357 /*0259*/ 0x00181703U, 358 /*025a*/ 0x00280006U, 359 /*025b*/ 0x00280016U, 360 /*025c*/ 0x00000016U, 361 /*025d*/ 0x00000000U, 362 /*025e*/ 0x00000000U, 363 /*025f*/ 0x00000000U, 364 /*0260*/ 0x140a0000U, 365 /*0261*/ 0x0005010aU, 366 /*0262*/ 0x03018d03U, 367 /*0263*/ 0x000a018dU, 368 /*0264*/ 0x00060100U, 369 /*0265*/ 0x01000006U, 370 /*0266*/ 0x018e018eU, 371 /*0267*/ 0x018e0100U, 372 /*0268*/ 0x1111018eU, 373 /*0269*/ 0x10010204U, 374 /*026a*/ 0x09090650U, 375 /*026b*/ 0x20110202U, 376 /*026c*/ 0x00201000U, 377 /*026d*/ 0x00201000U, 378 /*026e*/ 0x04041000U, 379 /*026f*/ 0x18020100U, 380 /*0270*/ 0x00010118U, 381 /*0271*/ 0x004b004aU, 382 /*0272*/ 0x050f0000U, 383 /*0273*/ 0x0c01021eU, 384 /*0274*/ 0x34000000U, 385 /*0275*/ 0x00000000U, 386 /*0276*/ 0x00000000U, 387 /*0277*/ 0x00000000U, 388 /*0278*/ 0x0000d400U, 389 /*0279*/ 0x0031002eU, 390 /*027a*/ 0x00111136U, 391 /*027b*/ 0x002e00d4U, 392 /*027c*/ 0x11360031U, 393 /*027d*/ 0x0000d411U, 394 /*027e*/ 0x0031002eU, 395 /*027f*/ 0x00111136U, 396 /*0280*/ 0x002e00d4U, 397 /*0281*/ 0x11360031U, 398 /*0282*/ 0x0000d411U, 399 /*0283*/ 0x0031002eU, 400 /*0284*/ 0x00111136U, 401 /*0285*/ 0x002e00d4U, 402 /*0286*/ 0x11360031U, 403 /*0287*/ 0x00d40011U, 404 /*0288*/ 0x0031002eU, 405 /*0289*/ 0x00111136U, 406 /*028a*/ 0x002e00d4U, 407 /*028b*/ 0x11360031U, 408 /*028c*/ 0x0000d411U, 409 /*028d*/ 0x0031002eU, 410 /*028e*/ 0x00111136U, 411 /*028f*/ 0x002e00d4U, 412 /*0290*/ 0x11360031U, 413 /*0291*/ 0x0000d411U, 414 /*0292*/ 0x0031002eU, 415 /*0293*/ 0x00111136U, 416 /*0294*/ 0x002e00d4U, 417 /*0295*/ 0x11360031U, 418 /*0296*/ 0x02000011U, 419 /*0297*/ 0x018d018dU, 420 /*0298*/ 0x0c08018dU, 421 /*0299*/ 0x1f121d22U, 422 /*029a*/ 0x4301b344U, 423 /*029b*/ 0x10172006U, 424 /*029c*/ 0x1d220c10U, 425 /*029d*/ 0x00001f12U, 426 /*029e*/ 0x4301b344U, 427 /*029f*/ 0x10172006U, 428 /*02a0*/ 0x1d220c10U, 429 /*02a1*/ 0x00001f12U, 430 /*02a2*/ 0x4301b344U, 431 /*02a3*/ 0x10172006U, 432 /*02a4*/ 0x02000210U, 433 /*02a5*/ 0x02000200U, 434 /*02a6*/ 0x02000200U, 435 /*02a7*/ 0x02000200U, 436 /*02a8*/ 0x02000200U, 437 /*02a9*/ 0x00000000U, 438 /*02aa*/ 0x00000000U, 439 /*02ab*/ 0x00000000U, 440 /*02ac*/ 0x00000000U, 441 /*02ad*/ 0x00000000U, 442 /*02ae*/ 0x00000000U, 443 /*02af*/ 0x00000000U, 444 /*02b0*/ 0x00000000U, 445 /*02b1*/ 0x00000000U, 446 /*02b2*/ 0x00000000U, 447 /*02b3*/ 0x00000000U, 448 /*02b4*/ 0x00000000U, 449 /*02b5*/ 0x00000400U, 450 /*02b6*/ 0x15141312U, 451 /*02b7*/ 0x11100f0eU, 452 /*02b8*/ 0x080b0c0dU, 453 /*02b9*/ 0x05040a09U, 454 /*02ba*/ 0x01000706U, 455 /*02bb*/ 0x00000302U, 456 /*02bc*/ 0x01030201U, 457 /*02bd*/ 0x00304c00U, 458 /*02be*/ 0x0001e2f8U, 459 /*02bf*/ 0x0000304cU, 460 /*02c0*/ 0x0001e2f8U, 461 /*02c1*/ 0x0000304cU, 462 /*02c2*/ 0x0001e2f8U, 463 /*02c3*/ 0x08000000U, 464 /*02c4*/ 0x00000100U, 465 /*02c5*/ 0x00000000U, 466 /*02c6*/ 0x00000000U, 467 /*02c7*/ 0x00000000U, 468 /*02c8*/ 0x00000000U, 469 /*02c9*/ 0x00000002U 470 }; 471 472 #endif /* RZG_INIT_DRAM_TABLE_G2M_H */ 473