1 //===-- AMDGPUInstrInfo.h - AMDGPU Instruction Information ------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 /// \file 10 /// Contains the definition of a TargetInstrInfo class that is common 11 /// to all AMD GPUs. 12 // 13 //===----------------------------------------------------------------------===// 14 15 #ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUINSTRINFO_H 16 #define LLVM_LIB_TARGET_AMDGPU_AMDGPUINSTRINFO_H 17 18 #include "AMDGPU.h" 19 #include "Utils/AMDGPUBaseInfo.h" 20 #include "llvm/CodeGen/TargetInstrInfo.h" 21 22 namespace llvm { 23 24 class GCNSubtarget; 25 class MachineFunction; 26 class MachineInstr; 27 class MachineInstrBuilder; 28 29 class AMDGPUInstrInfo { 30 public: 31 explicit AMDGPUInstrInfo(const GCNSubtarget &st); 32 33 static bool isUniformMMO(const MachineMemOperand *MMO); 34 }; 35 36 namespace AMDGPU { 37 38 struct RsrcIntrinsic { 39 unsigned Intr; 40 uint8_t RsrcArg; 41 bool IsImage; 42 }; 43 const RsrcIntrinsic *lookupRsrcIntrinsic(unsigned Intr); 44 45 struct D16ImageDimIntrinsic { 46 unsigned Intr; 47 unsigned D16HelperIntr; 48 }; 49 const D16ImageDimIntrinsic *lookupD16ImageDimIntrinsic(unsigned Intr); 50 51 struct ImageDimIntrinsicInfo { 52 unsigned Intr; 53 unsigned BaseOpcode; 54 MIMGDim Dim; 55 56 uint8_t NumGradients; 57 uint8_t NumDmask; 58 uint8_t NumData; 59 uint8_t NumVAddrs; 60 uint8_t NumArgs; 61 62 uint8_t DMaskIndex; 63 uint8_t VAddrStart; 64 uint8_t GradientStart; 65 uint8_t CoordStart; 66 uint8_t LodIndex; 67 uint8_t MipIndex; 68 uint8_t VAddrEnd; 69 uint8_t RsrcIndex; 70 uint8_t SampIndex; 71 uint8_t UnormIndex; 72 uint8_t TexFailCtrlIndex; 73 uint8_t CachePolicyIndex; 74 75 uint8_t GradientTyArg; 76 uint8_t CoordTyArg; 77 }; 78 const ImageDimIntrinsicInfo *getImageDimIntrinsicInfo(unsigned Intr); 79 80 const ImageDimIntrinsicInfo *getImageDimInstrinsicByBaseOpcode(unsigned BaseOpcode, 81 unsigned Dim); 82 83 } // end AMDGPU namespace 84 } // End llvm namespace 85 86 #endif 87